LLVM 20.0.0git
Classes | Namespaces | Macros | Functions
ARMInstructionSelector.cpp File Reference

This file implements the targeting of the InstructionSelector class for ARM. More...

#include "ARMRegisterBankInfo.h"
#include "ARMSubtarget.h"
#include "ARMTargetMachine.h"
#include "llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h"
#include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/Debug.h"
#include "ARMGenGlobalISel.inc"

Go to the source code of this file.

Classes

struct  ARMInstructionSelector::CmpConstants
 
struct  ARMInstructionSelector::InsertInfo
 

Namespaces

namespace  llvm
 This is an optimization pass for GlobalISel generic memory operations.
 

Macros

#define DEBUG_TYPE   "arm-isel"
 
#define GET_GLOBALISEL_PREDICATE_BITSET
 
#define GET_GLOBALISEL_PREDICATES_DECL
 
#define GET_GLOBALISEL_TEMPORARIES_DECL
 
#define GET_GLOBALISEL_IMPL
 
#define GET_GLOBALISEL_PREDICATES_INIT
 
#define GET_GLOBALISEL_TEMPORARIES_INIT
 
#define STORE_OPCODE(VAR, OPC)   VAR = isThumb ? ARM::t2##OPC : ARM::OPC
 

Functions

InstructionSelectorllvm::createARMInstructionSelector (const ARMBaseTargetMachine &TM, const ARMSubtarget &STI, const ARMRegisterBankInfo &RBI)
 
static bool selectCopy (MachineInstr &I, const TargetInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI)
 
static bool selectMergeValues (MachineInstrBuilder &MIB, const ARMBaseInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI)
 
static bool selectUnmergeValues (MachineInstrBuilder &MIB, const ARMBaseInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI)
 
static std::pair< ARMCC::CondCodes, ARMCC::CondCodesgetComparePreds (CmpInst::Predicate Pred)
 

Detailed Description

This file implements the targeting of the InstructionSelector class for ARM.

Todo:
This should be generated by TableGen.

Definition in file ARMInstructionSelector.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "arm-isel"

Definition at line 23 of file ARMInstructionSelector.cpp.

◆ GET_GLOBALISEL_IMPL

#define GET_GLOBALISEL_IMPL

Definition at line 169 of file ARMInstructionSelector.cpp.

◆ GET_GLOBALISEL_PREDICATE_BITSET

#define GET_GLOBALISEL_PREDICATE_BITSET

Definition at line 29 of file ARMInstructionSelector.cpp.

◆ GET_GLOBALISEL_PREDICATES_DECL

#define GET_GLOBALISEL_PREDICATES_DECL

Definition at line 148 of file ARMInstructionSelector.cpp.

◆ GET_GLOBALISEL_PREDICATES_INIT

#define GET_GLOBALISEL_PREDICATES_INIT

◆ GET_GLOBALISEL_TEMPORARIES_DECL

#define GET_GLOBALISEL_TEMPORARIES_DECL

Definition at line 154 of file ARMInstructionSelector.cpp.

◆ GET_GLOBALISEL_TEMPORARIES_INIT

#define GET_GLOBALISEL_TEMPORARIES_INIT

◆ STORE_OPCODE

#define STORE_OPCODE (   VAR,
  OPC 
)    VAR = isThumb ? ARM::t2##OPC : ARM::OPC

Function Documentation

◆ getComparePreds()

static std::pair< ARMCC::CondCodes, ARMCC::CondCodes > getComparePreds ( CmpInst::Predicate  Pred)
static

◆ selectCopy()

static bool selectCopy ( MachineInstr I,
const TargetInstrInfo TII,
MachineRegisterInfo MRI,
const TargetRegisterInfo TRI,
const RegisterBankInfo RBI 
)
static

◆ selectMergeValues()

static bool selectMergeValues ( MachineInstrBuilder MIB,
const ARMBaseInstrInfo TII,
MachineRegisterInfo MRI,
const TargetRegisterInfo TRI,
const RegisterBankInfo RBI 
)
static

◆ selectUnmergeValues()

static bool selectUnmergeValues ( MachineInstrBuilder MIB,
const ARMBaseInstrInfo TII,
MachineRegisterInfo MRI,
const TargetRegisterInfo TRI,
const RegisterBankInfo RBI 
)
static