ARMInstructionSelector.cpp File Reference

This file implements the targeting of the InstructionSelector class for ARM. More...

#include "ARMRegisterBankInfo.h"
#include "ARMSubtarget.h"
#include "ARMTargetMachine.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/Debug.h"
#include "ARMGenGlobalISel.inc"

Include dependency graph for ARMInstructionSelector.cpp:

Go to the source code of this file.

Classes
struct	ARMInstructionSelector::CmpConstants
struct	ARMInstructionSelector::InsertInfo

Namespaces
	llvm
	This class represents lattice values for constants.

Macros
#define	DEBUG_TYPE   "arm-isel"
#define	GET_GLOBALISEL_PREDICATE_BITSET
#define	GET_GLOBALISEL_PREDICATES_DECL
#define	GET_GLOBALISEL_TEMPORARIES_DECL
#define	GET_GLOBALISEL_IMPL
#define	GET_GLOBALISEL_PREDICATES_INIT
#define	GET_GLOBALISEL_TEMPORARIES_INIT
#define	STORE_OPCODE(VAR, OPC)   VAR = isThumb ? ARM::t2##OPC : ARM::OPC

Functions
InstructionSelector *	llvm::createARMInstructionSelector (const ARMBaseTargetMachine &TM, const ARMSubtarget &STI, const ARMRegisterBankInfo &RBI)
static bool	selectCopy (MachineInstr &I, const TargetInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI)
static bool	selectMergeValues (MachineInstrBuilder &MIB, const ARMBaseInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI)
static bool	selectUnmergeValues (MachineInstrBuilder &MIB, const ARMBaseInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI)
static std::pair< ARMCC::CondCodes, ARMCC::CondCodes >	getComparePreds (CmpInst::Predicate Pred)

Variables
const unsigned	zero_reg = 0

Detailed Description

This file implements the targeting of the InstructionSelector class for ARM.

Todo:

This should be generated by TableGen.

Definition in file ARMInstructionSelector.cpp.

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "arm-isel"

Definition at line 22 of file ARMInstructionSelector.cpp.

GET_GLOBALISEL_IMPL

#define GET_GLOBALISEL_IMPL

Definition at line 166 of file ARMInstructionSelector.cpp.

GET_GLOBALISEL_PREDICATE_BITSET

#define GET_GLOBALISEL_PREDICATE_BITSET

Definition at line 28 of file ARMInstructionSelector.cpp.

GET_GLOBALISEL_PREDICATES_DECL

#define GET_GLOBALISEL_PREDICATES_DECL

Definition at line 143 of file ARMInstructionSelector.cpp.

GET_GLOBALISEL_PREDICATES_INIT

#define GET_GLOBALISEL_PREDICATES_INIT

GET_GLOBALISEL_TEMPORARIES_DECL

#define GET_GLOBALISEL_TEMPORARIES_DECL

Definition at line 149 of file ARMInstructionSelector.cpp.

GET_GLOBALISEL_TEMPORARIES_INIT

#define GET_GLOBALISEL_TEMPORARIES_INIT

STORE_OPCODE

#define STORE_OPCODE	(		VAR,
			OPC
	)		VAR = isThumb ? ARM::t2##OPC : ARM::OPC

Referenced by selectUnmergeValues().

Function Documentation

getComparePreds()

static std::pair<ARMCC::CondCodes, ARMCC::CondCodes> getComparePreds ( CmpInst::Predicate  Pred )

static

Definition at line 391 of file ARMInstructionSelector.cpp.

References llvm::AArch64CC::AL, assert(), EQ, llvm::AArch64CC::GE, llvm::AArch64CC::GT, llvm::AArch64CC::HI, llvm::AArch64CC::HS, llvm::AArch64CC::LE, llvm::AArch64CC::LO, llvm::AArch64CC::LS, llvm::AArch64CC::LT, MI, llvm::AArch64CC::NE, llvm::AArch64CC::PL, llvm::AArch64CC::VC, and llvm::AArch64CC::VS.

selectCopy()

static bool selectCopy ( MachineInstr &  I, const TargetInstrInfo &  TII, MachineRegisterInfo &  MRI, const TargetRegisterInfo &  TRI, const RegisterBankInfo &  RBI  )

static

Definition at line 210 of file ARMInstructionSelector.cpp.

References llvm::RegisterBankInfo::constrainGenericRegister(), llvm::dbgs(), llvm::MCInstrInfo::getName(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), and LLVM_DEBUG.

selectMergeValues()

static bool selectMergeValues ( MachineInstrBuilder &  MIB, const ARMBaseInstrInfo &  TII, MachineRegisterInfo &  MRI, const TargetRegisterInfo &  TRI, const RegisterBankInfo &  RBI  )

static

Definition at line 230 of file ARMInstructionSelector.cpp.

References llvm::MachineInstrBuilder::add(), llvm::AArch64CC::AL, assert(), llvm::RegisterBank::getID(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::RegisterBankInfo::getRegBank(), llvm::LLT::getSizeInBits(), llvm::ARMBaseInstrInfo::getSubtarget(), llvm::MachineRegisterInfo::getType(), llvm::ARMSubtarget::hasVFP2Base(), llvm::predOps(), llvm::MachineInstr::setDesc(), and llvm::ARMISD::VMOVDRR.

Referenced by canTurnIntoCOPY(), changeFCMPPredToAArch64CC(), and getRegClassFromGRPhysReg().

selectUnmergeValues()

static bool selectUnmergeValues ( MachineInstrBuilder &  MIB, const ARMBaseInstrInfo &  TII, MachineRegisterInfo &  MRI, const TargetRegisterInfo &  TRI, const RegisterBankInfo &  RBI  )

static

Definition at line 261 of file ARMInstructionSelector.cpp.

References llvm::MachineInstrBuilder::add(), llvm::AArch64CC::AL, llvm::ISD::AND, assert(), llvm::RegisterBank::getID(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::RegisterBankInfo::getRegBank(), llvm::LLT::getSizeInBits(), llvm::ARMBaseInstrInfo::getSubtarget(), llvm::MachineRegisterInfo::getType(), llvm::ARMSubtarget::hasVFP2Base(), isStore(), isThumb(), llvm::ARMSubtarget::isThumb(), llvm::predOps(), llvm::MachineInstr::setDesc(), Size, STORE_OPCODE, llvm::AArch64_AM::SXTB, llvm::AArch64_AM::SXTH, llvm::AArch64_AM::UXTB, llvm::AArch64_AM::UXTH, and llvm::ARMISD::VMOVRRD.

Referenced by canTurnIntoCOPY(), changeFCMPPredToAArch64CC(), getLaneCopyOpcode(), and getRegClassFromGRPhysReg().

Variable Documentation

zero_reg

const unsigned zero_reg = 0

Definition at line 164 of file ARMInstructionSelector.cpp.