LLVM 20.0.0git
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This file implements the targeting of the InstructionSelector class for ARM. More...
#include "ARMRegisterBankInfo.h"
#include "ARMSubtarget.h"
#include "ARMTargetMachine.h"
#include "llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h"
#include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/Debug.h"
#include "ARMGenGlobalISel.inc"
Go to the source code of this file.
Classes | |
struct | ARMInstructionSelector::CmpConstants |
struct | ARMInstructionSelector::InsertInfo |
Namespaces | |
namespace | llvm |
This is an optimization pass for GlobalISel generic memory operations. | |
Macros | |
#define | DEBUG_TYPE "arm-isel" |
#define | GET_GLOBALISEL_PREDICATE_BITSET |
#define | GET_GLOBALISEL_PREDICATES_DECL |
#define | GET_GLOBALISEL_TEMPORARIES_DECL |
#define | GET_GLOBALISEL_IMPL |
#define | GET_GLOBALISEL_PREDICATES_INIT |
#define | GET_GLOBALISEL_TEMPORARIES_INIT |
#define | STORE_OPCODE(VAR, OPC) VAR = isThumb ? ARM::t2##OPC : ARM::OPC |
Functions | |
InstructionSelector * | llvm::createARMInstructionSelector (const ARMBaseTargetMachine &TM, const ARMSubtarget &STI, const ARMRegisterBankInfo &RBI) |
static bool | selectCopy (MachineInstr &I, const TargetInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) |
static bool | selectMergeValues (MachineInstrBuilder &MIB, const ARMBaseInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) |
static bool | selectUnmergeValues (MachineInstrBuilder &MIB, const ARMBaseInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) |
static std::pair< ARMCC::CondCodes, ARMCC::CondCodes > | getComparePreds (CmpInst::Predicate Pred) |
This file implements the targeting of the InstructionSelector class for ARM.
Definition in file ARMInstructionSelector.cpp.
#define DEBUG_TYPE "arm-isel" |
Definition at line 23 of file ARMInstructionSelector.cpp.
#define GET_GLOBALISEL_IMPL |
Definition at line 169 of file ARMInstructionSelector.cpp.
#define GET_GLOBALISEL_PREDICATE_BITSET |
Definition at line 29 of file ARMInstructionSelector.cpp.
#define GET_GLOBALISEL_PREDICATES_DECL |
Definition at line 148 of file ARMInstructionSelector.cpp.
#define GET_GLOBALISEL_PREDICATES_INIT |
#define GET_GLOBALISEL_TEMPORARIES_DECL |
Definition at line 154 of file ARMInstructionSelector.cpp.
#define GET_GLOBALISEL_TEMPORARIES_INIT |
#define STORE_OPCODE | ( | VAR, | |
OPC | |||
) | VAR = isThumb ? ARM::t2##OPC : ARM::OPC |
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Definition at line 394 of file ARMInstructionSelector.cpp.
References llvm::ARMCC::AL, assert(), llvm::ARMCC::EQ, llvm::CmpInst::FCMP_OEQ, llvm::CmpInst::FCMP_OGE, llvm::CmpInst::FCMP_OGT, llvm::CmpInst::FCMP_OLE, llvm::CmpInst::FCMP_OLT, llvm::CmpInst::FCMP_ONE, llvm::CmpInst::FCMP_ORD, llvm::CmpInst::FCMP_UEQ, llvm::CmpInst::FCMP_UGE, llvm::CmpInst::FCMP_UGT, llvm::CmpInst::FCMP_ULE, llvm::CmpInst::FCMP_ULT, llvm::CmpInst::FCMP_UNE, llvm::CmpInst::FCMP_UNO, llvm::ARMCC::GE, llvm::ARMCC::GT, llvm::ARMCC::HI, llvm::ARMCC::HS, llvm::CmpInst::ICMP_EQ, llvm::CmpInst::ICMP_NE, llvm::CmpInst::ICMP_SGE, llvm::CmpInst::ICMP_SGT, llvm::CmpInst::ICMP_SLE, llvm::CmpInst::ICMP_SLT, llvm::CmpInst::ICMP_UGE, llvm::CmpInst::ICMP_UGT, llvm::CmpInst::ICMP_ULE, llvm::CmpInst::ICMP_ULT, llvm::ARMCC::LE, llvm::ARMCC::LO, llvm::ARMCC::LS, llvm::ARMCC::LT, llvm::ARMCC::MI, llvm::ARMCC::NE, llvm::ARMCC::PL, llvm::ARMCC::VC, and llvm::ARMCC::VS.
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Definition at line 213 of file ARMInstructionSelector.cpp.
References llvm::RegisterBankInfo::constrainGenericRegister(), llvm::dbgs(), I, llvm::Register::isPhysical(), LLVM_DEBUG, MRI, TII, and TRI.
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Definition at line 233 of file ARMInstructionSelector.cpp.
References llvm::MachineInstrBuilder::add(), llvm::ARMCC::AL, assert(), llvm::RegisterBank::getID(), llvm::MachineInstrBuilder::getReg(), llvm::RegisterBankInfo::getRegBank(), MRI, llvm::predOps(), llvm::MachineInstr::setDesc(), TII, and TRI.
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Definition at line 264 of file ARMInstructionSelector.cpp.
References llvm::MachineInstrBuilder::add(), llvm::ARMCC::AL, assert(), llvm::RegisterBank::getID(), llvm::MachineInstrBuilder::getReg(), llvm::RegisterBankInfo::getRegBank(), MRI, llvm::predOps(), llvm::MachineInstr::setDesc(), TII, and TRI.