LLVM
15.0.0git
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#include "ARMRegisterBankInfo.h"
#include "ARMSubtarget.h"
#include "ARMTargetMachine.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/IR/IntrinsicsARM.h"
#include "llvm/Support/Debug.h"
#include "ARMGenGlobalISel.inc"
Go to the source code of this file.
Classes | |
struct | ARMInstructionSelector::CmpConstants |
struct | ARMInstructionSelector::InsertInfo |
Namespaces | |
llvm | |
This is an optimization pass for GlobalISel generic memory operations. | |
Macros | |
#define | DEBUG_TYPE "arm-isel" |
#define | GET_GLOBALISEL_PREDICATE_BITSET |
#define | GET_GLOBALISEL_PREDICATES_DECL |
#define | GET_GLOBALISEL_TEMPORARIES_DECL |
#define | GET_GLOBALISEL_IMPL |
#define | GET_GLOBALISEL_PREDICATES_INIT |
#define | GET_GLOBALISEL_TEMPORARIES_INIT |
#define | STORE_OPCODE(VAR, OPC) VAR = isThumb ? ARM::t2##OPC : ARM::OPC |
Functions | |
InstructionSelector * | llvm::createARMInstructionSelector (const ARMBaseTargetMachine &TM, const ARMSubtarget &STI, const ARMRegisterBankInfo &RBI) |
static bool | selectCopy (MachineInstr &I, const TargetInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) |
static bool | selectMergeValues (MachineInstrBuilder &MIB, const ARMBaseInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) |
static bool | selectUnmergeValues (MachineInstrBuilder &MIB, const ARMBaseInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) |
static std::pair< ARMCC::CondCodes, ARMCC::CondCodes > | getComparePreds (CmpInst::Predicate Pred) |
This file implements the targeting of the InstructionSelector class for ARM.
Definition in file ARMInstructionSelector.cpp.
#define DEBUG_TYPE "arm-isel" |
Definition at line 23 of file ARMInstructionSelector.cpp.
#define GET_GLOBALISEL_IMPL |
Definition at line 167 of file ARMInstructionSelector.cpp.
#define GET_GLOBALISEL_PREDICATE_BITSET |
Definition at line 29 of file ARMInstructionSelector.cpp.
#define GET_GLOBALISEL_PREDICATES_DECL |
Definition at line 146 of file ARMInstructionSelector.cpp.
#define GET_GLOBALISEL_PREDICATES_INIT |
#define GET_GLOBALISEL_TEMPORARIES_DECL |
Definition at line 152 of file ARMInstructionSelector.cpp.
#define GET_GLOBALISEL_TEMPORARIES_INIT |
#define STORE_OPCODE | ( | VAR, | |
OPC | |||
) | VAR = isThumb ? ARM::t2##OPC : ARM::OPC |
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Definition at line 392 of file ARMInstructionSelector.cpp.
References llvm::AArch64CC::AL, assert(), EQ, llvm::AArch64CC::GE, llvm::AArch64CC::GT, llvm::AArch64CC::HI, llvm::AArch64CC::HS, llvm::AArch64CC::LE, llvm::AArch64CC::LO, llvm::AArch64CC::LS, llvm::AArch64CC::LT, MI, llvm::AArch64CC::NE, llvm::AArch64CC::PL, llvm::AArch64CC::VC, and llvm::AArch64CC::VS.
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Definition at line 211 of file ARMInstructionSelector.cpp.
References llvm::RegisterBankInfo::constrainGenericRegister(), llvm::dbgs(), I, LLVM_DEBUG, MRI, TII, and TRI.
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Definition at line 231 of file ARMInstructionSelector.cpp.
References llvm::MachineInstrBuilder::add(), llvm::AArch64CC::AL, assert(), llvm::RegisterBank::getID(), llvm::MachineInstrBuilder::getReg(), llvm::RegisterBankInfo::getRegBank(), llvm::LLT::getSizeInBits(), llvm::MachineRegisterInfo::getType(), MRI, llvm::predOps(), llvm::MachineInstr::setDesc(), TII, TRI, and llvm::ARMISD::VMOVDRR.
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Definition at line 262 of file ARMInstructionSelector.cpp.
References llvm::MachineInstrBuilder::add(), llvm::AArch64CC::AL, assert(), llvm::RegisterBank::getID(), llvm::MachineInstrBuilder::getReg(), llvm::RegisterBankInfo::getRegBank(), llvm::LLT::getSizeInBits(), llvm::MachineRegisterInfo::getType(), MRI, llvm::predOps(), llvm::MachineInstr::setDesc(), TII, TRI, and llvm::ARMISD::VMOVRRD.