13#ifndef LLVM_LIB_TARGET_ARM_ARMREGISTERBANKINFO_H
14#define LLVM_LIB_TARGET_ARM_ARMREGISTERBANKINFO_H
18#define GET_REGBANK_DECLARATIONS
19#include "ARMGenRegisterBank.inc"
23class TargetRegisterInfo;
26#define GET_TARGET_REGBANK_CLASS
27#include "ARMGenRegisterBank.inc"
Register const TargetRegisterInfo * TRI
ARMRegisterBankInfo(const TargetRegisterInfo &TRI)
const InstructionMapping & getInstrMapping(const MachineInstr &MI) const override
Get the mapping of the different operands of MI on the register bank.
Representation of each machine instruction.
Helper class that represents how the value of an instruction may be mapped and what is the related co...
RegisterBankInfo(const RegisterBank **RegBanks, unsigned NumRegBanks, const unsigned *Sizes, unsigned HwMode)
Create a RegisterBankInfo that can accommodate up to NumRegBanks RegisterBank instances.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.