#include "Target/ARM/ARMTargetMachine.h"

Inheritance diagram for llvm::ARMBaseTargetMachine:

Public Member Functions
	ARMBaseTargetMachine (const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL)
	Create an ARM architecture model.
	~ARMBaseTargetMachine () override
const ARMSubtarget *	getSubtargetImpl (const Function &F) const override
	Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInfo-derived member variable.
const ARMSubtarget *	getSubtargetImpl () const =delete
bool	isLittleEndian () const
TargetTransformInfo	getTargetTransformInfo (const Function &F) const override
	Return a TargetTransformInfo for a given function.
TargetPassConfig *	createPassConfig (PassManagerBase &PM) override
	Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of CodeGen passes.
TargetLoweringObjectFile *	getObjFileLowering () const override
bool	isAPCS_ABI () const
bool	isAAPCS_ABI () const
bool	isAAPCS16_ABI () const
bool	isTargetHardFloat () const
bool	targetSchedulesPostRAScheduling () const override
	True if subtarget inserts the final scheduling pass on its own.
MachineFunctionInfo *	createMachineFunctionInfo (BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
	Create the target's instance of MachineFunctionInfo.
bool	isNoopAddrSpaceCast (unsigned SrcAS, unsigned DestAS) const override
	Returns true if a cast between SrcAS and DestAS is a noop.
yaml::MachineFunctionInfo *	createDefaultFuncInfoYAML () const override
	Allocate and return a default initialized instance of the YAML representation for the MachineFunctionInfo.
yaml::MachineFunctionInfo *	convertFuncInfoToYAML (const MachineFunction &MF) const override
	Allocate and initialize an instance of the YAML representation of the MachineFunctionInfo.
bool	parseMachineFunctionInfo (const yaml::MachineFunctionInfo &, PerFunctionMIParsingState &PFS, SMDiagnostic &Error, SMRange &SourceRange) const override
	Parse out the target's MachineFunctionInfo from the YAML reprsentation.
ScheduleDAGInstrs *	createMachineScheduler (MachineSchedContext *C) const override
	Create an instance of ScheduleDAGInstrs to be run within the standard MachineScheduler pass for this function and target at the current optimization level.
ScheduleDAGInstrs *	createPostMachineScheduler (MachineSchedContext *C) const override
	Similar to createMachineScheduler but used when postRA machine scheduling is enabled.
Public Member Functions inherited from llvm::CodeGenTargetMachineImpl
TargetTransformInfo	getTargetTransformInfo (const Function &F) const override
	Get a TargetTransformInfo implementation for the target.
bool	addPassesToEmitFile (PassManagerBase &PM, raw_pwrite_stream &Out, raw_pwrite_stream DwoOut, CodeGenFileType FileType, bool DisableVerify=true, MachineModuleInfoWrapperPass MMIWP=nullptr) override
	Add passes to the specified pass manager to get the specified file emitted.
bool	addPassesToEmitMC (PassManagerBase &PM, MCContext *&Ctx, raw_pwrite_stream &Out, bool DisableVerify=true) override
	Add passes to the specified pass manager to get machine code emitted with the MCJIT.
bool	addAsmPrinter (PassManagerBase &PM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, CodeGenFileType FileType, MCContext &Context) override
	Adds an AsmPrinter pass to the pipeline that prints assembly or machine code from the MI representation.
Expected< std::unique_ptr< MCStreamer > >	createMCStreamer (raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, CodeGenFileType FileType, MCContext &Ctx) override
Public Member Functions inherited from llvm::TargetMachine
	TargetMachine (const TargetMachine &)=delete
void	operator= (const TargetMachine &)=delete
virtual	~TargetMachine ()
const Target &	getTarget () const
const Triple &	getTargetTriple () const
StringRef	getTargetCPU () const
StringRef	getTargetFeatureString () const
void	setTargetFeatureString (StringRef FS)
template<typename STC>
const STC &	getSubtarget (const Function &F) const
	This method returns a pointer to the specified type of TargetSubtargetInfo.
const DataLayout	createDataLayout () const
	Create a DataLayout.
bool	isCompatibleDataLayout (const DataLayout &Candidate) const
	Test if a DataLayout if compatible with the CodeGen for this target.
unsigned	getPointerSize (unsigned AS) const
	Get the pointer size for this target.
unsigned	getPointerSizeInBits (unsigned AS) const
unsigned	getProgramPointerSize () const
unsigned	getAllocaPointerSize () const
void	resetTargetOptions (const Function &F) const
	Reset the target options based on the function's attributes.
const MCAsmInfo *	getMCAsmInfo () const
	Return target specific asm information.
const MCRegisterInfo *	getMCRegisterInfo () const
const MCInstrInfo *	getMCInstrInfo () const
const MCSubtargetInfo *	getMCSubtargetInfo () const
ExceptionHandling	getExceptionModel () const
	Return the ExceptionHandling to use, considering TargetOptions and the Triple's default.
bool	requiresStructuredCFG () const
void	setRequiresStructuredCFG (bool Value)
Reloc::Model	getRelocationModel () const
	Returns the code generation relocation model.
CodeModel::Model	getCodeModel () const
	Returns the code model.
uint64_t	getMaxCodeSize () const
	Returns the maximum code size possible under the code model.
void	setCodeModel (CodeModel::Model CM)
	Set the code model.
void	setLargeDataThreshold (uint64_t LDT)
bool	isLargeGlobalValue (const GlobalValue *GV) const
bool	isPositionIndependent () const
bool	shouldAssumeDSOLocal (const GlobalValue *GV) const
bool	useEmulatedTLS () const
	Returns true if this target uses emulated TLS.
bool	useTLSDESC () const
	Returns true if this target uses TLS Descriptors.
TLSModel::Model	getTLSModel (const GlobalValue *GV) const
	Returns the TLS model which should be used for the given global variable.
CodeGenOptLevel	getOptLevel () const
	Returns the optimization level: None, Less, Default, or Aggressive.
void	setOptLevel (CodeGenOptLevel Level)
	Overrides the optimization level.
void	setFastISel (bool Enable)
bool	getO0WantsFastISel ()
void	setO0WantsFastISel (bool Enable)
void	setGlobalISel (bool Enable)
void	setGlobalISelAbort (GlobalISelAbortMode Mode)
void	setMachineOutliner (bool Enable)
void	setSupportsDefaultOutlining (bool Enable)
void	setSupportsDebugEntryValues (bool Enable)
void	setCFIFixup (bool Enable)
bool	getAIXExtendedAltivecABI () const
bool	getUniqueSectionNames () const
bool	getUniqueBasicBlockSectionNames () const
	Return true if unique basic block section names must be generated.
bool	getSeparateNamedSections () const
bool	getDataSections () const
	Return true if data objects should be emitted into their own section, corresponds to -fdata-sections.
bool	getFunctionSections () const
	Return true if functions should be emitted into their own section, corresponding to -ffunction-sections.
bool	getEnableStaticDataPartitioning () const
bool	getIgnoreXCOFFVisibility () const
	Return true if visibility attribute should not be emitted in XCOFF, corresponding to -mignore-xcoff-visibility.
bool	getXCOFFTracebackTable () const
	Return true if XCOFF traceback table should be emitted, corresponding to -xcoff-traceback-table.
llvm::BasicBlockSection	getBBSectionsType () const
	If basic blocks should be emitted into their own section, corresponding to -fbasic-block-sections.
const MemoryBuffer *	getBBSectionsFuncListBuf () const
	Get the list of functions and basic block ids that need unique sections.
void	setPGOOption (std::optional< PGOOptions > PGOOpt)
const std::optional< PGOOptions > &	getPGOOption () const
virtual unsigned	getAssumedAddrSpace (const Value *V) const
	If the specified generic pointer could be assumed as a pointer to a specific address space, return that address space.
virtual std::pair< const Value *, unsigned >	getPredicatedAddrSpace (const Value *V) const
	If the specified predicate checks whether a generic pointer falls within a specified address space, return that generic pointer and the address space being queried.
TargetIRAnalysis	getTargetIRAnalysis () const
	Get a `TargetIRAnalysis` appropriate for the target.
virtual void	registerPassBuilderCallbacks (PassBuilder &)
	Allow the target to modify the pass pipeline.
virtual void	registerEarlyDefaultAliasAnalyses (AAManager &)
	Allow the target to register early alias analyses (AA before BasicAA) with the AAManager for use with the new pass manager.
virtual void	registerDefaultAliasAnalyses (AAManager &)
	Allow the target to register alias analyses with the AAManager for use with the new pass manager.
void	getNameWithPrefix (SmallVectorImpl< char > &Name, const GlobalValue *GV, Mangler &Mang, bool MayAlwaysUsePrivate=false) const
MCSymbol *	getSymbol (const GlobalValue *GV) const
virtual unsigned	getSjLjDataSize () const
virtual unsigned	getAddressSpaceForPseudoSourceKind (unsigned Kind) const
	getAddressSpaceForPseudoSourceKind - Given the kind of memory (e.g.
virtual bool	splitModule (Module &M, unsigned NumParts, function_ref< void(std::unique_ptr< Module > MPart)> ModuleCallback)
	Entry point for module splitting.
virtual Error	buildCodeGenPipeline (ModulePassManager &, raw_pwrite_stream &, raw_pwrite_stream , CodeGenFileType, const CGPassBuilderOption &, PassInstrumentationCallbacks )
virtual bool	isMachineVerifierClean () const
	Returns true if the target is expected to pass all machine verifier checks.
virtual bool	usesPhysRegsForValues () const
	True if the target uses physical regs (as nearly all targets do).
virtual bool	useIPRA () const
	True if the target wants to use interprocedural register allocation by default.
virtual int	unqualifiedInlineAsmVariant () const
	The default variant to use in unqualified asm instructions.
virtual void	registerMachineRegisterInfoCallback (MachineFunction &MF) const
virtual size_t	clearLinkerOptimizationHints (const SmallPtrSetImpl< MachineInstr * > &MIs) const
	Remove all Linker Optimization Hints (LOH) associated with instructions in `MIs` and.

Public Attributes
ARM::ARMABI	TargetABI
Public Attributes inherited from llvm::TargetMachine
TargetOptions	Options

Protected Member Functions
void	reset () override
	Reset internal state.
Protected Member Functions inherited from llvm::CodeGenTargetMachineImpl
	CodeGenTargetMachineImpl (const Target &T, StringRef DataLayoutString, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOptLevel OL)
void	initAsmInfo ()
Protected Member Functions inherited from llvm::TargetMachine
	TargetMachine (const Target &T, StringRef DataLayoutString, const Triple &TargetTriple, StringRef CPU, StringRef FS, const TargetOptions &Options)

Protected Attributes
std::unique_ptr< TargetLoweringObjectFile >	TLOF
bool	isLittle
StringMap< std::unique_ptr< ARMSubtarget > >	SubtargetMap
Protected Attributes inherited from llvm::TargetMachine
const Target &	TheTarget
	The Target that this machine was created for.
const DataLayout	DL
	DataLayout for the target: keep ABI type size and alignment.
Triple	TargetTriple
	Triple string, CPU name, and target feature strings the TargetMachine instance is created with.
std::string	TargetCPU
std::string	TargetFS
Reloc::Model	RM = Reloc::Static
CodeModel::Model	CMModel = CodeModel::Small
uint64_t	LargeDataThreshold = 0
CodeGenOptLevel	OptLevel = CodeGenOptLevel::Default
std::unique_ptr< const MCAsmInfo >	AsmInfo
	Contains target specific asm information.
std::unique_ptr< const MCRegisterInfo >	MRI
std::unique_ptr< const MCInstrInfo >	MII
std::unique_ptr< const MCSubtargetInfo >	STI
unsigned	RequireStructuredCFG: 1
unsigned	O0WantsFastISel: 1
std::optional< PGOOptions >	PGOOption

Additional Inherited Members
Static Public Member Functions inherited from llvm::TargetMachine
static std::pair< int, int >	parseBinutilsVersion (StringRef Version)
Static Public Attributes inherited from llvm::TargetMachine
static constexpr unsigned	DefaultSjLjDataSize = 32
	The integer bit size to use for SjLj based exception handling.

Detailed Description

Definition at line 29 of file ARMTargetMachine.h.

Constructor & Destructor Documentation

◆ ARMBaseTargetMachine()

ARMBaseTargetMachine::ARMBaseTargetMachine	(	const Target &	T,
		const Triple &	TT,
		StringRef	CPU,
		StringRef	FS,
		const TargetOptions &	Options,
		std::optional< Reloc::Model >	RM,
		std::optional< CodeModel::Model >	CM,
		CodeGenOptLevel	OL )

◆ ~ARMBaseTargetMachine()

ARMBaseTargetMachine::~ARMBaseTargetMachine ( )

overridedefault

References F.

Member Function Documentation

◆ convertFuncInfoToYAML()

yaml::MachineFunctionInfo * ARMBaseTargetMachine::convertFuncInfoToYAML ( const MachineFunction & MF ) const

overridevirtual

Allocate and initialize an instance of the YAML representation of the MachineFunctionInfo.

Reimplemented from llvm::TargetMachine.

Definition at line 559 of file ARMTargetMachine.cpp.

References llvm::MachineFunction::getInfo().

◆ createDefaultFuncInfoYAML()

yaml::MachineFunctionInfo * ARMBaseTargetMachine::createDefaultFuncInfoYAML ( ) const

overridevirtual

Allocate and return a default initialized instance of the YAML representation for the MachineFunctionInfo.

Reimplemented from llvm::TargetMachine.

Definition at line 554 of file ARMTargetMachine.cpp.

◆ createMachineFunctionInfo()

MachineFunctionInfo * ARMBaseTargetMachine::createMachineFunctionInfo	(	BumpPtrAllocator &	Allocator,
		const Function &	F,
		const TargetSubtargetInfo *	STI ) const

overridevirtual

Create the target's instance of MachineFunctionInfo.

Reimplemented from llvm::TargetMachine.

Definition at line 198 of file ARMTargetMachine.cpp.

References llvm::MachineFunctionInfo::create(), F, and llvm::TargetMachine::STI.

◆ createMachineScheduler()

ScheduleDAGInstrs * ARMBaseTargetMachine::createMachineScheduler ( MachineSchedContext * C ) const

overridevirtual

Create an instance of ScheduleDAGInstrs to be run within the standard MachineScheduler pass for this function and target at the current optimization level.

This can also be used to plug a new MachineSchedStrategy into an instance of the standard ScheduleDAGMI: return new ScheduleDAGMI(C, std::make_unique<MyStrategy>(C), /*RemoveKillFlags=*‍/false)

Return NULL to select the default (generic) machine scheduler.

Reimplemented from llvm::TargetMachine.

Definition at line 255 of file ARMTargetMachine.cpp.

References llvm::ScheduleDAGMI::addMutation(), llvm::CallingConv::C, llvm::createARMMacroFusionDAGMutation(), and llvm::createSchedLive().

◆ createPassConfig()

arm execution domain ARM Execution Domain false TargetPassConfig * ARMBaseTargetMachine::createPassConfig ( PassManagerBase & PM )

overridevirtual

Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of CodeGen passes.

createPassConfig - Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of CodeGen passes.

Targets may override this to extend TargetPassConfig.

Reimplemented from llvm::CodeGenTargetMachineImpl.

Definition at line 338 of file ARMTargetMachine.cpp.

References ARMBaseTargetMachine(), and createPassConfig().

Referenced by createPassConfig().

◆ createPostMachineScheduler()

ScheduleDAGInstrs * ARMBaseTargetMachine::createPostMachineScheduler ( MachineSchedContext * C ) const

overridevirtual

Similar to createMachineScheduler but used when postRA machine scheduling is enabled.

Reimplemented from llvm::TargetMachine.

Definition at line 265 of file ARMTargetMachine.cpp.

References llvm::ScheduleDAGMI::addMutation(), llvm::CallingConv::C, llvm::createARMLatencyMutations(), llvm::createARMMacroFusionDAGMutation(), llvm::createSchedPostRA(), and Mutation.

◆ getObjFileLowering()

TargetLoweringObjectFile * llvm::ARMBaseTargetMachine::getObjFileLowering ( ) const

inlineoverridevirtual

Reimplemented from llvm::TargetMachine.

Definition at line 60 of file ARMTargetMachine.h.

References TLOF.

◆ getSubtargetImpl() [1/2]

const ARMSubtarget * llvm::ARMBaseTargetMachine::getSubtargetImpl ( ) const

delete

◆ getSubtargetImpl() [2/2]

const ARMSubtarget * ARMBaseTargetMachine::getSubtargetImpl ( const Function & ) const

overridevirtual

Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInfo-derived member variable.

Reimplemented from llvm::TargetMachine.

Definition at line 206 of file ARMTargetMachine.cpp.

References F, llvm::Attribute::getValueAsString(), I, llvm::InnerAnalysisManagerProxy< AnalysisManagerT, IRUnitT, ExtraArgTs... >::Key, isLittle, llvm::Attribute::isValid(), llvm::TargetMachine::resetTargetOptions(), llvm::StringRef::str(), SubtargetMap, llvm::TargetMachine::TargetCPU, llvm::TargetMachine::TargetFS, and llvm::TargetMachine::TargetTriple.

◆ getTargetTransformInfo()

TargetTransformInfo ARMBaseTargetMachine::getTargetTransformInfo ( const Function & F ) const

overridevirtual

Return a TargetTransformInfo for a given function.

The returned TargetTransformInfo is specialized to the subtarget corresponding to F.

Reimplemented from llvm::TargetMachine.

Definition at line 250 of file ARMTargetMachine.cpp.

References F.

◆ isAAPCS16_ABI()

bool llvm::ARMBaseTargetMachine::isAAPCS16_ABI ( ) const

inline

Definition at line 74 of file ARMTargetMachine.h.

References llvm::ARM::ARM_ABI_AAPCS16, llvm::ARM::ARM_ABI_UNKNOWN, assert(), and TargetABI.

◆ isAAPCS_ABI()

bool llvm::ARMBaseTargetMachine::isAAPCS_ABI ( ) const

inline

Definition at line 69 of file ARMTargetMachine.h.

References llvm::ARM::ARM_ABI_AAPCS, llvm::ARM::ARM_ABI_AAPCS16, llvm::ARM::ARM_ABI_UNKNOWN, assert(), and TargetABI.

◆ isAPCS_ABI()

bool llvm::ARMBaseTargetMachine::isAPCS_ABI ( ) const

inline

Definition at line 64 of file ARMTargetMachine.h.

References llvm::ARM::ARM_ABI_APCS, llvm::ARM::ARM_ABI_UNKNOWN, assert(), and TargetABI.

◆ isLittleEndian()

bool llvm::ARMBaseTargetMachine::isLittleEndian ( ) const

inline

Definition at line 53 of file ARMTargetMachine.h.

References isLittle.

Referenced by ARMBaseTargetMachine(), and llvm::ARMAsmPrinter::PrintAsmOperand().

◆ isNoopAddrSpaceCast()

bool llvm::ARMBaseTargetMachine::isNoopAddrSpaceCast	(	unsigned	SrcAS,
		unsigned	DestAS ) const

inlineoverridevirtual

Returns true if a cast between SrcAS and DestAS is a noop.

Reimplemented from llvm::TargetMachine.

Definition at line 96 of file ARMTargetMachine.h.

◆ isTargetHardFloat()

bool llvm::ARMBaseTargetMachine::isTargetHardFloat ( ) const

inline

Definition at line 79 of file ARMTargetMachine.h.

References llvm::ARM::ARM_ABI_AAPCS16, llvm::Triple::ARMSubArch_v7em, llvm::Triple::EABIHF, llvm::Triple::GNUEABIHF, llvm::Triple::GNUEABIHFT64, llvm::Triple::MuslEABIHF, TargetABI, and llvm::TargetMachine::TargetTriple.

◆ parseMachineFunctionInfo()

bool ARMBaseTargetMachine::parseMachineFunctionInfo	(	const yaml::MachineFunctionInfo &	,
		PerFunctionMIParsingState &	PFS,
		SMDiagnostic &	Error,
		SMRange &	SourceRange ) const

overridevirtual

Parse out the target's MachineFunctionInfo from the YAML reprsentation.

Reimplemented from llvm::TargetMachine.

Definition at line 564 of file ARMTargetMachine.cpp.

References llvm::MachineFunction::getInfo(), and llvm::PerFunctionMIParsingState::MF.

◆ reset()

void ARMBaseTargetMachine::reset ( )

overrideprotectedvirtual

Reset internal state.

Reimplemented from llvm::CodeGenTargetMachineImpl.

Definition at line 573 of file ARMTargetMachine.cpp.

References SubtargetMap.

◆ targetSchedulesPostRAScheduling()

bool llvm::ARMBaseTargetMachine::targetSchedulesPostRAScheduling ( ) const

inlineoverridevirtual

True if subtarget inserts the final scheduling pass on its own.

Branch relaxation, which must happen after block placement, can on some targets (e.g. SystemZ) expose additional post-RA scheduling opportunities.

Reimplemented from llvm::TargetMachine.

Definition at line 89 of file ARMTargetMachine.h.

Member Data Documentation

◆ isLittle

bool llvm::ARMBaseTargetMachine::isLittle

protected

Definition at line 35 of file ARMTargetMachine.h.

Referenced by ARMBaseTargetMachine(), getSubtargetImpl(), and isLittleEndian().

◆ SubtargetMap

StringMap<std::unique_ptr<ARMSubtarget> > llvm::ARMBaseTargetMachine::SubtargetMap

mutableprotected

Definition at line 36 of file ARMTargetMachine.h.

Referenced by getSubtargetImpl(), and reset().

◆ TargetABI

ARM::ARMABI llvm::ARMBaseTargetMachine::TargetABI

Definition at line 31 of file ARMTargetMachine.h.

Referenced by ARMBaseTargetMachine(), llvm::ARMElfTargetObjectFile::Initialize(), isAAPCS16_ABI(), isAAPCS_ABI(), isAPCS_ABI(), and isTargetHardFloat().

◆ TLOF

std::unique_ptr<TargetLoweringObjectFile> llvm::ARMBaseTargetMachine::TLOF

protected

Definition at line 34 of file ARMTargetMachine.h.

Referenced by ARMBaseTargetMachine(), and getObjFileLowering().

The documentation for this class was generated from the following files:

lib/Target/ARM/ARMTargetMachine.h
lib/Target/ARM/ARMTargetMachine.cpp

Public Member Functions

Public Attributes

Protected Member Functions

Protected Attributes

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

◆ ARMBaseTargetMachine()

◆ ~ARMBaseTargetMachine()

Member Function Documentation

◆ convertFuncInfoToYAML()

◆ createDefaultFuncInfoYAML()

◆ createMachineFunctionInfo()

◆ createMachineScheduler()

◆ createPassConfig()

◆ createPostMachineScheduler()

◆ getObjFileLowering()

◆ getSubtargetImpl() [1/2]

◆ getSubtargetImpl() [2/2]

◆ getTargetTransformInfo()

◆ isAAPCS16_ABI()

◆ isAAPCS_ABI()

◆ isAPCS_ABI()

◆ isLittleEndian()

◆ isNoopAddrSpaceCast()

◆ isTargetHardFloat()

◆ parseMachineFunctionInfo()

◆ reset()

◆ targetSchedulesPostRAScheduling()

Member Data Documentation

◆ isLittle

◆ SubtargetMap

◆ TargetABI

◆ TLOF