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47 "disable-ppc-vsx-fma-mutation",
51 #define DEBUG_TYPE "ppc-vsx-fma-mutate"
53 namespace llvm {
namespace PPC {
122 if (!AddendMI || AddendMI->
getParent() !=
MI.getParent())
161 bool OtherUsers =
false, KillsAddendSrc =
false;
168 if (J->modifiesRegister(AddendSrcReg,
TRI) ||
169 J->killsRegister(AddendSrcReg,
TRI)) {
170 KillsAddendSrc =
true;
175 if (OtherUsers || KillsAddendSrc)
186 Register OldFMAReg =
MI.getOperand(0).getReg();
189 unsigned KilledProdOp = 0, OtherProdOp = 0;
193 && Reg2 != OldFMAReg) {
197 && Reg3 != OldFMAReg) {
218 Register KilledProdReg =
MI.getOperand(KilledProdOp).getReg();
219 Register OtherProdReg =
MI.getOperand(OtherProdOp).getReg();
222 unsigned KilledProdSubReg =
MI.getOperand(KilledProdOp).getSubReg();
223 unsigned OtherProdSubReg =
MI.getOperand(OtherProdOp).getSubReg();
226 bool KilledProdRegKill =
MI.getOperand(KilledProdOp).isKill();
227 bool OtherProdRegKill =
MI.getOperand(OtherProdOp).isKill();
230 bool KilledProdRegUndef =
MI.getOperand(KilledProdOp).isUndef();
231 bool OtherProdRegUndef =
MI.getOperand(OtherProdOp).isUndef();
242 "Addend copy not tied to old FMA output!");
246 MI.getOperand(0).setReg(KilledProdReg);
247 MI.getOperand(1).setReg(KilledProdReg);
248 MI.getOperand(3).setReg(AddendSrcReg);
250 MI.getOperand(0).setSubReg(KilledProdSubReg);
251 MI.getOperand(1).setSubReg(KilledProdSubReg);
254 MI.getOperand(1).setIsKill(KilledProdRegKill);
255 MI.getOperand(3).setIsKill(AddRegKill);
257 MI.getOperand(1).setIsUndef(KilledProdRegUndef);
258 MI.getOperand(3).setIsUndef(AddRegUndef);
260 MI.setDesc(
TII->get(AltOpc));
265 MI.getOperand(2).setReg(AddendSrcReg);
267 MI.getOperand(2).setIsKill(AddRegKill);
268 MI.getOperand(2).setIsUndef(AddRegUndef);
270 MI.getOperand(2).setReg(OtherProdReg);
271 MI.getOperand(2).setSubReg(OtherProdSubReg);
272 MI.getOperand(2).setIsKill(OtherProdRegKill);
273 MI.getOperand(2).setIsUndef(OtherProdRegUndef);
290 if (
UseMI == AddendMI)
300 for (
auto &AI : FMAInt) {
302 if (AI.valno == AddendValNo)
309 LiveInterval::Segment(AI.start, AI.end, NewFMAValNo));
319 unsigned Unit = *Units;
327 FMAInt.removeValNo(FMAValNo);
353 LIS = &getAnalysis<LiveIntervals>();
357 bool Changed =
false;
382 "PowerPC VSX FMA Mutation",
false,
false)
391 char PPCVSXFMAMutate::
ID = 0;
393 return new PPCVSXFMAMutate();
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder & UseMI
static cl::opt< bool > DisableVSXFMAMutate("disable-ppc-vsx-fma-mutation", cl::desc("Disable VSX FMA instruction mutation"), cl::init(true), cl::Hidden)
void initializePPCVSXFMAMutatePass(PassRegistry &)
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
MachineInstr * getInstructionFromIndex(SlotIndex index) const
Returns the instruction associated with the given index.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
SlotIndex def
The index of the defining instruction.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
reg_nodbg_iterator reg_nodbg_begin(Register RegNo) const
FunctionPass * createPPCVSXFMAMutatePass()
unsigned const TargetRegisterInfo * TRI
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
SlotIndex getInstructionIndex(const MachineInstr &Instr) const
Returns the base index of the given instruction.
std::pair< VNInfo *, bool > extendInBlock(ArrayRef< SlotIndex > Undefs, SlotIndex StartIdx, SlotIndex Kill)
Attempt to extend a value defined after StartIdx to include Use.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
bool contains(Register Reg) const
Return true if the specified register is included in this register class.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
bool liveAt(SlotIndex index) const
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const
Return the first index in the given basic block.
const MachineOperand & getOperand(unsigned i) const
iterator addSegment(Segment S)
Add the specified Segment to this range, merging segments as appropriate.
Represent the analysis usage information of a pass.
const HexagonInstrInfo * TII
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
MachineOperand class - Representation of each machine instruction operand.
const PPCInstrInfo * getInstrInfo() const override
LiveInterval - This class represents the liveness of a register, or stack slot.
VNInfo * valueIn() const
Return the value that is live-in to the instruction.
SlotIndex - An opaque wrapper around machine indexes.
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
static reg_nodbg_iterator reg_nodbg_end()
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
int getAltVSXFMAOpcode(uint16_t Opcode)
const TargetRegisterClass * getRegClass(Register Reg) const
Return the register class of the specified virtual register.
bool isVirtual() const
Return true if the specified register number is in the virtual register namespace.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void substVirtReg(Register Reg, unsigned SubIdx, const TargetRegisterInfo &)
substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg.
Representation of each machine instruction.
This class represents the liveness of a register, stack slot, etc.
INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
initializer< Ty > init(const Ty &Val)
iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)
Make a range that does early increment to allow mutation of the underlying range without disrupting i...
VNInfo * getNextValue(SlotIndex def, VNInfo::Allocator &VNInfoAllocator)
getNextValue - Create a new value number and return it.
LiveQueryResult Query(SlotIndex Idx) const
Query Liveness at Idx.
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Register getReg() const
getReg - Returns the register number.
MCRegister asMCReg() const
Utility to check-convert this value to a MCRegister.
SlotIndex getRegSlot(bool EC=false) const
Returns the register use/def slot in the current instruction for a normal or early-clobber def.
LiveInterval & getInterval(Register Reg)
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
INITIALIZE_PASS_BEGIN(PPCVSXFMAMutate, DEBUG_TYPE, "PowerPC VSX FMA Mutation", false, false) INITIALIZE_PASS_END(PPCVSXFMAMutate
const MachineBasicBlock * getParent() const
unsigned const MachineRegisterInfo * MRI
Wrapper class representing virtual and physical registers.
unsigned getSubReg() const
Function & getFunction()
Return the LLVM function that this machine code represents.
VNInfo - Value Number Information.
VNInfo * getVNInfoAt(SlotIndex Idx) const
getVNInfoAt - Return the VNInfo that is live at Idx, or NULL.
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
void RemoveMachineInstrFromMaps(MachineInstr &MI)
should just be implemented with a CLZ instruction Since there are other e PPC
const TargetRegisterClass * constrainRegClass(Register Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
constrainRegClass - Constrain the register class of the specified virtual register to be a common sub...
FunctionPass class - This class is used to implement most global optimizations.
AnalysisUsage & addRequired()
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
static const MachineInstrBuilder & AddSubReg(const MachineInstrBuilder &MIB, unsigned Reg, unsigned SubIdx, unsigned State, const TargetRegisterInfo *TRI)
bool isKill() const
Return true if the live-in value is killed by this instruction.
VNInfo::Allocator & getVNInfoAllocator()
LiveRange & getRegUnit(unsigned Unit)
Return the live range for register unit Unit.