PPCInstrInfo.h File Reference

#include "PPCRegisterInfo.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "PPCGenInstrInfo.inc"

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Classes
struct	llvm::ImmInstrInfo
struct	llvm::LoadImmediateInfo
class	llvm::PPCInstrInfo

Namespaces
	llvm
	This is an optimization pass for GlobalISel generic memory operations.
	llvm::PPCII
	PPCII - This namespace holds all of the PowerPC target-specific per-instruction flags.

Macros
#define	GET_INSTRINFO_HEADER
#define	NoInstr   PPC::INSTRUCTION_LIST_END
#define	Pwr8LoadOpcodes
#define	Pwr9LoadOpcodes
#define	Pwr10LoadOpcodes
#define	Pwr8StoreOpcodes
#define	Pwr9StoreOpcodes
#define	Pwr10StoreOpcodes
#define	StoreOpcodesForSpill   { Pwr8StoreOpcodes, Pwr9StoreOpcodes, Pwr10StoreOpcodes }
#define	LoadOpcodesForSpill   { Pwr8LoadOpcodes, Pwr9LoadOpcodes, Pwr10LoadOpcodes }

Enumerations
enum	{   llvm::PPCII::PPC970_First = 0x1, llvm::PPCII::PPC970_Single = 0x2, llvm::PPCII::PPC970_Cracked = 0x4, llvm::PPCII::PPC970_Shift = 3,   llvm::PPCII::PPC970_Mask = 0x07 << PPC970_Shift }
enum	llvm::PPCII::PPC970_Unit {   llvm::PPCII::PPC970_Pseudo = 0 << PPC970_Shift, llvm::PPCII::PPC970_FXU = 1 << PPC970_Shift, llvm::PPCII::PPC970_LSU = 2 << PPC970_Shift, llvm::PPCII::PPC970_FPU = 3 << PPC970_Shift,   llvm::PPCII::PPC970_CRU = 4 << PPC970_Shift, llvm::PPCII::PPC970_VALU = 5 << PPC970_Shift, llvm::PPCII::PPC970_VPERM = 6 << PPC970_Shift, llvm::PPCII::PPC970_BRU = 7 << PPC970_Shift }
enum	{ llvm::PPCII::NewDef_Shift = 6, llvm::PPCII::XFormMemOp = 0x1 << NewDef_Shift, llvm::PPCII::Prefixed = 0x1 << (NewDef_Shift+1) }
enum	llvm::SpillOpcodeKey {   llvm::SOK_Int4Spill, llvm::SOK_Int8Spill, llvm::SOK_Float8Spill, llvm::SOK_Float4Spill,   llvm::SOK_CRSpill, llvm::SOK_CRBitSpill, llvm::SOK_VRVectorSpill, llvm::SOK_VSXVectorSpill,   llvm::SOK_VectorFloat8Spill, llvm::SOK_VectorFloat4Spill, llvm::SOK_SpillToVSR, llvm::SOK_PairedVecSpill,   llvm::SOK_AccumulatorSpill, llvm::SOK_UAccumulatorSpill, llvm::SOK_SPESpill, llvm::SOK_PairedG8Spill,   llvm::SOK_LastOpcodeSpill }

Macro Definition Documentation

GET_INSTRINFO_HEADER

#define GET_INSTRINFO_HEADER

Definition at line 19 of file PPCInstrInfo.h.

LoadOpcodesForSpill

#define LoadOpcodesForSpill   { Pwr8LoadOpcodes, Pwr9LoadOpcodes, Pwr10LoadOpcodes }

Definition at line 187 of file PPCInstrInfo.h.

NoInstr

#define NoInstr   PPC::INSTRUCTION_LIST_END

Definition at line 135 of file PPCInstrInfo.h.

Pwr10LoadOpcodes

#define Pwr10LoadOpcodes

Value:

  {                                                                            \
    PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR,                    \
        PPC::RESTORE_CRBIT, PPC::LVX, PPC::LXV, PPC::DFLOADf64,                \
        PPC::DFLOADf32, PPC::SPILLTOVSR_LD, PPC::LXVP, PPC::RESTORE_ACC,       \
        PPC::RESTORE_UACC, NoInstr, PPC::RESTORE_QUADWORD                      \
  }

Definition at line 152 of file PPCInstrInfo.h.

Pwr10StoreOpcodes

#define Pwr10StoreOpcodes

Value:

  {                                                                            \
    PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, PPC::SPILL_CRBIT, \
        PPC::STVX, PPC::STXV, PPC::DFSTOREf64, PPC::DFSTOREf32,                \
        PPC::SPILLTOVSR_ST, PPC::STXVP, PPC::SPILL_ACC, PPC::SPILL_UACC,       \
        NoInstr, PPC::SPILL_QUADWORD                                           \
  }

Definition at line 176 of file PPCInstrInfo.h.

Pwr8LoadOpcodes

#define Pwr8LoadOpcodes

Value:

  {                                                                            \
    PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR,                    \
        PPC::RESTORE_CRBIT, PPC::LVX, PPC::LXVD2X, PPC::LXSDX, PPC::LXSSPX,    \
        PPC::SPILLTOVSR_LD, NoInstr, NoInstr, NoInstr, PPC::EVLDD,             \
        PPC::RESTORE_QUADWORD                                                  \
  }

Definition at line 136 of file PPCInstrInfo.h.

Pwr8StoreOpcodes

#define Pwr8StoreOpcodes

Value:

  {                                                                            \
    PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, PPC::SPILL_CRBIT, \
        PPC::STVX, PPC::STXVD2X, PPC::STXSDX, PPC::STXSSPX,                    \
        PPC::SPILLTOVSR_ST, NoInstr, NoInstr, NoInstr, PPC::EVSTDD,            \
        PPC::SPILL_QUADWORD                                                    \
  }

Definition at line 160 of file PPCInstrInfo.h.

Pwr9LoadOpcodes

#define Pwr9LoadOpcodes

Value:

  {                                                                            \
    PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR,                    \
        PPC::RESTORE_CRBIT, PPC::LVX, PPC::LXV, PPC::DFLOADf64,                \
        PPC::DFLOADf32, PPC::SPILLTOVSR_LD, NoInstr, NoInstr, NoInstr,         \
        NoInstr, PPC::RESTORE_QUADWORD                                         \
  }

Definition at line 144 of file PPCInstrInfo.h.

Pwr9StoreOpcodes

#define Pwr9StoreOpcodes

Value:

  {                                                                            \
    PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, PPC::SPILL_CRBIT, \
        PPC::STVX, PPC::STXV, PPC::DFSTOREf64, PPC::DFSTOREf32,                \
        PPC::SPILLTOVSR_ST, NoInstr, NoInstr, NoInstr, NoInstr,                \
        PPC::SPILL_QUADWORD                                                    \
  }

Definition at line 168 of file PPCInstrInfo.h.

StoreOpcodesForSpill

#define StoreOpcodesForSpill   { Pwr8StoreOpcodes, Pwr9StoreOpcodes, Pwr10StoreOpcodes }

Definition at line 185 of file PPCInstrInfo.h.