13 #ifndef LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H 14 #define LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H 29 #define GET_SUBTARGETINFO_HEADER 30 #include "PPCGenSubtargetInfo.inc" 219 void initializeEnvironment();
361 unsigned NumRegionInstrs)
const override;
362 bool useAA()
const override;
378 "Should only be called when the target uses descriptors.");
384 "Should only be called when the target uses descriptors.");
390 "Should only be called when the target uses descriptors.");
391 return IsPPC64 ? PPC::X11 : PPC::R11;
396 "Should only be called when the target is a TOC based ABI.");
401 return IsPPC64 ? PPC::X1 : PPC::R1;
unsigned descriptorEnvironmentPointerOffset() const
void overrideSchedPolicy(MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override
PPCSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const PPCTargetMachine &TM)
This constructor initializes the data members to match that of the specified triple.
const RegisterBankInfo * getRegBankInfo() const override
bool enableEarlyIfConversion() const override
Originally, this function return hasISEL().
Wrapper class representing physical registers. Should be passed by value.
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
This class represents lattice values for constants.
Align getPlatformStackAlignment() const
const SelectionDAGTargetInfo * getSelectionDAGInfo() const override
bool isPPC64() const
isPPC64 - Return true if we are generating code for 64-bit pointer mode.
bool hasPCRelativeMemops() const
Align getStackAlignment() const
getStackAlignment - Returns the minimum alignment known to hold of the stack frame on entry to the fu...
bool isOSBinFormatELF() const
Tests whether the OS uses the ELF binary format.
MCRegister getStackPointerRegister() const
Align StackAlignment
stackAlignment - The minimum alignment known to hold of the stack frame on entry to the function and ...
bool useAA() const override
bool useDFAforSMS() const override
Machine Pipeliner customization.
bool hasStoreFusion() const
std::unique_ptr< LegalizerInfo > Legalizer
bool isTargetLinux() const
bool needsTwoConstNR() const
bool hasAddisLoadFusion() const
Holds all the information related to register banks.
bool hasP10Vector() const
bool UsePPCPreRASchedStrategy
SelectionDAGTargetInfo TSInfo
bool hasDirectMove() const
void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS)
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
std::unique_ptr< InstructionSelector > InstSelector
bool is64BitELFABI() const
bool useSoftFloat() const
InstructionSelector * getInstructionSelector() const override
bool has64BitSupport() const
has64BitSupport - Return true if the selected CPU supports 64-bit instructions, regardless of whether...
unsigned descriptorTOCAnchorOffset() const
Itinerary data supplied by a subtarget to be used by a target.
const PPCTargetMachine & getTargetMachine() const
const LegalizerInfo * getLegalizerInfo() const override
InstrItineraryData InstrItins
Selected instruction itineraries (one entry per itinerary class.)
bool hasInvariantFunctionDescriptors() const
bool allowsUnalignedFPAccess() const
bool usesFunctionDescriptors() const
True if the ABI is descriptor based.
bool vectorsUseTwoUnits() const
bool isPredictableSelectIsExpensive() const
std::unique_ptr< CallLowering > CallLoweringInfo
GlobalISel related APIs.
bool enableSubRegLiveness() const override
AntiDepBreakMode getAntiDepBreakMode() const override
PPCSubtarget & initializeSubtargetDependencies(StringRef CPU, StringRef FS)
initializeSubtargetDependencies - Initializes using a CPU and feature string so that we can use initi...
bool HasInvariantFunctionDescriptors
PPCFrameLowering FrameLowering
const PPCFrameLowering * getFrameLowering() const override
bool hasPartwordAtomics() const
const PPCTargetLowering * getTargetLowering() const override
unsigned getCPUDirective() const
getCPUDirective - Returns the -m directive specified for the cpu.
Common code between 32-bit and 64-bit PowerPC targets.
bool isOSBinFormatMachO() const
Tests whether the environment is MachO.
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
bool PredictableSelectIsExpensive
bool isLittleEndian() const
const PPCTargetMachine & TM
This struct is a compact representation of a valid (non-zero power of two) alignment.
bool AllowsUnalignedFPAccess
Triple - Helper class for working with autoconf configuration names.
std::unique_ptr< RegisterBankInfo > RegBankInfo
bool isOSAIX() const
Tests whether the OS is AIX.
const PPCRegisterInfo * getRegisterInfo() const override
void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override
const PPCInstrInfo * getInstrInfo() const override
bool is32BitELFABI() const
bool isOSLinux() const
Tests whether the OS is Linux.
bool isFeatureMFTB() const
bool hasP8Altivec() const
bool UsePPCPostRASchedStrategy
bool hasP9Altivec() const
const CallLowering * getCallLowering() const override
unsigned getRedZoneSize() const
bool hasRecipPrec() const
Triple TargetTriple
TargetTriple - What processor and OS we're targeting.
bool useLongCalls() const
bool use64BitRegs() const
use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit registers in 32-bit mode when...
bool enableMachineScheduler() const override
Scheduling customization.
Provides the logic to select generic machine instructions.
Define a generic scheduling policy for targets that don't provide their own MachineSchedStrategy.
const InstrItineraryData * getInstrItineraryData() const override
getInstrItins - Return the instruction itineraries based on subtarget selection.
bool pairedVectorMemops() const
MCRegister getTOCPointerRegister() const
bool enableMachinePipeliner() const override
Pipeliner customization.
bool useCRBits() const
useCRBits - Return true if we should store and manipulate i1 values in the individual condition regis...
MCRegister getEnvironmentPointerRegister() const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool usePPCPostRASchedStrategy() const
POPCNTDKind hasPOPCNTD() const
bool needsSwapsForVSXMemOps() const
bool isTargetMachO() const
This file describes how to lower LLVM calls to machine code calls.
bool isUsingPCRelativeCalls() const
bool hasAddiLoadFusion() const
bool usePPCPreRASchedStrategy() const
StringRef - Represent a constant reference to a string, i.e.
bool isGVIndirectSymbol(const GlobalValue *GV) const
True if the GV will be accessed via an indirect symbol.
bool hasPrefixInstrs() const
bool isXRaySupported() const override
bool HasMFOCRF
Used by the ISel to turn in optimizations for POWER4-derived architectures.
unsigned CPUDirective
Which cpu directive was used.
const PPCRegisterInfo & getRegisterInfo() const
getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
const Triple & getTargetTriple() const
bool hasOnlyMSYNC() const
bool isDeprecatedDST() const
bool enablePostRAScheduler() const override
This overrides the PostRAScheduler bit in the SchedModel for each CPU.