13#ifndef LLVM_LIB_TARGET_POWERPC_PPCTARGETMACHINE_H 
   14#define LLVM_LIB_TARGET_POWERPC_PPCTARGETMACHINE_H 
   32  std::unique_ptr<TargetLoweringObjectFile> TLOF;
 
   35  mutable bool HasGlibcHWCAPAccess = 
false;
 
   42                   std::optional<Reloc::Model> 
RM,
 
 
CodeGenTargetMachineImpl(const Target &T, StringRef DataLayoutString, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOptLevel OL)
 
bool hasGlibcHWCAPAccess() const
 
ScheduleDAGInstrs * createPostMachineScheduler(MachineSchedContext *C) const override
Similar to createMachineScheduler but used when postRA machine scheduling is enabled.
 
TargetLoweringObjectFile * getObjFileLowering() const override
 
const PPCSubtarget * getSubtargetImpl() const =delete
 
~PPCTargetMachine() override
 
bool isLittleEndian() const
 
bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override
Returns true if a cast between SrcAS and DestAS is a noop.
 
PPCTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)
 
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
Get a TargetTransformInfo implementation for the target.
 
ScheduleDAGInstrs * createMachineScheduler(MachineSchedContext *C) const override
Create an instance of ScheduleDAGInstrs to be run within the standard MachineScheduler pass for this ...
 
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
 
int unqualifiedInlineAsmVariant() const override
The default variant to use in unqualified asm instructions.
 
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
 
void setGlibcHWCAPAccess(bool Val=true) const
 
A ScheduleDAG for scheduling lists of MachineInstr.
 
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
 
StringRef - Represent a constant reference to a string, i.e.
 
const Triple & getTargetTriple() const
 
std::unique_ptr< const MCSubtargetInfo > STI
 
Target-Independent Code Generator Pass Configuration Options.
 
TargetSubtargetInfo - Generic base class for all target subtargets.
 
Target - Wrapper for Target specific information.
 
Triple - Helper class for working with autoconf configuration names.
 
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
 
@ C
The default llvm calling convention, compatible with C.
 
This is an optimization pass for GlobalISel generic memory operations.
 
CodeGenOptLevel
Code generation optimization level.
 
BumpPtrAllocatorImpl<> BumpPtrAllocator
The standard BumpPtrAllocator which just uses the default template parameters.
 
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
 
MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...