LLVM 24.0.0git
PPCTargetMachine.h
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1//===-- PPCTargetMachine.h - Define TargetMachine for PowerPC ---*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the PowerPC specific subclass of TargetMachine.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_POWERPC_PPCTARGETMACHINE_H
14#define LLVM_LIB_TARGET_POWERPC_PPCTARGETMACHINE_H
15
16#include "PPCInstrInfo.h"
17#include "PPCSubtarget.h"
19#include "llvm/IR/DataLayout.h"
20#include <optional>
21
22namespace llvm {
23
24/// Common code between 32-bit and 64-bit PowerPC targets.
25///
27public:
29
30private:
31 std::unique_ptr<TargetLoweringObjectFile> TLOF;
32 Endian Endianness = Endian::NOT_DETECTED;
33 mutable bool HasGlibcHWCAPAccess = false;
34
35 mutable StringMap<std::unique_ptr<PPCSubtarget>> SubtargetMap;
36
37public:
38 PPCTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
40 std::optional<Reloc::Model> RM,
41 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
42 bool JIT);
43
45
46 const PPCSubtarget *getSubtargetImpl(const Function &F) const override;
47 // DO NOT IMPLEMENT: There is no such thing as a valid default subtarget,
48 // subtargets are per-function entities based on the target-specific
49 // attributes of each function.
50 const PPCSubtarget *getSubtargetImpl() const = delete;
51
52 // Pass Pipeline Configuration
54
56
58 return TLOF.get();
59 }
60
63 const TargetSubtargetInfo *STI) const override;
68
69 /// Compute the ABI variant for \p TT and \p ABIName (the "target-abi" module
70 /// flag), falling back to the triple default.
71 static PPCABI computeABI(const Triple &TT, StringRef ABIName);
72
73 bool hasGlibcHWCAPAccess() const { return HasGlibcHWCAPAccess; }
74 void setGlibcHWCAPAccess(bool Val = true) const { HasGlibcHWCAPAccess = Val; }
75 bool isPPC64() const {
76 const Triple &TT = getTargetTriple();
77 return (TT.getArch() == Triple::ppc64 || TT.getArch() == Triple::ppc64le);
78 };
79
80 bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override {
81 // Addrspacecasts are always noops.
82 return true;
83 }
84
85 bool isLittleEndian() const;
86
87 int unqualifiedInlineAsmVariant() const override { return 1; }
88};
89} // end namespace llvm
90
91#endif
static GCRegistry::Add< ShadowStackGC > C("shadow-stack", "Very portable GC for uncooperative code generators")
static LVOptions Options
Definition LVOptions.cpp:25
#define F(x, y, z)
Definition MD5.cpp:54
#define T
Basic Register Allocator
CodeGenTargetMachineImpl(const Target &T, StringRef DataLayoutString, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOptLevel OL)
static PPCABI computeABI(const Triple &TT, StringRef ABIName)
Compute the ABI variant for TT and ABIName (the "target-abi" module flag), falling back to the triple...
bool hasGlibcHWCAPAccess() const
ScheduleDAGInstrs * createPostMachineScheduler(MachineSchedContext *C) const override
Similar to createMachineScheduler but used when postRA machine scheduling is enabled.
TargetLoweringObjectFile * getObjFileLowering() const override
const PPCSubtarget * getSubtargetImpl() const =delete
~PPCTargetMachine() override
bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override
Returns true if a cast between SrcAS and DestAS is a noop.
PPCTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
Get a TargetTransformInfo implementation for the target.
ScheduleDAGInstrs * createMachineScheduler(MachineSchedContext *C) const override
Create an instance of ScheduleDAGInstrs to be run within the standard MachineScheduler pass for this ...
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
int unqualifiedInlineAsmVariant() const override
The default variant to use in unqualified asm instructions.
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
void setGlibcHWCAPAccess(bool Val=true) const
A ScheduleDAG for scheduling lists of MachineInstr.
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
Definition StringMap.h:129
Represent a constant reference to a string, i.e.
Definition StringRef.h:56
const Triple & getTargetTriple() const
std::unique_ptr< const MCSubtargetInfo > STI
Target-Independent Code Generator Pass Configuration Options.
TargetSubtargetInfo - Generic base class for all target subtargets.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition Triple.h:48
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
This is an optimization pass for GlobalISel generic memory operations.
CodeGenOptLevel
Code generation optimization level.
Definition CodeGen.h:227
BumpPtrAllocatorImpl<> BumpPtrAllocator
The standard BumpPtrAllocator which just uses the default template parameters.
Definition Allocator.h:390
PPCABI
The PowerPC ABI variant.
Definition PPC.h:103
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...