LLVM  15.0.0git
ARMTargetParser.h
Go to the documentation of this file.
1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements a target parser to recognise ARM hardware features
10 // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_SUPPORT_ARMTARGETPARSER_H
15 #define LLVM_SUPPORT_ARMTARGETPARSER_H
16 
17 #include "llvm/ADT/StringRef.h"
19 #include <vector>
20 
21 namespace llvm {
22 
23 class Triple;
24 
25 namespace ARM {
26 
27 // Arch extension modifiers for CPUs.
28 // Note that this is not the same as the AArch64 list
31  AEK_NONE = 1,
32  AEK_CRC = 1 << 1,
33  AEK_CRYPTO = 1 << 2,
34  AEK_FP = 1 << 3,
35  AEK_HWDIVTHUMB = 1 << 4,
36  AEK_HWDIVARM = 1 << 5,
37  AEK_MP = 1 << 6,
38  AEK_SIMD = 1 << 7,
39  AEK_SEC = 1 << 8,
40  AEK_VIRT = 1 << 9,
41  AEK_DSP = 1 << 10,
42  AEK_FP16 = 1 << 11,
43  AEK_RAS = 1 << 12,
44  AEK_DOTPROD = 1 << 13,
45  AEK_SHA2 = 1 << 14,
46  AEK_AES = 1 << 15,
47  AEK_FP16FML = 1 << 16,
48  AEK_SB = 1 << 17,
49  AEK_FP_DP = 1 << 18,
50  AEK_LOB = 1 << 19,
51  AEK_BF16 = 1 << 20,
52  AEK_I8MM = 1 << 21,
53  AEK_CDECP0 = 1 << 22,
54  AEK_CDECP1 = 1 << 23,
55  AEK_CDECP2 = 1 << 24,
56  AEK_CDECP3 = 1 << 25,
57  AEK_CDECP4 = 1 << 26,
58  AEK_CDECP5 = 1 << 27,
59  AEK_CDECP6 = 1 << 28,
60  AEK_CDECP7 = 1 << 29,
61  AEK_PACBTI = 1 << 30,
62  // Unsupported extensions.
63  AEK_OS = 1ULL << 59,
64  AEK_IWMMXT = 1ULL << 60,
65  AEK_IWMMXT2 = 1ULL << 61,
66  AEK_MAVERICK = 1ULL << 62,
67  AEK_XSCALE = 1ULL << 63,
68 };
69 
70 // List of Arch Extension names.
71 // FIXME: TableGen this.
72 struct ExtName {
73  const char *NameCStr;
74  size_t NameLength;
76  const char *Feature;
77  const char *NegFeature;
78 
80 };
81 
82 const ExtName ARCHExtNames[] = {
83 #define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \
84  {NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE},
85 #include "ARMTargetParser.def"
86 };
87 
88 // List of HWDiv names (use getHWDivSynonym) and which architectural
89 // features they correspond to (use getHWDivFeatures).
90 // FIXME: TableGen this.
91 const struct {
92  const char *NameCStr;
93  size_t NameLength;
95 
96  StringRef getName() const { return StringRef(NameCStr, NameLength); }
97 } HWDivNames[] = {
98 #define ARM_HW_DIV_NAME(NAME, ID) {NAME, sizeof(NAME) - 1, ID},
99 #include "ARMTargetParser.def"
100 };
101 
102 // Arch names.
103 enum class ArchKind {
104 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID,
105 #include "ARMTargetParser.def"
106 };
107 
108 // List of CPU names and their arches.
109 // The same CPU can have multiple arches and can be default on multiple arches.
110 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
111 // When this becomes table-generated, we'd probably need two tables.
112 // FIXME: TableGen this.
113 template <typename T> struct CpuNames {
114  const char *NameCStr;
115  size_t NameLength;
117  bool Default; // is $Name the default CPU for $ArchID ?
119 
121 };
122 
124 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
125  {NAME, sizeof(NAME) - 1, ARM::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT},
126 #include "ARMTargetParser.def"
127 };
128 
129 // FPU names.
130 enum FPUKind {
131 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND,
132 #include "ARMTargetParser.def"
134 };
135 
136 // FPU Version
137 enum class FPUVersion {
138  NONE,
139  VFPV2,
140  VFPV3,
141  VFPV3_FP16,
142  VFPV4,
143  VFPV5,
145 };
146 
147 // An FPU name restricts the FPU in one of three ways:
148 enum class FPURestriction {
149  None = 0, ///< No restriction
150  D16, ///< Only 16 D registers
151  SP_D16 ///< Only single-precision instructions, with 16 D registers
152 };
153 
154 // An FPU name implies one of three levels of Neon support:
155 enum class NeonSupportLevel {
156  None = 0, ///< No Neon
157  Neon, ///< Neon
158  Crypto ///< Neon with Crypto
159 };
160 
161 // ISA kinds.
162 enum class ISAKind { INVALID = 0, ARM, THUMB, AARCH64 };
163 
164 // Endianness
165 // FIXME: BE8 vs. BE32?
166 enum class EndianKind { INVALID = 0, LITTLE, BIG };
167 
168 // v6/v7/v8 Profile
169 enum class ProfileKind { INVALID = 0, A, R, M };
170 
171 // List of canonical FPU names (use getFPUSynonym) and which architectural
172 // features they correspond to (use getFPUFeatures).
173 // FIXME: TableGen this.
174 // The entries must appear in the order listed in ARM::FPUKind for correct
175 // indexing
176 struct FPUName {
177  const char *NameCStr;
178  size_t NameLength;
183 
185 };
186 
187 static const FPUName FPUNames[] = {
188 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \
189  {NAME, sizeof(NAME) - 1, KIND, VERSION, NEON_SUPPORT, RESTRICTION},
190 #include "llvm/Support/ARMTargetParser.def"
191 };
192 
193 // List of canonical arch names (use getArchSynonym).
194 // This table also provides the build attribute fields for CPU arch
195 // and Arch ID, according to the Addenda to the ARM ABI, chapters
196 // 2.4 and 2.3.5.2 respectively.
197 // FIXME: SubArch values were simplified to fit into the expectations
198 // of the triples and are not conforming with their official names.
199 // Check to see if the expectation should be changed.
200 // FIXME: TableGen this.
201 template <typename T> struct ArchNames {
202  const char *NameCStr;
203  size_t NameLength;
204  const char *CPUAttrCStr;
206  const char *SubArchCStr;
208  unsigned DefaultFPU;
210  T ID;
211  ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
212 
214 
215  // CPU class in build attributes.
217 
218  // Sub-Arch name.
220 };
221 
222 static const ArchNames<ArchKind> ARCHNames[] = {
223 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, \
224  ARCH_BASE_EXT) \
225  {NAME, sizeof(NAME) - 1, \
226  CPU_ATTR, sizeof(CPU_ATTR) - 1, \
227  SUB_ARCH, sizeof(SUB_ARCH) - 1, \
228  ARCH_FPU, ARCH_BASE_EXT, \
229  ArchKind::ID, ARCH_ATTR},
230 #include "llvm/Support/ARMTargetParser.def"
231 };
232 
233 // Information by ID
234 StringRef getFPUName(unsigned FPUKind);
238 
239 // FIXME: These should be moved to TargetTuple once it exists
240 bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
241 bool getHWDivFeatures(uint64_t HWDivKind, std::vector<StringRef> &Features);
242 bool getExtensionFeatures(uint64_t Extensions,
243  std::vector<StringRef> &Features);
244 
246 unsigned getArchAttr(ArchKind AK);
252  std::vector<StringRef> &Features,
253  unsigned &ArgFPUKind);
254 
255 // Information by Name
256 unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
262 
263 // Parser
265 unsigned parseFPU(StringRef FPU);
272 unsigned parseArchVersion(StringRef Arch);
273 
276 
277 } // namespace ARM
278 } // namespace llvm
279 
280 #endif
llvm::ARM::FPUVersion::VFPV5
@ VFPV5
llvm::ARM::FK_LAST
@ FK_LAST
Definition: ARMTargetParser.h:133
llvm::ARM::AEK_CDECP3
@ AEK_CDECP3
Definition: ARMTargetParser.h:56
llvm::ARM::ProfileKind::A
@ A
getName
static StringRef getName(Value *V)
Definition: ProvenanceAnalysisEvaluator.cpp:42
llvm::ARM::CpuNames::NameLength
size_t NameLength
Definition: ARMTargetParser.h:115
llvm::ARM::ExtName::NameCStr
const char * NameCStr
Definition: ARMTargetParser.h:73
llvm::ARM::EndianKind::BIG
@ BIG
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::ARM::ArchNames::NameLength
size_t NameLength
Definition: ARMTargetParser.h:203
llvm::ARM::NameCStr
const char * NameCStr
Definition: ARMTargetParser.h:92
llvm::ARM::EndianKind
EndianKind
Definition: ARMTargetParser.h:166
llvm::ARM::ID
uint64_t ID
Definition: ARMTargetParser.h:94
llvm::ARM::FPUKind
FPUKind
Definition: ARMTargetParser.h:130
llvm::ARM::getCanonicalArchName
StringRef getCanonicalArchName(StringRef Arch)
Definition: ARMTargetParser.cpp:295
llvm::ARM::AEK_VIRT
@ AEK_VIRT
Definition: ARMTargetParser.h:40
llvm::ARM::AEK_CDECP6
@ AEK_CDECP6
Definition: ARMTargetParser.h:59
llvm::ARM::ArchNames::NameCStr
const char * NameCStr
Definition: ARMTargetParser.h:202
llvm::ARM::FPUName
Definition: ARMTargetParser.h:176
llvm::ARM::FPURestriction
FPURestriction
Definition: ARMTargetParser.h:148
llvm::ARM::ISAKind::THUMB
@ THUMB
llvm::ARM::FPUName::getName
StringRef getName() const
Definition: ARMTargetParser.h:184
llvm::ARM::getArchName
StringRef getArchName(ArchKind AK)
Definition: ARMTargetParser.cpp:444
llvm::ARM::ArchNames::ArchBaseExtensions
uint64_t ArchBaseExtensions
Definition: ARMTargetParser.h:209
StringRef.h
llvm::ARM::AEK_FP
@ AEK_FP
Definition: ARMTargetParser.h:34
llvm::ARM::ARCHExtNames
const ExtName ARCHExtNames[]
Definition: ARMTargetParser.h:82
llvm::ARM::AEK_SIMD
@ AEK_SIMD
Definition: ARMTargetParser.h:38
llvm::ARM::ArchNames::SubArchLength
size_t SubArchLength
Definition: ARMTargetParser.h:207
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
llvm::ARM::parseArchProfile
ProfileKind parseArchProfile(StringRef Arch)
Definition: ARMTargetParser.cpp:98
llvm::ARM::FPUVersion::VFPV4
@ VFPV4
llvm::ARM::getArchSynonym
StringRef getArchSynonym(StringRef Arch)
Definition: ARMTargetParser.cpp:151
llvm::ARM::AEK_CDECP4
@ AEK_CDECP4
Definition: ARMTargetParser.h:57
llvm::ARM::ProfileKind::INVALID
@ INVALID
llvm::ARM::ArchExtKind
ArchExtKind
Definition: ARMTargetParser.h:29
llvm::ARM::ProfileKind
ProfileKind
Definition: ARMTargetParser.h:169
llvm::ARM::FPURestriction::SP_D16
@ SP_D16
Only single-precision instructions, with 16 D registers.
llvm::ARM::getCPUAttr
StringRef getCPUAttr(ArchKind AK)
Definition: ARMTargetParser.cpp:448
T
#define T
Definition: Mips16ISelLowering.cpp:341
llvm::ARM::getFPUFeatures
bool getFPUFeatures(unsigned FPUKind, std::vector< StringRef > &Features)
Definition: ARMTargetParser.cpp:183
llvm::ARM::FPUName::NeonSupport
NeonSupportLevel NeonSupport
Definition: ARMTargetParser.h:181
llvm::ARM::FPUNames
static const FPUName FPUNames[]
Definition: ARMTargetParser.h:187
llvm::ARM::fillValidCPUArchList
void fillValidCPUArchList(SmallVectorImpl< StringRef > &Values)
Definition: ARMTargetParser.cpp:599
llvm::ARM::ExtName::ID
uint64_t ID
Definition: ARMTargetParser.h:75
llvm::WinEH::EncodingType::ARM
@ ARM
Windows AXP64.
llvm::ARM::CpuNames::ArchID
T ArchID
Definition: ARMTargetParser.h:116
llvm::ARM::ExtName::getName
StringRef getName() const
Definition: ARMTargetParser.h:79
llvm::ARM::AEK_DSP
@ AEK_DSP
Definition: ARMTargetParser.h:41
llvm::ARM::AEK_CDECP0
@ AEK_CDECP0
Definition: ARMTargetParser.h:53
llvm::ARM::getArchAttr
unsigned getArchAttr(ArchKind AK)
Definition: ARMTargetParser.cpp:456
llvm::ARM::AEK_HWDIVTHUMB
@ AEK_HWDIVTHUMB
Definition: ARMTargetParser.h:35
llvm::ARM::AEK_RAS
@ AEK_RAS
Definition: ARMTargetParser.h:43
llvm::ARM::AEK_DOTPROD
@ AEK_DOTPROD
Definition: ARMTargetParser.h:44
llvm::ARM::AEK_I8MM
@ AEK_I8MM
Definition: ARMTargetParser.h:52
llvm::ARM::FPURestriction::None
@ None
No restriction.
llvm::ARM::CPUNames
const CpuNames< ArchKind > CPUNames[]
Definition: ARMTargetParser.h:123
llvm::ARM::ArchNames::CPUAttrCStr
const char * CPUAttrCStr
Definition: ARMTargetParser.h:204
llvm::ARM::HWDivNames
const struct llvm::ARM::@359 HWDivNames[]
llvm::ARM::AEK_LOB
@ AEK_LOB
Definition: ARMTargetParser.h:50
llvm::ARM::ARCHNames
static const ArchNames< ArchKind > ARCHNames[]
Definition: ARMTargetParser.h:222
llvm::ARM::AEK_SHA2
@ AEK_SHA2
Definition: ARMTargetParser.h:45
llvm::ARM::AEK_FP16
@ AEK_FP16
Definition: ARMTargetParser.h:42
llvm::ARM::FPUName::NameLength
size_t NameLength
Definition: ARMTargetParser.h:178
llvm::ARM::ExtName
Definition: ARMTargetParser.h:72
llvm::ARM::ExtName::Feature
const char * Feature
Definition: ARMTargetParser.h:76
llvm::ARM::parseCPUArch
ArchKind parseCPUArch(StringRef CPU)
Definition: ARMTargetParser.cpp:591
llvm::ARM::AEK_MP
@ AEK_MP
Definition: ARMTargetParser.h:37
llvm::ARM::AEK_BF16
@ AEK_BF16
Definition: ARMTargetParser.h:51
llvm::ARM::parseArch
ArchKind parseArch(StringRef Arch)
Definition: ARMTargetParser.cpp:28
llvm::ARM::getDefaultExtensions
uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK)
Definition: ARMTargetParser.cpp:396
llvm::ARM::ArchNames::DefaultFPU
unsigned DefaultFPU
Definition: ARMTargetParser.h:208
llvm::ARM::NeonSupportLevel
NeonSupportLevel
Definition: ARMTargetParser.h:155
llvm::ARM::appendArchExtFeatures
bool appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, StringRef ArchExt, std::vector< StringRef > &Features, unsigned &ArgFPUKind)
Definition: ARMTargetParser.cpp:515
llvm::ARM::parseArchEndian
EndianKind parseArchEndian(StringRef Arch)
Definition: ARMTargetParser.cpp:248
llvm::ARM::AEK_SB
@ AEK_SB
Definition: ARMTargetParser.h:48
llvm::ARM::AEK_INVALID
@ AEK_INVALID
Definition: ARMTargetParser.h:30
llvm::ARM::ArchNames::SubArchCStr
const char * SubArchCStr
Definition: ARMTargetParser.h:206
llvm::ARM::ArchNames::CPUAttrLength
size_t CPUAttrLength
Definition: ARMTargetParser.h:205
llvm::ARM::FPUName::FPUVer
FPUVersion FPUVer
Definition: ARMTargetParser.h:180
llvm::ARM::AEK_AES
@ AEK_AES
Definition: ARMTargetParser.h:46
llvm::ARM::AEK_HWDIVARM
@ AEK_HWDIVARM
Definition: ARMTargetParser.h:36
llvm::ARM::FPUVersion::VFPV5_FULLFP16
@ VFPV5_FULLFP16
llvm::ARM::FPUVersion::VFPV2
@ VFPV2
llvm::ARM::AEK_FP_DP
@ AEK_FP_DP
Definition: ARMTargetParser.h:49
llvm::ARM::NeonSupportLevel::Neon
@ Neon
Neon.
uint64_t
llvm::ARM::parseHWDiv
uint64_t parseHWDiv(StringRef HWDiv)
Definition: ARMTargetParser.cpp:574
llvm::ARM::AEK_SEC
@ AEK_SEC
Definition: ARMTargetParser.h:39
llvm::ARM::getFPUSynonym
StringRef getFPUSynonym(StringRef FPU)
Definition: ARMTargetParser.cpp:350
llvm::ARM::AEK_XSCALE
@ AEK_XSCALE
Definition: ARMTargetParser.h:67
llvm::ARM::CpuNames
Definition: ARMTargetParser.h:113
llvm::ARM::FPURestriction::D16
@ D16
Only 16 D registers.
llvm::ARM::AEK_NONE
@ AEK_NONE
Definition: ARMTargetParser.h:31
llvm::ARM::FPUVersion::VFPV3
@ VFPV3
llvm::ARM::parseArchVersion
unsigned parseArchVersion(StringRef Arch)
Definition: ARMTargetParser.cpp:39
llvm::ARM::AEK_CRC
@ AEK_CRC
Definition: ARMTargetParser.h:32
llvm::ARM::NeonSupportLevel::Crypto
@ Crypto
Neon with Crypto.
llvm::ARM::ExtName::NegFeature
const char * NegFeature
Definition: ARMTargetParser.h:77
llvm::ARM::getDefaultFPU
unsigned getDefaultFPU(StringRef CPU, ArchKind AK)
Definition: ARMTargetParser.cpp:385
llvm::ARM::CpuNames::getName
StringRef getName() const
Definition: ARMTargetParser.h:120
llvm::ARM::AEK_FP16FML
@ AEK_FP16FML
Definition: ARMTargetParser.h:47
llvm::ARM::FPUVersion::NONE
@ NONE
llvm::ARM::AEK_CDECP7
@ AEK_CDECP7
Definition: ARMTargetParser.h:60
llvm::ARM::getSubArch
StringRef getSubArch(ArchKind AK)
Definition: ARMTargetParser.cpp:452
llvm::ARM::EndianKind::LITTLE
@ LITTLE
llvm::ARM::AEK_CDECP2
@ AEK_CDECP2
Definition: ARMTargetParser.h:55
llvm::ARM::AEK_CRYPTO
@ AEK_CRYPTO
Definition: ARMTargetParser.h:33
llvm::ARM::ISAKind
ISAKind
Definition: ARMTargetParser.h:162
llvm::ARM::ISAKind::INVALID
@ INVALID
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::ARM::parseArchISA
ISAKind parseArchISA(StringRef Arch)
Definition: ARMTargetParser.cpp:267
llvm::ARM::AEK_CDECP1
@ AEK_CDECP1
Definition: ARMTargetParser.h:54
llvm::ARM::ArchNames::ArchAttr
ARMBuildAttrs::CPUArch ArchAttr
Definition: ARMTargetParser.h:211
llvm::ARM::CpuNames::Default
bool Default
Definition: ARMTargetParser.h:117
llvm::ARM::ProfileKind::R
@ R
llvm::ARM::getHWDivFeatures
bool getHWDivFeatures(uint64_t HWDivKind, std::vector< StringRef > &Features)
Definition: ARMTargetParser.cpp:409
llvm::ARM::getFPUNeonSupportLevel
NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind)
Definition: ARMTargetParser.cpp:285
llvm::ARM::AEK_IWMMXT2
@ AEK_IWMMXT2
Definition: ARMTargetParser.h:65
llvm::ARM::getDefaultCPU
StringRef getDefaultCPU(StringRef Arch)
Definition: ARMTargetParser.cpp:559
llvm::ARM::getExtensionFeatures
bool getExtensionFeatures(uint64_t Extensions, std::vector< StringRef > &Features)
Definition: ARMTargetParser.cpp:428
llvm::ARM::ArchKind
ArchKind
Definition: ARMTargetParser.h:103
llvm::ARM::FPUName::ID
FPUKind ID
Definition: ARMTargetParser.h:179
llvm::ARM::NeonSupportLevel::None
@ None
No Neon.
llvm::ARM::parseFPU
unsigned parseFPU(StringRef FPU)
Definition: ARMTargetParser.cpp:276
llvm::ARM::FPUVersion::VFPV3_FP16
@ VFPV3_FP16
llvm::ARM::EndianKind::INVALID
@ INVALID
llvm::ARM::ArchNames::getCPUAttr
StringRef getCPUAttr() const
Definition: ARMTargetParser.h:216
llvm::ARM::AEK_CDECP5
@ AEK_CDECP5
Definition: ARMTargetParser.h:58
llvm::ARM::getFPURestriction
FPURestriction getFPURestriction(unsigned FPUKind)
Definition: ARMTargetParser.cpp:379
llvm::ARM::AEK_OS
@ AEK_OS
Definition: ARMTargetParser.h:63
ARMBuildAttributes.h
llvm::ARM::ISAKind::ARM
@ ARM
llvm::ARM::ExtName::NameLength
size_t NameLength
Definition: ARMTargetParser.h:74
llvm::ARM::ArchNames
Definition: ARMTargetParser.h:201
llvm::ARM::getFPUName
StringRef getFPUName(unsigned FPUKind)
Definition: ARMTargetParser.cpp:367
llvm::ARM::getFPUVersion
FPUVersion getFPUVersion(unsigned FPUKind)
Definition: ARMTargetParser.cpp:373
llvm::ARM::CpuNames::DefaultExtensions
uint64_t DefaultExtensions
Definition: ARMTargetParser.h:118
llvm::ARM::CpuNames::NameCStr
const char * NameCStr
Definition: ARMTargetParser.h:114
llvm::ARM::ProfileKind::M
@ M
llvm::ARM::NameLength
size_t NameLength
Definition: ARMTargetParser.h:93
llvm::ARM::computeDefaultTargetABI
StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU)
Definition: ARMTargetParser.cpp:606
llvm::ARM::parseArchExt
uint64_t parseArchExt(StringRef ArchExt)
Definition: ARMTargetParser.cpp:583
llvm::ARM::ArchNames::ID
T ID
Definition: ARMTargetParser.h:210
llvm::ARM::ArchNames::getName
StringRef getName() const
Definition: ARMTargetParser.h:213
llvm::ARM::AEK_IWMMXT
@ AEK_IWMMXT
Definition: ARMTargetParser.h:64
llvm::ARM::FPUName::NameCStr
const char * NameCStr
Definition: ARMTargetParser.h:177
llvm::SmallVectorImpl< StringRef >
llvm::ARMBuildAttrs::CPUArch
CPUArch
Definition: ARMBuildAttributes.h:92
llvm::ARM::FPUName::Restriction
FPURestriction Restriction
Definition: ARMTargetParser.h:182
llvm::ARM::ISAKind::AARCH64
@ AARCH64
llvm::ARM::getArchExtFeature
StringRef getArchExtFeature(StringRef ArchExt)
Definition: ARMTargetParser.cpp:476
llvm::ARM::AEK_MAVERICK
@ AEK_MAVERICK
Definition: ARMTargetParser.h:66
llvm::ARM::ArchNames::getSubArch
StringRef getSubArch() const
Definition: ARMTargetParser.h:219
llvm::ARM::AEK_PACBTI
@ AEK_PACBTI
Definition: ARMTargetParser.h:61
llvm::ARM::FPUVersion
FPUVersion
Definition: ARMTargetParser.h:137
llvm::ARM::getArchExtName
StringRef getArchExtName(uint64_t ArchExtKind)
Definition: ARMTargetParser.cpp:460