ARMTargetParser.h File Reference

#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/ARMBuildAttributes.h"
#include <vector>
#include "ARMTargetParser.def"
#include "llvm/Support/ARMTargetParser.def"

Include dependency graph for ARMTargetParser.h:

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Go to the source code of this file.

Classes
struct	llvm::ARM::ExtName
struct	llvm::ARM::CpuNames< T >
struct	llvm::ARM::FPUName
struct	llvm::ARM::ArchNames< T >

Namespaces
	llvm
	This is an optimization pass for GlobalISel generic memory operations.
	llvm::ARM
	Define some predicates that are used for node matching.

Macros
#define	ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE)   {NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE},
#define	ARM_HW_DIV_NAME(NAME, ID)   {NAME, sizeof(NAME) - 1, ID},
#define	ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT)   ID,
#define	ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)   {NAME, sizeof(NAME) - 1, ARM::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT},
#define	ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION)   KIND,
#define	ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION)   {NAME, sizeof(NAME) - 1, KIND, VERSION, NEON_SUPPORT, RESTRICTION},
#define	ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT)

Enumerations
enum	llvm::ARM::ArchExtKind : uint64_t {   llvm::ARM::AEK_INVALID = 0, llvm::ARM::AEK_NONE = 1, llvm::ARM::AEK_CRC = 1 << 1, llvm::ARM::AEK_CRYPTO = 1 << 2,   llvm::ARM::AEK_FP = 1 << 3, llvm::ARM::AEK_HWDIVTHUMB = 1 << 4, llvm::ARM::AEK_HWDIVARM = 1 << 5, llvm::ARM::AEK_MP = 1 << 6,   llvm::ARM::AEK_SIMD = 1 << 7, llvm::ARM::AEK_SEC = 1 << 8, llvm::ARM::AEK_VIRT = 1 << 9, llvm::ARM::AEK_DSP = 1 << 10,   llvm::ARM::AEK_FP16 = 1 << 11, llvm::ARM::AEK_RAS = 1 << 12, llvm::ARM::AEK_DOTPROD = 1 << 13, llvm::ARM::AEK_SHA2 = 1 << 14,   llvm::ARM::AEK_AES = 1 << 15, llvm::ARM::AEK_FP16FML = 1 << 16, llvm::ARM::AEK_SB = 1 << 17, llvm::ARM::AEK_FP_DP = 1 << 18,   llvm::ARM::AEK_LOB = 1 << 19, llvm::ARM::AEK_BF16 = 1 << 20, llvm::ARM::AEK_I8MM = 1 << 21, llvm::ARM::AEK_CDECP0 = 1 << 22,   llvm::ARM::AEK_CDECP1 = 1 << 23, llvm::ARM::AEK_CDECP2 = 1 << 24, llvm::ARM::AEK_CDECP3 = 1 << 25, llvm::ARM::AEK_CDECP4 = 1 << 26,   llvm::ARM::AEK_CDECP5 = 1 << 27, llvm::ARM::AEK_CDECP6 = 1 << 28, llvm::ARM::AEK_CDECP7 = 1 << 29, llvm::ARM::AEK_PACBTI = 1 << 30,   llvm::ARM::AEK_OS = 1ULL << 59, llvm::ARM::AEK_IWMMXT = 1ULL << 60, llvm::ARM::AEK_IWMMXT2 = 1ULL << 61, llvm::ARM::AEK_MAVERICK = 1ULL << 62,   llvm::ARM::AEK_XSCALE = 1ULL << 63 }
enum	llvm::ARM::ArchKind { llvm::ARM::ArchKind::ARM_ARCH }
enum	llvm::ARM::FPUKind { llvm::ARM::FK_LAST }
enum	llvm::ARM::FPUVersion {   llvm::ARM::FPUVersion::NONE, llvm::ARM::FPUVersion::VFPV2, llvm::ARM::FPUVersion::VFPV3, llvm::ARM::FPUVersion::VFPV3_FP16,   llvm::ARM::FPUVersion::VFPV4, llvm::ARM::FPUVersion::VFPV5, llvm::ARM::FPUVersion::VFPV5_FULLFP16 }
enum	llvm::ARM::FPURestriction { llvm::ARM::FPURestriction::None = 0, llvm::ARM::FPURestriction::D16, llvm::ARM::FPURestriction::SP_D16 }
enum	llvm::ARM::NeonSupportLevel { llvm::ARM::NeonSupportLevel::None = 0, llvm::ARM::NeonSupportLevel::Neon, llvm::ARM::NeonSupportLevel::Crypto }
enum	llvm::ARM::ISAKind { llvm::ARM::ISAKind::INVALID = 0, llvm::ARM::ISAKind::ARM, llvm::ARM::ISAKind::THUMB, llvm::ARM::ISAKind::AARCH64 }
enum	llvm::ARM::EndianKind { llvm::ARM::EndianKind::INVALID = 0, llvm::ARM::EndianKind::LITTLE, llvm::ARM::EndianKind::BIG }
enum	llvm::ARM::ProfileKind { llvm::ARM::ProfileKind::INVALID = 0, llvm::ARM::ProfileKind::A, llvm::ARM::ProfileKind::R, llvm::ARM::ProfileKind::M }

Functions
StringRef	llvm::ARM::getFPUName (unsigned FPUKind)
FPUVersion	llvm::ARM::getFPUVersion (unsigned FPUKind)
NeonSupportLevel	llvm::ARM::getFPUNeonSupportLevel (unsigned FPUKind)
FPURestriction	llvm::ARM::getFPURestriction (unsigned FPUKind)
bool	llvm::ARM::getFPUFeatures (unsigned FPUKind, std::vector< StringRef > &Features)
bool	llvm::ARM::getHWDivFeatures (uint64_t HWDivKind, std::vector< StringRef > &Features)
bool	llvm::ARM::getExtensionFeatures (uint64_t Extensions, std::vector< StringRef > &Features)
StringRef	llvm::ARM::getArchName (ArchKind AK)
unsigned	llvm::ARM::getArchAttr (ArchKind AK)
StringRef	llvm::ARM::getCPUAttr (ArchKind AK)
StringRef	llvm::ARM::getSubArch (ArchKind AK)
StringRef	llvm::ARM::getArchExtName (uint64_t ArchExtKind)
StringRef	llvm::ARM::getArchExtFeature (StringRef ArchExt)
bool	llvm::ARM::appendArchExtFeatures (StringRef CPU, ARM::ArchKind AK, StringRef ArchExt, std::vector< StringRef > &Features, unsigned &ArgFPUKind)
unsigned	llvm::ARM::getDefaultFPU (StringRef CPU, ArchKind AK)
uint64_t	llvm::ARM::getDefaultExtensions (StringRef CPU, ArchKind AK)
StringRef	llvm::ARM::getDefaultCPU (StringRef Arch)
StringRef	llvm::ARM::getCanonicalArchName (StringRef Arch)
StringRef	llvm::ARM::getFPUSynonym (StringRef FPU)
StringRef	llvm::ARM::getArchSynonym (StringRef Arch)
uint64_t	llvm::ARM::parseHWDiv (StringRef HWDiv)
unsigned	llvm::ARM::parseFPU (StringRef FPU)
ArchKind	llvm::ARM::parseArch (StringRef Arch)
uint64_t	llvm::ARM::parseArchExt (StringRef ArchExt)
ArchKind	llvm::ARM::parseCPUArch (StringRef CPU)
ISAKind	llvm::ARM::parseArchISA (StringRef Arch)
EndianKind	llvm::ARM::parseArchEndian (StringRef Arch)
ProfileKind	llvm::ARM::parseArchProfile (StringRef Arch)
unsigned	llvm::ARM::parseArchVersion (StringRef Arch)
void	llvm::ARM::fillValidCPUArchList (SmallVectorImpl< StringRef > &Values)
StringRef	llvm::ARM::computeDefaultTargetABI (const Triple &TT, StringRef CPU)

Variables
const ExtName	llvm::ARM::ARCHExtNames []
struct {
const char *   llvm::ARM::NameCStr
size_t   llvm::ARM::NameLength
uint64_t   llvm::ARM::ID
}	llvm::ARM::HWDivNames []
const CpuNames< ArchKind >	llvm::ARM::CPUNames []
static const FPUName	llvm::ARM::FPUNames []
static const ArchNames< ArchKind >	llvm::ARM::ARCHNames []

Macro Definition Documentation

ARM_ARCH [1/2]

#define ARM_ARCH	(		NAME,
			ID,
			CPU_ATTR,
			SUB_ARCH,
			ARCH_ATTR,
			ARCH_FPU,
			ARCH_BASE_EXT
	)		ID,

Definition at line 105 of file ARMTargetParser.h.

ARM_ARCH [2/2]

#define ARM_ARCH	(		NAME,
			ID,
			CPU_ATTR,
			SUB_ARCH,
			ARCH_ATTR,
			ARCH_FPU,
			ARCH_BASE_EXT
	)

Value:

  {NAME,         sizeof(NAME) - 1,                                             \
   CPU_ATTR,     sizeof(CPU_ATTR) - 1,                                         \
   SUB_ARCH,     sizeof(SUB_ARCH) - 1,                                         \
   ARCH_FPU,     ARCH_BASE_EXT,                                                \
   ArchKind::ID, ARCH_ATTR},

Definition at line 105 of file ARMTargetParser.h.

ARM_ARCH_EXT_NAME

#define ARM_ARCH_EXT_NAME	(		NAME,
			ID,
			FEATURE,
			NEGFEATURE
	)		{NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE},

ARM_CPU_NAME

#define ARM_CPU_NAME	(		NAME,
			ID,
			DEFAULT_FPU,
			IS_DEFAULT,
			DEFAULT_EXT
	)		{NAME, sizeof(NAME) - 1, ARM::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT},

ARM_FPU [1/2]

#define ARM_FPU	(		NAME,
			KIND,
			VERSION,
			NEON_SUPPORT,
			RESTRICTION
	)		KIND,

Definition at line 132 of file ARMTargetParser.h.

ARM_FPU [2/2]

#define ARM_FPU	(		NAME,
			KIND,
			VERSION,
			NEON_SUPPORT,
			RESTRICTION
	)		{NAME, sizeof(NAME) - 1, KIND, VERSION, NEON_SUPPORT, RESTRICTION},

Definition at line 132 of file ARMTargetParser.h.

ARM_HW_DIV_NAME

#define ARM_HW_DIV_NAME	(		NAME,
			ID
	)		{NAME, sizeof(NAME) - 1, ID},