Go to the documentation of this file.
23 .
Case(
"thumb,arm",
"arm,thumb")
32 if (A.getName().endswith(Syn))
35 return ArchKind::INVALID;
43 case ArchKind::ARMV2A:
46 case ArchKind::ARMV3M:
49 case ArchKind::ARMV4T:
51 case ArchKind::ARMV5T:
52 case ArchKind::ARMV5TE:
53 case ArchKind::IWMMXT:
54 case ArchKind::IWMMXT2:
55 case ArchKind::XSCALE:
56 case ArchKind::ARMV5TEJ:
59 case ArchKind::ARMV6K:
60 case ArchKind::ARMV6T2:
61 case ArchKind::ARMV6KZ:
62 case ArchKind::ARMV6M:
64 case ArchKind::ARMV7A:
65 case ArchKind::ARMV7VE:
66 case ArchKind::ARMV7R:
67 case ArchKind::ARMV7M:
68 case ArchKind::ARMV7S:
69 case ArchKind::ARMV7EM:
70 case ArchKind::ARMV7K:
72 case ArchKind::ARMV8A:
73 case ArchKind::ARMV8_1A:
74 case ArchKind::ARMV8_2A:
75 case ArchKind::ARMV8_3A:
76 case ArchKind::ARMV8_4A:
77 case ArchKind::ARMV8_5A:
78 case ArchKind::ARMV8_6A:
79 case ArchKind::ARMV8_7A:
80 case ArchKind::ARMV8_8A:
81 case ArchKind::ARMV8R:
82 case ArchKind::ARMV8MBaseline:
83 case ArchKind::ARMV8MMainline:
84 case ArchKind::ARMV8_1MMainline:
86 case ArchKind::ARMV9A:
87 case ArchKind::ARMV9_1A:
88 case ArchKind::ARMV9_2A:
89 case ArchKind::ARMV9_3A:
91 case ArchKind::INVALID:
101 case ArchKind::ARMV6M:
102 case ArchKind::ARMV7M:
103 case ArchKind::ARMV7EM:
104 case ArchKind::ARMV8MMainline:
105 case ArchKind::ARMV8MBaseline:
106 case ArchKind::ARMV8_1MMainline:
108 case ArchKind::ARMV7R:
109 case ArchKind::ARMV8R:
111 case ArchKind::ARMV7A:
112 case ArchKind::ARMV7VE:
113 case ArchKind::ARMV7K:
114 case ArchKind::ARMV8A:
115 case ArchKind::ARMV8_1A:
116 case ArchKind::ARMV8_2A:
117 case ArchKind::ARMV8_3A:
118 case ArchKind::ARMV8_4A:
119 case ArchKind::ARMV8_5A:
120 case ArchKind::ARMV8_6A:
121 case ArchKind::ARMV8_7A:
122 case ArchKind::ARMV8_8A:
123 case ArchKind::ARMV9A:
124 case ArchKind::ARMV9_1A:
125 case ArchKind::ARMV9_2A:
126 case ArchKind::ARMV9_3A:
128 case ArchKind::ARMV2:
129 case ArchKind::ARMV2A:
130 case ArchKind::ARMV3:
131 case ArchKind::ARMV3M:
132 case ArchKind::ARMV4:
133 case ArchKind::ARMV4T:
134 case ArchKind::ARMV5T:
135 case ArchKind::ARMV5TE:
136 case ArchKind::ARMV5TEJ:
137 case ArchKind::ARMV6:
138 case ArchKind::ARMV6K:
139 case ArchKind::ARMV6T2:
140 case ArchKind::ARMV6KZ:
141 case ArchKind::ARMV7S:
142 case ArchKind::IWMMXT:
143 case ArchKind::IWMMXT2:
144 case ArchKind::XSCALE:
145 case ArchKind::INVALID:
146 return ProfileKind::INVALID;
157 .
Cases(
"v6m",
"v6sm",
"v6s-m",
"v6-m")
158 .
Cases(
"v6z",
"v6zk",
"v6kz")
159 .
Cases(
"v7",
"v7a",
"v7hl",
"v7l",
"v7-a")
162 .
Case(
"v7em",
"v7e-m")
163 .
Cases(
"v8",
"v8a",
"v8l",
"aarch64",
"arm64",
"v8-a")
164 .
Case(
"v8.1a",
"v8.1-a")
165 .
Case(
"v8.2a",
"v8.2-a")
166 .
Case(
"v8.3a",
"v8.3-a")
167 .
Case(
"v8.4a",
"v8.4-a")
168 .
Case(
"v8.5a",
"v8.5-a")
169 .
Case(
"v8.6a",
"v8.6-a")
170 .
Case(
"v8.7a",
"v8.7-a")
171 .
Case(
"v8.8a",
"v8.8-a")
173 .
Cases(
"v9",
"v9a",
"v9-a")
174 .
Case(
"v9.1a",
"v9.1-a")
175 .
Case(
"v9.2a",
"v9.2-a")
176 .
Case(
"v9.3a",
"v9.3-a")
177 .
Case(
"v8m.base",
"v8-m.base")
178 .
Case(
"v8m.main",
"v8-m.main")
179 .
Case(
"v8.1m.main",
"v8.1-m.main")
188 static const struct FPUFeatureNameInfo {
189 const char *PlusName, *MinusName;
192 } FPUFeatureInfoList[] = {
200 {
"+vfp2",
"-vfp2", FPUVersion::VFPV2, FPURestriction::D16},
201 {
"+vfp2sp",
"-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16},
203 {
"+vfp3d16",
"-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16},
204 {
"+vfp3d16sp",
"-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16},
206 {
"+fp16",
"-fp16", FPUVersion::VFPV3_FP16, FPURestriction::SP_D16},
208 {
"+vfp4d16",
"-vfp4d16", FPUVersion::VFPV4, FPURestriction::D16},
209 {
"+vfp4d16sp",
"-vfp4d16sp", FPUVersion::VFPV4, FPURestriction::SP_D16},
212 {
"+fp-armv8d16",
"-fp-armv8d16", FPUVersion::VFPV5, FPURestriction::D16},
213 {
"+fp-armv8d16sp",
"-fp-armv8d16sp", FPUVersion::VFPV5, FPURestriction::SP_D16},
215 {
"+fullfp16",
"-fullfp16", FPUVersion::VFPV5_FULLFP16, FPURestriction::SP_D16},
216 {
"+fp64",
"-fp64", FPUVersion::VFPV2, FPURestriction::D16},
220 for (
const auto &
Info: FPUFeatureInfoList) {
223 Features.push_back(
Info.PlusName);
225 Features.push_back(
Info.MinusName);
228 static const struct NeonFeatureNameInfo {
229 const char *PlusName, *MinusName;
231 } NeonFeatureInfoList[] = {
232 {
"+neon",
"-neon", NeonSupportLevel::Neon},
233 {
"+sha2",
"-sha2", NeonSupportLevel::Crypto},
234 {
"+aes",
"-aes", NeonSupportLevel::Crypto},
237 for (
const auto &
Info: NeonFeatureInfoList) {
239 Features.push_back(
Info.PlusName);
241 Features.push_back(
Info.MinusName);
251 return EndianKind::BIG;
255 return EndianKind::BIG;
257 return EndianKind::LITTLE;
261 return EndianKind::LITTLE;
263 return EndianKind::INVALID;
279 if (Syn ==
F.getName())
301 if (A.startswith(
"arm64_32"))
303 else if (A.startswith(
"arm64e"))
305 else if (A.startswith(
"arm64"))
307 else if (A.startswith(
"aarch64_32"))
309 else if (A.startswith(
"arm"))
311 else if (A.startswith(
"thumb"))
313 else if (A.startswith(
"aarch64")) {
316 if (A.contains(
"eb"))
318 if (A.substr(offset, 3) ==
"_be")
326 else if (A.endswith(
"eb"))
327 A = A.substr(0, A.size() - 2);
330 A = A.substr(offset);
339 if (A.size() >= 2 && (A[0] !=
'v' || !std::isdigit(A[1])))
342 if (A.contains(
"eb"))
352 .
Cases(
"fpa",
"fpe2",
"fpe3",
"maverick",
"invalid")
353 .
Case(
"vfp2",
"vfpv2")
354 .
Case(
"vfp3",
"vfpv3")
355 .
Case(
"vfp4",
"vfpv4")
356 .
Case(
"vfp3-d16",
"vfpv3-d16")
357 .
Case(
"vfp4-d16",
"vfpv4-d16")
358 .
Cases(
"fp4-sp-d16",
"vfpv4-sp-d16",
"fpv4-sp-d16")
359 .
Cases(
"fp4-dp-d16",
"fpv4-dp-d16",
"vfpv4-d16")
360 .
Case(
"fp5-sp-d16",
"fpv5-sp-d16")
361 .
Cases(
"fp5-dp-d16",
"fpv5-dp-d16",
"fpv5-d16")
363 .
Case(
"neon-vfpv3",
"neon")
386 if (CPU ==
"generic")
390 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
391 .Case(NAME, DEFAULT_FPU)
392 #include "llvm/Support/ARMTargetParser.def"
397 if (CPU ==
"generic")
398 return ARM::ARCHNames[
static_cast<unsigned>(AK)].ArchBaseExtensions;
401 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
403 ARCHNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \
405 #include "llvm/Support/ARMTargetParser.def"
410 std::vector<StringRef> &Features) {
416 Features.push_back(
"+hwdiv-arm");
418 Features.push_back(
"-hwdiv-arm");
421 Features.push_back(
"+hwdiv");
423 Features.push_back(
"-hwdiv");
429 std::vector<StringRef> &Features) {
435 if ((Extensions & AE.ID) == AE.ID && AE.Feature)
436 Features.push_back(AE.Feature);
437 else if (AE.NegFeature)
438 Features.push_back(AE.NegFeature);
457 return ARCHNames[
static_cast<unsigned>(AK)].ArchAttr;
469 if (
Name.startswith(
"no")) {
479 if (AE.Feature && ArchExt == AE.getName())
480 return StringRef(Negated ? AE.NegFeature : AE.Feature);
504 if (CandidateFPU.FPUVer == InputFPU.
FPUVer &&
505 CandidateFPU.NeonSupport == InputFPU.
NeonSupport &&
507 return CandidateFPU.ID;
517 std::vector<StringRef> &Features,
518 unsigned &ArgFPUID) {
520 size_t StartingNumFeatures = Features.size();
529 if ((AE.ID &
ID) ==
ID && AE.NegFeature)
530 Features.push_back(AE.NegFeature);
532 if ((AE.ID &
ID) == AE.ID && AE.Feature)
533 Features.push_back(AE.Feature);
540 if (ArchExt ==
"fp" || ArchExt ==
"fp.dp") {
542 if (ArchExt ==
"fp.dp") {
544 Features.push_back(
"-fp64");
548 }
else if (Negated) {
556 return StartingNumFeatures != Features.size();
561 if (AK == ArchKind::INVALID)
566 if (CPU.ArchID == AK && CPU.Default)
567 return CPU.getName();
577 if (Syn ==
D.getName())
585 if (ArchExt == A.getName())
593 if (CPU ==
C.getName())
596 return ArchKind::INVALID;
601 if (Arch.ArchID != ArchKind::INVALID)
602 Values.push_back(Arch.getName());
610 if (
TT.isOSBinFormatMachO()) {
618 }
else if (
TT.isOSWindows())
623 switch (
TT.getEnvironment()) {
629 return "aapcs-linux";
636 if (
TT.isOSOpenBSD())
637 return "aapcs-linux";
StringSwitch & Case(StringLiteral S, T Value)
LLVM_NODISCARD bool startswith(StringRef Prefix) const
Check if this string starts with the given Prefix.
StringSwitch & StartsWith(StringLiteral S, T Value)
static StringRef getName(Value *V)
This is an optimization pass for GlobalISel generic memory operations.
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
StringRef getCanonicalArchName(StringRef Arch)
StringRef getName() const
StringRef getArchName(ArchKind AK)
LLVM_NODISCARD bool endswith(StringRef Suffix) const
Check if this string ends with the given Suffix.
LLVM_NODISCARD R Default(T Value)
static constexpr size_t npos
const ExtName ARCHExtNames[]
Triple - Helper class for working with autoconf configuration names.
ProfileKind parseArchProfile(StringRef Arch)
StringRef getArchSynonym(StringRef Arch)
StringRef getCPUAttr(ArchKind AK)
@ SP_D16
Only single-precision instructions, with 16 D registers.
StringRef getCPUAttr(ArchKind AK)
ArchExtKind parseArchExt(StringRef ArchExt)
bool getFPUFeatures(unsigned FPUKind, std::vector< StringRef > &Features)
NeonSupportLevel NeonSupport
static const FPUName FPUNames[]
void fillValidCPUArchList(SmallVectorImpl< StringRef > &Values)
static bool stripNegationPrefix(StringRef &Name)
unsigned getArchAttr(ArchKind AK)
(vector float) vec_cmpeq(*A, *B) C
const CpuNames< ArchKind > CPUNames[]
static const ArchNames< ArchKind > ARCHNames[]
ArchKind parseCPUArch(StringRef CPU)
Analysis containing CSE Info
ArchKind parseArch(StringRef Arch)
uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK)
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
bool appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, StringRef ArchExt, std::vector< StringRef > &Features, unsigned &ArgFPUKind)
EndianKind parseArchEndian(StringRef Arch)
unsigned getDefaultFPU(StringRef CPU, ArchKind AK)
static Triple::ArchType parseArch(StringRef ArchName)
constexpr LLVM_NODISCARD bool empty() const
empty - Check if the string is empty.
uint64_t parseHWDiv(StringRef HWDiv)
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
static unsigned findDoublePrecisionFPU(unsigned InputFPUKind)
StringRef getFPUSynonym(StringRef FPU)
StringRef getArchName(ArchKind AK)
@ D16
Only 16 D registers.
ArchKind parseCPUArch(StringRef CPU)
unsigned parseArchVersion(StringRef Arch)
unsigned getDefaultFPU(StringRef CPU, ArchKind AK)
StringRef getSubArch(ArchKind AK)
StringRef - Represent a constant reference to a string, i.e.
ISAKind parseArchISA(StringRef Arch)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
const struct llvm::ARM::@360 HWDivNames[]
StringSwitch & Cases(StringLiteral S0, StringLiteral S1, T Value)
bool getHWDivFeatures(uint64_t HWDivKind, std::vector< StringRef > &Features)
static StringRef getHWDivSynonym(StringRef HWDiv)
NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind)
StringRef getDefaultCPU(StringRef Arch)
bool getExtensionFeatures(uint64_t Extensions, std::vector< StringRef > &Features)
unsigned parseFPU(StringRef FPU)
Lightweight error class with error context and mandatory checking.
FPURestriction getFPURestriction(unsigned FPUKind)
StringRef getSubArch(ArchKind AK)
StringRef getFPUName(unsigned FPUKind)
FPUVersion getFPUVersion(unsigned FPUKind)
StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU)
uint64_t parseArchExt(StringRef ArchExt)
A switch()-like statement whose cases are string literals.
FPURestriction Restriction
StringRef getArchExtFeature(StringRef ArchExt)
StringRef getArchExtName(uint64_t ArchExtKind)