24 .
Case(
"thumb,arm",
"arm,thumb")
32 for (
const auto &
A : ARMArchNames) {
33 if (
A.Name.endswith(Syn))
36 return ArchKind::INVALID;
44 case ArchKind::ARMV4T:
46 case ArchKind::ARMV5T:
47 case ArchKind::ARMV5TE:
48 case ArchKind::IWMMXT:
49 case ArchKind::IWMMXT2:
50 case ArchKind::XSCALE:
51 case ArchKind::ARMV5TEJ:
54 case ArchKind::ARMV6K:
55 case ArchKind::ARMV6T2:
56 case ArchKind::ARMV6KZ:
57 case ArchKind::ARMV6M:
59 case ArchKind::ARMV7A:
60 case ArchKind::ARMV7VE:
61 case ArchKind::ARMV7R:
62 case ArchKind::ARMV7M:
63 case ArchKind::ARMV7S:
64 case ArchKind::ARMV7EM:
65 case ArchKind::ARMV7K:
67 case ArchKind::ARMV8A:
68 case ArchKind::ARMV8_1A:
69 case ArchKind::ARMV8_2A:
70 case ArchKind::ARMV8_3A:
71 case ArchKind::ARMV8_4A:
72 case ArchKind::ARMV8_5A:
73 case ArchKind::ARMV8_6A:
74 case ArchKind::ARMV8_7A:
75 case ArchKind::ARMV8_8A:
76 case ArchKind::ARMV8_9A:
77 case ArchKind::ARMV8R:
78 case ArchKind::ARMV8MBaseline:
79 case ArchKind::ARMV8MMainline:
80 case ArchKind::ARMV8_1MMainline:
82 case ArchKind::ARMV9A:
83 case ArchKind::ARMV9_1A:
84 case ArchKind::ARMV9_2A:
85 case ArchKind::ARMV9_3A:
86 case ArchKind::ARMV9_4A:
88 case ArchKind::INVALID:
96 case ARM::ArchKind::ARMV6M:
97 case ARM::ArchKind::ARMV7M:
98 case ARM::ArchKind::ARMV7EM:
99 case ARM::ArchKind::ARMV8MMainline:
100 case ARM::ArchKind::ARMV8MBaseline:
101 case ARM::ArchKind::ARMV8_1MMainline:
102 return ARM::ProfileKind::M;
103 case ARM::ArchKind::ARMV7R:
104 case ARM::ArchKind::ARMV8R:
105 return ARM::ProfileKind::R;
106 case ARM::ArchKind::ARMV7A:
107 case ARM::ArchKind::ARMV7VE:
108 case ARM::ArchKind::ARMV7K:
109 case ARM::ArchKind::ARMV8A:
110 case ARM::ArchKind::ARMV8_1A:
111 case ARM::ArchKind::ARMV8_2A:
112 case ARM::ArchKind::ARMV8_3A:
113 case ARM::ArchKind::ARMV8_4A:
114 case ARM::ArchKind::ARMV8_5A:
115 case ARM::ArchKind::ARMV8_6A:
116 case ARM::ArchKind::ARMV8_7A:
117 case ARM::ArchKind::ARMV8_8A:
118 case ARM::ArchKind::ARMV8_9A:
119 case ARM::ArchKind::ARMV9A:
120 case ARM::ArchKind::ARMV9_1A:
121 case ARM::ArchKind::ARMV9_2A:
122 case ARM::ArchKind::ARMV9_3A:
123 case ARM::ArchKind::ARMV9_4A:
124 return ARM::ProfileKind::A;
125 case ARM::ArchKind::ARMV4:
126 case ARM::ArchKind::ARMV4T:
127 case ARM::ArchKind::ARMV5T:
128 case ARM::ArchKind::ARMV5TE:
129 case ARM::ArchKind::ARMV5TEJ:
130 case ARM::ArchKind::ARMV6:
131 case ARM::ArchKind::ARMV6K:
132 case ARM::ArchKind::ARMV6T2:
133 case ARM::ArchKind::ARMV6KZ:
134 case ARM::ArchKind::ARMV7S:
135 case ARM::ArchKind::IWMMXT:
136 case ARM::ArchKind::IWMMXT2:
137 case ARM::ArchKind::XSCALE:
138 case ARM::ArchKind::INVALID:
139 return ARM::ProfileKind::INVALID;
151 std::vector<StringRef> &Features) {
156 static const struct FPUFeatureNameInfo {
157 const char *PlusName, *MinusName;
160 } FPUFeatureInfoList[] = {
168 {
"+vfp2",
"-vfp2", FPUVersion::VFPV2, FPURestriction::D16},
169 {
"+vfp2sp",
"-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16},
170 {
"+vfp3",
"-vfp3", FPUVersion::VFPV3, FPURestriction::None},
171 {
"+vfp3d16",
"-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16},
172 {
"+vfp3d16sp",
"-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16},
173 {
"+vfp3sp",
"-vfp3sp", FPUVersion::VFPV3, FPURestriction::None},
174 {
"+fp16",
"-fp16", FPUVersion::VFPV3_FP16, FPURestriction::SP_D16},
175 {
"+vfp4",
"-vfp4", FPUVersion::VFPV4, FPURestriction::None},
176 {
"+vfp4d16",
"-vfp4d16", FPUVersion::VFPV4, FPURestriction::D16},
177 {
"+vfp4d16sp",
"-vfp4d16sp", FPUVersion::VFPV4, FPURestriction::SP_D16},
178 {
"+vfp4sp",
"-vfp4sp", FPUVersion::VFPV4, FPURestriction::None},
179 {
"+fp-armv8",
"-fp-armv8", FPUVersion::VFPV5, FPURestriction::None},
180 {
"+fp-armv8d16",
"-fp-armv8d16", FPUVersion::VFPV5, FPURestriction::D16},
181 {
"+fp-armv8d16sp",
"-fp-armv8d16sp", FPUVersion::VFPV5, FPURestriction::SP_D16},
182 {
"+fp-armv8sp",
"-fp-armv8sp", FPUVersion::VFPV5, FPURestriction::None},
183 {
"+fullfp16",
"-fullfp16", FPUVersion::VFPV5_FULLFP16, FPURestriction::SP_D16},
184 {
"+fp64",
"-fp64", FPUVersion::VFPV2, FPURestriction::D16},
185 {
"+d32",
"-d32", FPUVersion::VFPV3, FPURestriction::None},
188 for (
const auto &
Info: FPUFeatureInfoList) {
190 FPUNames[
FPUKind].Restriction <=
Info.MaxRestriction)
191 Features.push_back(
Info.PlusName);
193 Features.push_back(
Info.MinusName);
196 static const struct NeonFeatureNameInfo {
197 const char *PlusName, *MinusName;
199 } NeonFeatureInfoList[] = {
200 {
"+neon",
"-neon", NeonSupportLevel::Neon},
201 {
"+sha2",
"-sha2", NeonSupportLevel::Crypto},
202 {
"+aes",
"-aes", NeonSupportLevel::Crypto},
205 for (
const auto &
Info: NeonFeatureInfoList) {
206 if (FPUNames[
FPUKind].NeonSupport >=
Info.MinSupportLevel)
207 Features.push_back(
Info.PlusName);
209 Features.push_back(
Info.MinusName);
217 for (
const auto &
F : FPUNames) {
226 return NeonSupportLevel::None;
227 return FPUNames[
FPUKind].NeonSupport;
232 .
Cases(
"fpa",
"fpe2",
"fpe3",
"maverick",
"invalid")
233 .
Case(
"vfp2",
"vfpv2")
234 .
Case(
"vfp3",
"vfpv3")
235 .
Case(
"vfp4",
"vfpv4")
236 .
Case(
"vfp3-d16",
"vfpv3-d16")
237 .
Case(
"vfp4-d16",
"vfpv4-d16")
238 .
Cases(
"fp4-sp-d16",
"vfpv4-sp-d16",
"fpv4-sp-d16")
239 .
Cases(
"fp4-dp-d16",
"fpv4-dp-d16",
"vfpv4-d16")
240 .
Case(
"fp5-sp-d16",
"fpv5-sp-d16")
241 .
Cases(
"fp5-dp-d16",
"fpv5-dp-d16",
"fpv5-d16")
243 .
Case(
"neon-vfpv3",
"neon")
255 return FPUVersion::NONE;
256 return FPUNames[
FPUKind].FPUVer;
261 return FPURestriction::None;
262 return FPUNames[
FPUKind].Restriction;
266 if (CPU ==
"generic")
270#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
271 .Case(NAME, DEFAULT_FPU)
272#include "llvm/TargetParser/ARMTargetParser.def"
277 if (CPU ==
"generic")
281#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
283 ARMArchNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \
285#include "llvm/TargetParser/ARMTargetParser.def"
290 std::vector<StringRef> &Features) {
296 Features.push_back(
"+hwdiv-arm");
298 Features.push_back(
"-hwdiv-arm");
301 Features.push_back(
"+hwdiv");
303 Features.push_back(
"-hwdiv");
309 std::vector<StringRef> &Features) {
315 if ((Extensions & AE.
ID) == AE.ID && !AE.Feature.empty())
316 Features.push_back(AE.Feature);
317 else if (!AE.NegFeature.empty())
318 Features.push_back(AE.NegFeature);
325 return ARMArchNames[
static_cast<unsigned>(AK)].
Name;
329 return ARMArchNames[
static_cast<unsigned>(AK)].CPUAttr;
333 return ARMArchNames[
static_cast<unsigned>(AK)].
getSubArch();
337 return ARMArchNames[
static_cast<unsigned>(AK)].ArchAttr;
349 if (
Name.startswith(
"no")) {
359 if (!AE.Feature.empty() && ArchExt == AE.Name)
360 return StringRef(Negated ? AE.NegFeature : AE.Feature);
377 if (InputFPU.
Restriction != ARM::FPURestriction::SP_D16)
378 return ARM::FK_INVALID;
384 if (CandidateFPU.FPUVer == InputFPU.
FPUVer &&
385 CandidateFPU.NeonSupport == InputFPU.
NeonSupport &&
386 CandidateFPU.Restriction == ARM::FPURestriction::D16) {
387 return CandidateFPU.
ID;
392 return ARM::FK_INVALID;
397 std::vector<StringRef> &Features,
400 size_t StartingNumFeatures = Features.size();
409 if ((AE.ID &
ID) ==
ID && !AE.NegFeature.empty())
410 Features.push_back(AE.NegFeature);
412 if ((AE.ID &
ID) == AE.ID && !AE.Feature.empty())
413 Features.push_back(AE.Feature);
420 if (ArchExt ==
"fp" || ArchExt ==
"fp.dp") {
422 if (ArchExt ==
"fp.dp") {
424 Features.push_back(
"-fp64");
428 }
else if (Negated) {
436 return StartingNumFeatures != Features.size();
441 return ARM::ArchKind::INVALID;
442 if (AK < ARM::ArchKind::ARMV9A || AK > ARM::ArchKind::ARMV9_3A)
443 return ARM::ArchKind::INVALID;
444 unsigned AK_v8 =
static_cast<unsigned>(ARM::ArchKind::ARMV8_5A);
445 AK_v8 +=
static_cast<unsigned>(AK) -
446 static_cast<unsigned>(ARM::ArchKind::ARMV9A);
452 if (AK == ArchKind::INVALID)
457 if (CPU.ArchID == AK && CPU.Default)
476 if (ArchExt ==
A.Name)
487 return ArchKind::INVALID;
492 if (Arch.ArchID != ArchKind::INVALID)
501 if (
TT.isOSBinFormatMachO()) {
509 }
else if (
TT.isOSWindows())
514 switch (
TT.getEnvironment()) {
520 return "aapcs-linux";
527 if (
TT.isOSFreeBSD() ||
TT.isOSOpenBSD() ||
TT.isOHOSFamily())
528 return "aapcs-linux";
543 if (!MArch.
empty() && MArch ==
"v6")
544 return "arm1176jzf-s";
545 if (!MArch.
empty() && MArch ==
"v7")
593 return "arm1176jzf-s";
static StringRef getHWDivSynonym(StringRef HWDiv)
static bool stripNegationPrefix(StringRef &Name)
static ARM::ProfileKind getProfileKind(ARM::ArchKind AK)
static ARM::FPUKind findDoublePrecisionFPU(ARM::FPUKind InputFPUKind)
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
Analysis containing CSE Info
This file implements the StringSwitch template, which mimics a switch() statement whose cases are str...
static Triple::ArchType parseArch(StringRef ArchName)
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
StringRef - Represent a constant reference to a string, i.e.
constexpr bool empty() const
empty - Check if the string is empty.
bool equals(StringRef RHS) const
equals - Check for string equality, this is more efficient than compare() when the relative ordering ...
A switch()-like statement whose cases are string literals.
StringSwitch & Case(StringLiteral S, T Value)
StringSwitch & Cases(StringLiteral S0, StringLiteral S1, T Value)
Triple - Helper class for working with autoconf configuration names.
OSType getOS() const
Get the parsed operating system type of this triple.
EnvironmentType getEnvironment() const
Get the parsed environment type of this triple.
StringRef getArchName() const
Get the architecture (first) component of the triple.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
StringRef getArchExtName(uint64_t ArchExtKind)
StringRef getFPUSynonym(StringRef FPU)
bool getFPUFeatures(FPUKind FPUKind, std::vector< StringRef > &Features)
StringRef getCanonicalArchName(StringRef Arch)
MArch is expected to be of the form (arm|thumb)?(eb)?(v.
uint64_t parseHWDiv(StringRef HWDiv)
StringRef getCPUAttr(ArchKind AK)
StringRef getArchName(ArchKind AK)
StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU)
void fillValidCPUArchList(SmallVectorImpl< StringRef > &Values)
static const FPUName FPUNames[]
uint64_t parseArchExt(StringRef ArchExt)
ArchKind convertV9toV8(ArchKind AK)
ArchKind parseArch(StringRef Arch)
FPURestriction getFPURestriction(FPUKind FPUKind)
bool appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, StringRef ArchExt, std::vector< StringRef > &Features, FPUKind &ArgFPUKind)
StringRef getArchSynonym(StringRef Arch)
Converts e.g. "armv8" -> "armv8-a".
StringRef getDefaultCPU(StringRef Arch)
StringRef getArchExtFeature(StringRef ArchExt)
const CpuNames CPUNames[]
ProfileKind parseArchProfile(StringRef Arch)
FPUKind parseFPU(StringRef FPU)
StringRef getSubArch(ArchKind AK)
static const ArchNames ARMArchNames[]
StringRef getARMCPUForArch(const llvm::Triple &Triple, StringRef MArch={})
Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
unsigned parseArchVersion(StringRef Arch)
const ExtName ARCHExtNames[]
NeonSupportLevel getFPUNeonSupportLevel(FPUKind FPUKind)
ArchKind parseCPUArch(StringRef CPU)
unsigned getArchAttr(ArchKind AK)
StringRef getFPUName(FPUKind FPUKind)
FPUVersion getFPUVersion(FPUKind FPUKind)
bool getHWDivFeatures(uint64_t HWDivKind, std::vector< StringRef > &Features)
uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK)
FPUKind getDefaultFPU(StringRef CPU, ArchKind AK)
bool getExtensionFeatures(uint64_t Extensions, std::vector< StringRef > &Features)
const struct llvm::ARM::@398 HWDivNames[]
@ C
The default llvm calling convention, compatible with C.
This is an optimization pass for GlobalISel generic memory operations.
FPURestriction Restriction
NeonSupportLevel NeonSupport