LLVM
16.0.0git
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#include "ARM.h"
#include "ARMBaseInstrInfo.h"
#include "ARMTargetMachine.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "Utils/ARMBaseInfo.h"
#include "llvm/ADT/APSInt.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsARM.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetOptions.h"
#include "ARMGenDAGISel.inc"
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "arm-isel" |
Functions | |
static bool | isInt32Immediate (SDNode *N, unsigned &Imm) |
isInt32Immediate - This method tests to see if the node is a 32-bit constant operand. More... | |
static bool | isInt32Immediate (SDValue N, unsigned &Imm) |
static bool | isOpcWithIntImmediate (SDNode *N, unsigned Opc, unsigned &Imm) |
static bool | isScaledConstantInRange (SDValue Node, int Scale, int RangeMin, int RangeMax, int &ScaledConstant) |
Check whether a particular node is a constant value representable as (N * Scale) where (N in [RangeMin , RangeMax ). More... | |
static bool | shouldUseZeroOffsetLdSt (SDValue N) |
static SDValue | getAL (SelectionDAG *CurDAG, const SDLoc &dl) |
getAL - Returns a ARMCC::AL immediate node. More... | |
static bool | isVLDfixed (unsigned Opc) |
static bool | isVSTfixed (unsigned Opc) |
static unsigned | getVLDSTRegisterUpdateOpcode (unsigned Opc) |
static bool | isPerfectIncrement (SDValue Inc, EVT VecTy, unsigned NumVecs) |
Returns true if the given increment is a Constant known to be equal to the access size performed by a NEON load/store. More... | |
static bool | SDValueToConstBool (SDValue SDVal) |
static Optional< std::pair< unsigned, unsigned > > | getContiguousRangeOfSetBits (const APInt &A) |
static void | getIntOperandsFromRegisterString (StringRef RegString, SelectionDAG *CurDAG, const SDLoc &DL, std::vector< SDValue > &Ops) |
static int | getBankedRegisterMask (StringRef RegString) |
static int | getMClassFlagsMask (StringRef Flags) |
static int | getMClassRegisterMask (StringRef Reg, const ARMSubtarget *Subtarget) |
static int | getARClassRegisterMask (StringRef Reg, StringRef Flags) |
Variables | |
static cl::opt< bool > | DisableShifterOp ("disable-shifter-op", cl::Hidden, cl::desc("Disable isel of shifter-op"), cl::init(false)) |
#define DEBUG_TYPE "arm-isel" |
Definition at line 41 of file ARMISelDAGToDAG.cpp.
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inlinestatic |
getAL - Returns a ARMCC::AL immediate node.
Definition at line 1573 of file ARMISelDAGToDAG.cpp.
References llvm::ARMCC::AL, llvm::SelectionDAG::getTargetConstant(), and llvm::MVT::i32.
Definition at line 5447 of file ARMISelDAGToDAG.cpp.
References llvm::StringRef::empty(), getMClassFlagsMask(), and llvm::BitmaskEnumDetail::Mask().
Definition at line 5416 of file ARMISelDAGToDAG.cpp.
References llvm::StringRef::lower().
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Definition at line 3534 of file ARMISelDAGToDAG.cpp.
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Definition at line 5388 of file ARMISelDAGToDAG.cpp.
References assert(), DL, llvm::SelectionDAG::getTargetConstant(), llvm::MVT::i32, and llvm::StringRef::split().
Definition at line 5426 of file ARMISelDAGToDAG.cpp.
References llvm::StringSwitch< T, R >::Case(), llvm::StringSwitch< T, R >::Default(), x2(), and x3.
Referenced by getARClassRegisterMask().
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Definition at line 5439 of file ARMISelDAGToDAG.cpp.
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Definition at line 2023 of file ARMISelDAGToDAG.cpp.
References assert(), isVLDfixed(), and isVSTfixed().
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isInt32Immediate - This method tests to see if the node is a 32-bit constant operand.
If so Imm will receive the 32-bit value.
Definition at line 364 of file ARMISelDAGToDAG.cpp.
References llvm::ISD::Constant, llvm::MVT::i32, llvm::RISCVMatInt::Imm, and N.
Referenced by isInt32Immediate(), and isOpcWithIntImmediate().
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Definition at line 374 of file ARMISelDAGToDAG.cpp.
References llvm::RISCVMatInt::Imm, isInt32Immediate(), and N.
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Definition at line 381 of file ARMISelDAGToDAG.cpp.
References llvm::RISCVMatInt::Imm, isInt32Immediate(), and N.
Returns true if the given increment is a Constant known to be equal to the access size performed by a NEON load/store.
This means the "[rN]!" form can be used.
Definition at line 2097 of file ARMISelDAGToDAG.cpp.
References llvm::EVT::getSizeInBits().
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Check whether a particular node is a constant value representable as (N * Scale) where (N in [RangeMin
, RangeMax
).
ScaledConstant | [out] - On success, the pre-scaled constant value. |
Definition at line 390 of file ARMISelDAGToDAG.cpp.
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Definition at line 1950 of file ARMISelDAGToDAG.cpp.
Referenced by getVLDSTRegisterUpdateOpcode().
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Definition at line 1992 of file ARMISelDAGToDAG.cpp.
Referenced by getVLDSTRegisterUpdateOpcode().
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Definition at line 2691 of file ARMISelDAGToDAG.cpp.
References assert(), and llvm::ConstantSDNode::getZExtValue().
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Definition at line 1108 of file ARMISelDAGToDAG.cpp.
References llvm::ISD::ADD, and N.