LLVM  10.0.0svn
Macros | Functions
AMDGPUInstructionSelector.cpp File Reference

This file implements the targeting of the InstructionSelector class for AMDGPU. More...

#include "AMDGPUInstructionSelector.h"
#include "AMDGPUInstrInfo.h"
#include "AMDGPURegisterBankInfo.h"
#include "AMDGPURegisterInfo.h"
#include "AMDGPUSubtarget.h"
#include "AMDGPUTargetMachine.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "SIMachineFunctionInfo.h"
#include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h"
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
#include "llvm/CodeGen/GlobalISel/Utils.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/IR/Type.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "AMDGPUGenGlobalISel.inc"
Include dependency graph for AMDGPUInstructionSelector.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "amdgpu-isel"
 
#define GET_GLOBALISEL_IMPL
 
#define AMDGPUSubtarget   GCNSubtarget
 
#define GET_GLOBALISEL_PREDICATES_INIT
 
#define GET_GLOBALISEL_TEMPORARIES_INIT
 

Functions

static bool isSCC (Register Reg, const MachineRegisterInfo &MRI)
 
static unsigned getLogicalBitOpcode (unsigned Opc, bool Is64)
 
static int getV_CMPOpcode (CmpInst::Predicate P, unsigned Size)
 
static MachineInstrbuildEXP (const TargetInstrInfo &TII, MachineInstr *Insert, unsigned Tgt, unsigned Reg0, unsigned Reg1, unsigned Reg2, unsigned Reg3, unsigned VM, bool Compr, unsigned Enabled, bool Done)
 
static bool isZero (Register Reg, MachineRegisterInfo &MRI)
 
static unsigned extractGLC (unsigned AuxiliaryData)
 
static unsigned extractSLC (unsigned AuxiliaryData)
 
static unsigned extractDLC (unsigned AuxiliaryData)
 
static unsigned extractSWZ (unsigned AuxiliaryData)
 
static std::tuple< Register, unsigned, MachineInstr * > getBaseWithConstantOffset (MachineRegisterInfo &MRI, Register Reg)
 
static unsigned getBufferStoreOpcode (LLT Ty, const unsigned MemSize, const bool Offen)
 
static unsigned getBufferStoreFormatOpcode (LLT Ty, const unsigned MemSize, const bool Offen)
 
static int sizeToSubRegIndex (unsigned Size)
 
static bool shouldUseAndMask (unsigned Size, unsigned &Mask)
 
static int64_t getFPTrueImmVal (unsigned Size, bool Signed)
 
static bool isConstant (const MachineInstr &MI)
 
static bool isStackPtrRelative (const MachinePointerInfo &PtrInfo)
 

Detailed Description

This file implements the targeting of the InstructionSelector class for AMDGPU.

Todo:
This should be generated by TableGen.

Definition in file AMDGPUInstructionSelector.cpp.

Macro Definition Documentation

◆ AMDGPUSubtarget

Definition at line 43 of file AMDGPUInstructionSelector.cpp.

◆ DEBUG_TYPE

#define DEBUG_TYPE   "amdgpu-isel"

◆ GET_GLOBALISEL_IMPL

#define GET_GLOBALISEL_IMPL

Definition at line 42 of file AMDGPUInstructionSelector.cpp.

◆ GET_GLOBALISEL_PREDICATES_INIT

#define GET_GLOBALISEL_PREDICATES_INIT

◆ GET_GLOBALISEL_TEMPORARIES_INIT

#define GET_GLOBALISEL_TEMPORARIES_INIT

Function Documentation

◆ buildEXP()

static MachineInstr* buildEXP ( const TargetInstrInfo TII,
MachineInstr Insert,
unsigned  Tgt,
unsigned  Reg0,
unsigned  Reg1,
unsigned  Reg2,
unsigned  Reg3,
unsigned  VM,
bool  Compr,
unsigned  Enabled,
bool  Done 
)
static

Definition at line 758 of file AMDGPUInstructionSelector.cpp.

◆ extractDLC()

static unsigned extractDLC ( unsigned  AuxiliaryData)
static

Definition at line 792 of file AMDGPUInstructionSelector.cpp.

Referenced by getBufferStoreFormatOpcode().

◆ extractGLC()

static unsigned extractGLC ( unsigned  AuxiliaryData)
static

Definition at line 784 of file AMDGPUInstructionSelector.cpp.

Referenced by getBufferStoreFormatOpcode().

◆ extractSLC()

static unsigned extractSLC ( unsigned  AuxiliaryData)
static

Definition at line 788 of file AMDGPUInstructionSelector.cpp.

Referenced by getBufferStoreFormatOpcode().

◆ extractSWZ()

static unsigned extractSWZ ( unsigned  AuxiliaryData)
static

Definition at line 796 of file AMDGPUInstructionSelector.cpp.

Referenced by getBufferStoreFormatOpcode().

◆ getBaseWithConstantOffset()

static std::tuple<Register, unsigned, MachineInstr *> getBaseWithConstantOffset ( MachineRegisterInfo MRI,
Register  Reg 
)
static

◆ getBufferStoreFormatOpcode()

static unsigned getBufferStoreFormatOpcode ( LLT  Ty,
const unsigned  MemSize,
const bool  Offen 
)
static

◆ getBufferStoreOpcode()

static unsigned getBufferStoreOpcode ( LLT  Ty,
const unsigned  MemSize,
const bool  Offen 
)
static

◆ getFPTrueImmVal()

static int64_t getFPTrueImmVal ( unsigned  Size,
bool  Signed 
)
static

◆ getLogicalBitOpcode()

static unsigned getLogicalBitOpcode ( unsigned  Opc,
bool  Is64 
)
static

Definition at line 249 of file AMDGPUInstructionSelector.cpp.

References llvm::MCID::Add, add(), llvm::MachineInstrBuilder::add(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstr::addOperand(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::RegisterBankInfo::constrainGenericRegister(), llvm::constrainSelectedInstRegOperands(), llvm::InstructionSelector::CoverageInfo, llvm::MachineOperand::CreateImm(), llvm::MachineOperand::CreateReg(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::RegState::Dead, E, llvm::MachineInstr::eraseFromParent(), llvm::SIRegisterInfo::getBoolRC(), llvm::SIRegisterInfo::getConstrainedRegClassForOperand(), llvm::MachineInstr::getDebugLoc(), llvm::RegisterBank::getID(), llvm::MachineOperand::getImm(), llvm::MachineInstr::getIntrinsicID(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::RegisterBankInfo::getRegBank(), llvm::MachineRegisterInfo::getRegBankOrNull(), llvm::SIRegisterInfo::getRegClassForSizeOnBank(), llvm::MachineRegisterInfo::getRegClassOrNull(), llvm::MachineFunction::getRegInfo(), llvm::SIRegisterInfo::getRegSplitParts(), llvm::LLT::getSizeInBits(), llvm::AMDGPURegisterInfo::getSubRegFromChannel(), llvm::MachineRegisterInfo::getType(), llvm::getUndefRegState(), llvm::SIRegisterInfo::getWaveMaskRegClass(), llvm::GCNSubtarget::hasAddNoCarry(), I, isSCC(), llvm::MachineOperand::isUndef(), llvm::RegState::Kill, llvm_unreachable, llvm::InstructionSelector::MF, MI, llvm::MachineInstr::operands(), llvm::MachineInstr::setDesc(), llvm::MachineRegisterInfo::setRegClass(), Size, and SubReg.

◆ getV_CMPOpcode()

static int getV_CMPOpcode ( CmpInst::Predicate  P,
unsigned  Size 
)
static

◆ isConstant()

static bool isConstant ( const MachineInstr MI)
static

Definition at line 1470 of file AMDGPUInstructionSelector.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstr::addOperand(), llvm::MachineInstrBuilder::addReg(), llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Align, assert(), llvm::BuildMI(), AMDGPUAS::CONSTANT_ADDRESS_32BIT, llvm::RegisterBankInfo::constrainGenericRegister(), llvm::InstructionSelector::CoverageInfo, llvm::MachineOperand::CreateReg(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::dyn_cast(), llvm::MachineInstr::eraseFromParent(), llvm::LLT::getAddressSpace(), llvm::MachineMemOperand::getAddrSpace(), llvm::SIRegisterInfo::getBoolRC(), llvm::MachineOperand::getCImm(), llvm::MachineInstr::getDebugLoc(), llvm::RegisterBank::getID(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getMBB(), llvm::Instruction::getMetadata(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::RegisterBankInfo::getRegBank(), llvm::SIRegisterInfo::getRegClassForTypeOnBank(), llvm::MachineRegisterInfo::getRegClassOrNull(), llvm::ConstantInt::getSExtValue(), llvm::LLT::getSizeInBits(), llvm::MachineRegisterInfo::getType(), llvm::MachineRegisterInfo::getUniqueVRegDef(), llvm::MachineMemOperand::getValue(), llvm::SIRegisterInfo::getVCC(), llvm::MachineInstr::hasOneMemOperand(), isSCC(), llvm::GCNSubtarget::ldsRequiresM0Init(), llvm::SPII::Load, AMDGPUAS::LOCAL_ADDRESS, llvm::BitmaskEnumDetail::Mask(), llvm::MachineInstr::memoperands_begin(), llvm::InstructionSelector::MF, llvm::SmallVectorTemplateBase< T >::push_back(), AMDGPUAS::REGION_ADDRESS, llvm::MachineInstr::setDesc(), and llvm::MachineRegisterInfo::setRegClass().

Referenced by ConstantBuildVector(), llvm::MDBuilder::createAnonymousAliasScope(), ExpandBVWithShuffles(), llvm::HexagonInstrInfo::expandPostRAPseudo(), foldBitcastedFPLogic(), llvm::DIExpression::getElement(), inferDSOLocal(), INITIALIZE_PASS(), isDbgValueDescribedByReg(), isDebug(), LLVMIsGlobalConstant(), and LowerBUILD_VECTOR_i1().

◆ isSCC()

static bool isSCC ( Register  Reg,
const MachineRegisterInfo MRI 
)
static

Definition at line 72 of file AMDGPUInstructionSelector.cpp.

References llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::RegisterBankInfo::constrainGenericRegister(), llvm::MachineOperand::CreateImm(), llvm::MachineOperand::CreateReg(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::dbgs(), llvm::PointerUnion< PTs >::dyn_cast(), llvm::MachineInstr::eraseFromParent(), llvm::PointerUnion< PTs >::get(), llvm::SIRegisterInfo::getBoolRC(), llvm::SIRegisterInfo::getConstrainedRegClassForOperand(), llvm::MachineInstr::getDebugLoc(), llvm::RegisterBank::getID(), llvm::MachineOperand::getImm(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getParent(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::SIRegisterInfo::getRegClassForTypeOnBank(), llvm::MachineRegisterInfo::getRegClassOrNull(), llvm::MachineRegisterInfo::getRegClassOrRegBank(), llvm::LLT::getSizeInBits(), llvm::MachineOperand::getSubReg(), llvm::MachineRegisterInfo::getType(), llvm::SIRegisterInfo::getVCC(), llvm::TargetRegisterClass::hasSuperClassEq(), I, llvm::MachineOperand::isDead(), llvm::MachineOperand::isDebug(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isEarlyClobber(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isImplicit(), llvm::MachineOperand::isInternalRead(), llvm::MachineOperand::isKill(), llvm::Register::isPhysicalRegister(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUndef(), llvm::LLT::isValid(), LLVM_DEBUG, llvm_unreachable, MI, llvm::MachineInstr::operands(), Reg, llvm::MachineInstr::setDesc(), and llvm::MachineRegisterInfo::setRegClass().

Referenced by getFPTrueImmVal(), getLogicalBitOpcode(), getV_CMPOpcode(), and isConstant().

◆ isStackPtrRelative()

static bool isStackPtrRelative ( const MachinePointerInfo PtrInfo)
static

◆ isZero()

static bool isZero ( Register  Reg,
MachineRegisterInfo MRI 
)
static

◆ shouldUseAndMask()

static bool shouldUseAndMask ( unsigned  Size,
unsigned Mask 
)
static

◆ sizeToSubRegIndex()

static int sizeToSubRegIndex ( unsigned  Size)
static