LLVM 18.0.0git
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This file implements the targeting of the InstructionSelector class for AMDGPU. More...
#include "AMDGPUInstructionSelector.h"
#include "AMDGPU.h"
#include "AMDGPUGlobalISelUtils.h"
#include "AMDGPUInstrInfo.h"
#include "AMDGPURegisterBankInfo.h"
#include "AMDGPUTargetMachine.h"
#include "SIMachineFunctionInfo.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h"
#include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"
#include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h"
#include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/IntrinsicsAMDGPU.h"
#include <optional>
#include "AMDGPUGenGlobalISel.inc"
Go to the source code of this file.
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#define | DEBUG_TYPE "amdgpu-isel" |
#define | GET_GLOBALISEL_IMPL |
#define | AMDGPUSubtarget GCNSubtarget |
#define | GET_GLOBALISEL_PREDICATES_INIT |
#define | GET_GLOBALISEL_TEMPORARIES_INIT |
Variables | |
static cl::opt< bool > | AllowRiskySelect ("amdgpu-global-isel-risky-select", cl::desc("Allow GlobalISel to select cases that are likely to not work yet"), cl::init(false), cl::ReallyHidden) |
This file implements the targeting of the InstructionSelector class for AMDGPU.
Definition in file AMDGPUInstructionSelector.cpp.
#define AMDGPUSubtarget GCNSubtarget |
Definition at line 44 of file AMDGPUInstructionSelector.cpp.
#define DEBUG_TYPE "amdgpu-isel" |
Definition at line 32 of file AMDGPUInstructionSelector.cpp.
#define GET_GLOBALISEL_IMPL |
Definition at line 43 of file AMDGPUInstructionSelector.cpp.
#define GET_GLOBALISEL_PREDICATES_INIT |
#define GET_GLOBALISEL_TEMPORARIES_INIT |
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Definition at line 4773 of file AMDGPUInstructionSelector.cpp.
References llvm::MachineInstrBuilder::addImm().
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Definition at line 4822 of file AMDGPUInstructionSelector.cpp.
References B, buildRSRC(), llvm::Hi_32(), MRI, and TII.
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Definition at line 4831 of file AMDGPUInstructionSelector.cpp.
References B, buildRSRC(), llvm::Hi_32(), MRI, and TII.
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Return a resource descriptor for use with an arbitrary 64-bit pointer.
If BasePtr
is not valid, a null base pointer will be used.
Definition at line 4779 of file AMDGPUInstructionSelector.cpp.
Referenced by buildAddr64RSrc(), and buildOffsetSrc().
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Return the register to use for the index value, and the subregister to use for the indirectly accessed register.
Definition at line 3028 of file AMDGPUInstructionSelector.cpp.
References assert(), llvm::AMDGPU::getBaseWithConstantOffset(), MRI, llvm::Offset, llvm::ArrayRef< T >::size(), and TRI.
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Get an immediate that must be 32-bits, and treated as zero extended.
Definition at line 5036 of file AMDGPUInstructionSelector.cpp.
References llvm::getIConstantVRegSExtVal(), llvm::Lo_32(), and MRI.
Definition at line 283 of file AMDGPUInstructionSelector.cpp.
References llvm_unreachable.
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Definition at line 1096 of file AMDGPUInstructionSelector.cpp.
References llvm::CmpInst::FCMP_FALSE, llvm::CmpInst::FCMP_OEQ, llvm::CmpInst::FCMP_OGE, llvm::CmpInst::FCMP_OGT, llvm::CmpInst::FCMP_OLE, llvm::CmpInst::FCMP_OLT, llvm::CmpInst::FCMP_ONE, llvm::CmpInst::FCMP_ORD, llvm::CmpInst::FCMP_TRUE, llvm::CmpInst::FCMP_UEQ, llvm::CmpInst::FCMP_UGE, llvm::CmpInst::FCMP_UGT, llvm::CmpInst::FCMP_ULE, llvm::CmpInst::FCMP_ULT, llvm::CmpInst::FCMP_UNE, llvm::CmpInst::FCMP_UNO, llvm::CmpInst::ICMP_EQ, llvm::CmpInst::ICMP_NE, llvm::CmpInst::ICMP_SGE, llvm::CmpInst::ICMP_SGT, llvm::CmpInst::ICMP_SLE, llvm::CmpInst::ICMP_SLT, llvm::CmpInst::ICMP_UGE, llvm::CmpInst::ICMP_UGT, llvm::CmpInst::ICMP_ULE, llvm::CmpInst::ICMP_ULT, llvm_unreachable, P, Select, and Size.
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Definition at line 76 of file AMDGPUInstructionSelector.cpp.
Definition at line 1641 of file AMDGPUInstructionSelector.cpp.
References llvm_unreachable.
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Definition at line 2731 of file AMDGPUInstructionSelector.cpp.
References MI.
Referenced by arePointersCompatible(), llvm::buildModuleSummaryIndex(), llvm::MDBuilder::createTBAANode(), llvm::HexagonInstrInfo::expandPostRAPseudo(), getMemcpyLoadsAndStores(), and llvm::slpvectorizer::BoUpSLP::getTreeCost().
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Definition at line 5105 of file AMDGPUInstructionSelector.cpp.
References assert(), llvm::LLT::fixed_vector(), llvm::getDefIgnoringCopies(), llvm::getIConstantVRegValWithLookThrough(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::getShuffleMask(), LHS, MRI, and stripBitCast().
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Definition at line 2513 of file AMDGPUInstructionSelector.cpp.
References llvm::MIPatternMatch::m_GLShr(), llvm::MIPatternMatch::m_GTrunc(), llvm::MIPatternMatch::m_Reg(), llvm::MIPatternMatch::m_SpecificICst(), llvm::MIPatternMatch::mi_match(), and MRI.
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Definition at line 4506 of file AMDGPUInstructionSelector.cpp.
References Addr, and llvm::MachineInstr::NoUWrap.
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Definition at line 2822 of file AMDGPUInstructionSelector.cpp.
References isVCmpResult(), MI, MRI, and Opcode.
Referenced by isVCmpResult().
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Match a zero extend from a 32-bit value to 64-bits.
Definition at line 3295 of file AMDGPUInstructionSelector.cpp.
References assert(), llvm::getDefIgnoringCopies(), llvm::MIPatternMatch::m_GZExt(), llvm::MIPatternMatch::m_Reg(), llvm::PatternMatch::m_ZeroInt(), llvm::MIPatternMatch::mi_match(), MRI, and llvm::LLT::scalar().
Definition at line 1797 of file AMDGPUInstructionSelector.cpp.
Size
bits will be an inline immediate. Definition at line 2343 of file AMDGPUInstructionSelector.cpp.
References Size.
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Definition at line 2195 of file AMDGPUInstructionSelector.cpp.
References llvm::bit_ceil(), Size, and sizeToSubRegIndex().
Referenced by sizeToSubRegIndex().
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Definition at line 5097 of file AMDGPUInstructionSelector.cpp.
References llvm::getDefIgnoringCopies(), MI, and MRI.
Referenced by isExtractHiElt().
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