9#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H
10#define LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H
18class MachineRegisterInfo;
23class MachineIRBuilder;
24class RegisterBankInfo;
29std::pair<Register, unsigned>
31 GISelKnownBits *KnownBits =
nullptr,
32 bool CheckNUW =
false);
unsigned const MachineRegisterInfo * MRI
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
This file defines the DenseSet and SmallDenseSet classes.
bool isS32S64LaneMask(Register Reg) const
Helper class to build MachineInstr.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Holds all the information related to register banks.
Wrapper class representing virtual and physical registers.
Implements a dense probed hash-table based set with some number of buckets stored inline.
void buildReadAnyLane(MachineIRBuilder &B, Register SgprDst, Register VgprSrc, const RegisterBankInfo &RBI)
std::pair< Register, unsigned > getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg, GISelKnownBits *KnownBits=nullptr, bool CheckNUW=false)
Returns base register and constant offset.
This is an optimization pass for GlobalISel generic memory operations.