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9 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H
10 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H
18 class MachineRegisterInfo;
25 std::pair<Register, unsigned>
This is an optimization pass for GlobalISel generic memory operations.
Reg
All possible values of the reg field in the ModR/M byte.
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
std::pair< Register, unsigned > getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg)
Returns base register and constant offset.
unsigned const MachineRegisterInfo * MRI
bool isLegalVOP3PShuffleMask(ArrayRef< int > Mask)
bool hasAtomicFaddRtnForTy(const GCNSubtarget &Subtarget, const LLT &Ty)