Go to the source code of this file.
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| STATISTIC (HexagonNumLoadAbsConversions, "Number of Load instructions converted to absolute-set form") |
| STATISTIC (HexagonNumStoreAbsConversions, "Number of Store instructions converted to absolute-set form") |
| INITIALIZE_PASS (HexagonGenMemAbsolute, "hexagon-gen-load-absolute", "Hexagon Generate Load/Store Set Absolute Address Instruction", false, false) bool HexagonGenMemAbsolute |
◆ DEBUG_TYPE
#define DEBUG_TYPE "hexagon-abs" |
◆ INITIALIZE_PASS()
INITIALIZE_PASS |
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HexagonGenMemAbsolute | , |
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"hexagon-gen-load-absolute" | , |
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"Hexagon Generate Load/Store Set Absolute Address Instruction" | , |
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false | , |
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false | ) |
Definition at line 65 of file HexagonGenMemAbsolute.cpp.
References llvm::MachineInstrBuilder::addGlobalAddress(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::dbgs(), llvm::RegState::Define, E(), llvm::MachineBasicBlock::erase(), for(), llvm::MachineInstr::getDebugLoc(), llvm::MachineOperand::getGlobal(), llvm::MachineOperand::getImm(), llvm::HexagonSubtarget::getInstrInfo(), llvm::MachineOperand::getOffset(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::MachineOperand::getSubReg(), llvm::MachineOperand::getTargetFlags(), I, llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), isValidIndexedLoad(), LLVM_DEBUG, MBB, MI, MRI, llvm::Offset, Opc, llvm::MachineOperand::setSubReg(), TII, and TRI.
◆ STATISTIC() [1/2]
STATISTIC |
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HexagonNumLoadAbsConversions | , |
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"Number of Load instructions converted to absolute-set form" | ) |
◆ STATISTIC() [2/2]
STATISTIC |
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HexagonNumStoreAbsConversions | , |
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"Number of Store instructions converted to absolute-set form" | ) |