HexagonGenMemAbsolute.cpp File Reference

#include "HexagonTargetMachine.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"

Go to the source code of this file.

Namespaces
namespace	llvm
	This is an optimization pass for GlobalISel generic memory operations.

Macros
#define	DEBUG_TYPE   "hexagon-abs"

Functions
	STATISTIC (HexagonNumLoadAbsConversions, "Number of Load instructions converted to absolute-set form")
	STATISTIC (HexagonNumStoreAbsConversions, "Number of Store instructions converted to absolute-set form")
FunctionPass *	llvm::createHexagonGenMemAbsolute ()
void	llvm::initializeHexagonGenMemAbsolutePass (PassRegistry &Registry)
	INITIALIZE_PASS (HexagonGenMemAbsolute, "hexagon-gen-load-absolute", "Hexagon Generate Load/Store Set Absolute Address Instruction", false, false) bool HexagonGenMemAbsolute

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "hexagon-abs"

Definition at line 25 of file HexagonGenMemAbsolute.cpp.

Function Documentation

INITIALIZE_PASS()

INITIALIZE_PASS	(	HexagonGenMemAbsolute	,
		"hexagon-gen-load-absolute"	,
		"Hexagon Generate Load/Store Set Absolute Address Instruction"	,
		false	,
		false
	)

Definition at line 72 of file HexagonGenMemAbsolute.cpp.

References llvm::MachineInstrBuilder::addGlobalAddress(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::dbgs(), llvm::RegState::Define, llvm::MachineDominatorTree::dominates(), llvm::MachineBasicBlock::end(), llvm::MachineBasicBlock::erase(), llvm::HexagonInstrInfo::getBaseAndOffsetPosition(), llvm::MachineInstr::getDebugLoc(), llvm::MachineOperand::getGlobal(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getOffset(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::MachineOperand::getSubReg(), llvm::MachineOperand::getTargetFlags(), I, llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), isValidIndexedLoad(), LLVM_DEBUG, MBB, MI, MRI, llvm::Offset, llvm::MachineOperand::setSubReg(), TII, and TRI.

STATISTIC() [1/2]

STATISTIC	(	HexagonNumLoadAbsConversions	,
		"Number of Load instructions converted to absolute-set form"
	)

STATISTIC() [2/2]

STATISTIC	(	HexagonNumStoreAbsConversions	,
		"Number of Store instructions converted to absolute-set form"
	)