LLVM
15.0.0git
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#include "AArch64Disassembler.h"
#include "AArch64ExternalSymbolizer.h"
#include "MCTargetDesc/AArch64AddressingModes.h"
#include "MCTargetDesc/AArch64MCTargetDesc.h"
#include "TargetInfo/AArch64TargetInfo.h"
#include "Utils/AArch64BaseInfo.h"
#include "llvm-c/Disassembler.h"
#include "llvm/MC/MCDecoderOps.h"
#include "llvm/MC/MCDisassembler/MCRelocationInfo.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include <algorithm>
#include <memory>
#include "AArch64GenDisassemblerTables.inc"
#include "AArch64GenInstrInfo.inc"
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "aarch64-disassembler" |
#define | Success MCDisassembler::Success |
#define | Fail MCDisassembler::Fail |
#define | SoftFail MCDisassembler::SoftFail |
Typedefs | |
using | DecodeStatus = MCDisassembler::DecodeStatus |
Variables | |
static const SmallVector< SmallVector< unsigned, 16 >, 5 > | MatrixZATileDecoderTable |
#define DEBUG_TYPE "aarch64-disassembler" |
Definition at line 34 of file AArch64Disassembler.cpp.
#define Fail MCDisassembler::Fail |
Definition at line 281 of file AArch64Disassembler.cpp.
#define SoftFail MCDisassembler::SoftFail |
Definition at line 282 of file AArch64Disassembler.cpp.
#define Success MCDisassembler::Success |
Definition at line 280 of file AArch64Disassembler.cpp.
Definition at line 37 of file AArch64Disassembler.cpp.
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Definition at line 262 of file AArch64Disassembler.cpp.
References llvm::MCDisassembler::Fail, llvm::tgtok::In, llvm_unreachable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 284 of file AArch64Disassembler.cpp.
Referenced by LLVMInitializeAArch64Disassembler().
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Definition at line 354 of file AArch64Disassembler.cpp.
References move.
Referenced by LLVMInitializeAArch64Disassembler().
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Definition at line 1486 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR32spRegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), extend(), Fail, llvm::MCInst::getOpcode(), shift, and Success.
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Definition at line 1649 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR32spRegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::RISCVMatInt::Imm, S, Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 1631 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeGPR64RegisterClass(), Fail, Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 1453 of file AArch64Disassembler.cpp.
References Addr, DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), SoftFail, and Success.
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Definition at line 1840 of file AArch64Disassembler.cpp.
References Addr, DecodeGPR64commonRegisterClass(), DecodeGPR64RegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 715 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 704 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 693 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 1237 of file AArch64Disassembler.cpp.
References Addr, DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), LLVM_FALLTHROUGH, SoftFail, and Success.
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Definition at line 726 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::RISCVMatInt::Imm, and Success.
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Definition at line 735 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::RISCVMatInt::Imm, and Success.
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Definition at line 783 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), DecodeGPR64RegisterClass(), Insn, and Success.
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Definition at line 399 of file AArch64Disassembler.cpp.
References Addr, DecodeFPR128RegisterClass(), and Fail.
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Definition at line 386 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeFMOVLaneInstruction(), DecodeFPR128_loRegisterClass(), DecodeModImmInstruction(), DecodeModImmTiedInstruction(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 430 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 418 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 406 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeModImmInstruction(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 442 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 519 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeExclusiveLdStInstruction(), DecodeLogicalImmInstruction(), DecodeMoveImmInstruction(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), DecodeTestAndBranch(), DecodeThreeAddrSRegInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 531 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), and DecodeLogicalImmInstruction().
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Definition at line 455 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeCPYMemOpInstruction(), and DecodeSETMemOpInstruction().
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Definition at line 467 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeAdrInstruction(), DecodeAuthLoadInstruction(), DecodeCPYMemOpInstruction(), DecodeExclusiveLdStInstruction(), DecodeFMOVLaneInstruction(), DecodeLogicalImmInstruction(), DecodeMoveImmInstruction(), DecodePairLdStInstruction(), DecodeSETMemOpInstruction(), DecodeSignedLdStInstruction(), DecodeTestAndBranch(), DecodeThreeAddrSRegInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 494 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeAuthLoadInstruction(), DecodeExclusiveLdStInstruction(), DecodeLogicalImmInstruction(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 480 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 1752 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeWSeqPairsClassRegisterClass(), and DecodeXSeqPairsClassRegisterClass().
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Definition at line 1812 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, llvm::RISCVMatInt::Imm, Shift, and Success.
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Definition at line 1543 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR32spRegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), llvm::AArch64_AM::isValidDecodeLogicalImmediate(), and Success.
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Definition at line 506 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 627 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, MatrixZATileDecoderTable, and Success.
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Definition at line 605 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 757 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::RISCVMatInt::Imm, and Success.
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Definition at line 1574 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), DecodeFPR64RegisterClass(), llvm::MCInst::getOpcode(), and Success.
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Definition at line 1613 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), and Success.
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Definition at line 946 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), Fail, llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), shift, and Success.
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Definition at line 765 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::RISCVMatInt::Imm, and Success.
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Definition at line 775 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::RISCVMatInt::Imm, and Success.
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Definition at line 1319 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), DecodeFPR32RegisterClass(), DecodeFPR64RegisterClass(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), LLVM_FALLTHROUGH, SoftFail, and Success.
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Definition at line 742 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), llvm::MCInst::getOpcode(), llvm::RISCVMatInt::Imm, Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 650 of file AArch64Disassembler.cpp.
References Addr, DecodePPRRegisterClass(), and Fail.
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Definition at line 638 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodePPR_3bRegisterClass().
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Definition at line 682 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 671 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 660 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 1865 of file AArch64Disassembler.cpp.
References Addr, DecodeGPR64commonRegisterClass(), DecodeGPR64RegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 1038 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), DecodeFPR16RegisterClass(), DecodeFPR32RegisterClass(), DecodeFPR64RegisterClass(), DecodeFPR8RegisterClass(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), SoftFail, and Success.
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Definition at line 1797 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::tgtok::Bits, llvm::MCOperand::createImm(), Fail, llvm::RISCVMatInt::Imm, and Success.
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Definition at line 1831 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, llvm::RISCVMatInt::Imm, and Success.
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Definition at line 1824 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::RISCVMatInt::Imm, and Success.
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Definition at line 1781 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeZPRRegisterClass(), Fail, llvm::MCInst::getOpcode(), llvm::AArch64_AM::isValidDecodeLogicalImmediate(), and Success.
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Definition at line 1700 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), and Success.
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Definition at line 1728 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, bit, llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 885 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), Fail, llvm::MCInst::getOpcode(), LLVM_FALLTHROUGH, shift, Success, and x3.
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Definition at line 1684 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 980 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), DecodeFPR16RegisterClass(), DecodeFPR32RegisterClass(), DecodeFPR64RegisterClass(), DecodeFPR8RegisterClass(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 872 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm(), and llvm::RISCVMatInt::Imm.
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Definition at line 866 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm(), and llvm::RISCVMatInt::Imm.
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Definition at line 860 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm(), and llvm::RISCVMatInt::Imm.
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Definition at line 878 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm(), and llvm::RISCVMatInt::Imm.
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Definition at line 812 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::RISCVMatInt::Imm, and Success.
Referenced by DecodeVecShiftL16Imm(), DecodeVecShiftL32Imm(), DecodeVecShiftL64Imm(), and DecodeVecShiftL8Imm().
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Definition at line 842 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm(), and llvm::RISCVMatInt::Imm.
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Definition at line 848 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm(), and llvm::RISCVMatInt::Imm.
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Definition at line 830 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm(), and llvm::RISCVMatInt::Imm.
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Definition at line 836 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm(), and llvm::RISCVMatInt::Imm.
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Definition at line 818 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm(), and llvm::RISCVMatInt::Imm.
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Definition at line 824 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm(), and llvm::RISCVMatInt::Imm.
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Definition at line 854 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm(), and llvm::RISCVMatInt::Imm.
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Definition at line 806 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::RISCVMatInt::Imm, and Success.
Referenced by DecodeVecShiftR16Imm(), DecodeVecShiftR16ImmNarrow(), DecodeVecShiftR32Imm(), DecodeVecShiftR32ImmNarrow(), DecodeVecShiftR64Imm(), DecodeVecShiftR64ImmNarrow(), and DecodeVecShiftR8Imm().
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Definition at line 1765 of file AArch64Disassembler.cpp.
References Addr, and DecodeGPRSeqPairsClassRegisterClass().
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Definition at line 1773 of file AArch64Disassembler.cpp.
References Addr, and DecodeGPRSeqPairsClassRegisterClass().
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Definition at line 571 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 582 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 593 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 563 of file AArch64Disassembler.cpp.
References DecodeZPRRegisterClass(), and Fail.
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Definition at line 555 of file AArch64Disassembler.cpp.
References DecodeZPRRegisterClass(), and Fail.
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Definition at line 543 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeSVELogicalImmInstruction(), DecodeZPR_3bRegisterClass(), and DecodeZPR_4bRegisterClass().
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Disassembler | ( | ) |
Definition at line 362 of file AArch64Disassembler.cpp.
References createAArch64Disassembler(), createAArch64ExternalSymbolizer(), llvm::getTheAArch64_32Target(), llvm::getTheAArch64beTarget(), llvm::getTheAArch64leTarget(), llvm::getTheARM64_32Target(), llvm::getTheARM64Target(), llvm::TargetRegistry::RegisterMCDisassembler(), and llvm::TargetRegistry::RegisterMCSymbolizer().
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Definition at line 615 of file AArch64Disassembler.cpp.
Referenced by DecodeMatrixTile().