LLVM 18.0.0git
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#include "AArch64Disassembler.h"
#include "AArch64ExternalSymbolizer.h"
#include "MCTargetDesc/AArch64AddressingModes.h"
#include "MCTargetDesc/AArch64MCTargetDesc.h"
#include "TargetInfo/AArch64TargetInfo.h"
#include "Utils/AArch64BaseInfo.h"
#include "llvm-c/Disassembler.h"
#include "llvm/MC/MCDecoderOps.h"
#include "llvm/MC/MCDisassembler/MCRelocationInfo.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include <algorithm>
#include <memory>
#include "AArch64GenDisassemblerTables.inc"
#include "AArch64GenInstrInfo.inc"
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "aarch64-disassembler" |
#define | Success MCDisassembler::Success |
#define | Fail MCDisassembler::Fail |
#define | SoftFail MCDisassembler::SoftFail |
Typedefs | |
using | DecodeStatus = MCDisassembler::DecodeStatus |
Variables | |
static const MCPhysReg | MatrixZATileDecoderTable [5][16] |
#define DEBUG_TYPE "aarch64-disassembler" |
Definition at line 34 of file AArch64Disassembler.cpp.
#define Fail MCDisassembler::Fail |
Definition at line 307 of file AArch64Disassembler.cpp.
#define SoftFail MCDisassembler::SoftFail |
Definition at line 308 of file AArch64Disassembler.cpp.
#define Success MCDisassembler::Success |
Definition at line 306 of file AArch64Disassembler.cpp.
Definition at line 37 of file AArch64Disassembler.cpp.
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Definition at line 310 of file AArch64Disassembler.cpp.
Referenced by LLVMInitializeAArch64Disassembler().
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Definition at line 391 of file AArch64Disassembler.cpp.
Referenced by LLVMInitializeAArch64Disassembler().
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Definition at line 1634 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR32spRegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), and Success.
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Definition at line 1797 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR32spRegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 1779 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeGPR64RegisterClass(), Fail, Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 1601 of file AArch64Disassembler.cpp.
References Addr, DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), SoftFail, and Success.
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Definition at line 2028 of file AArch64Disassembler.cpp.
References Addr, DecodeGPR64commonRegisterClass(), DecodeGPR64RegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 863 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 852 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 841 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 1385 of file AArch64Disassembler.cpp.
References Addr, DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), Opcode, SoftFail, and Success.
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Definition at line 874 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 883 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 931 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Address, llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), DecodeGPR64RegisterClass(), Insn, and Success.
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Definition at line 444 of file AArch64Disassembler.cpp.
References Addr, DecodeFPR128RegisterClass(), and Fail.
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Definition at line 436 of file AArch64Disassembler.cpp.
References Addr, DecodeFPR128RegisterClass(), and Fail.
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Definition at line 423 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeFMOVLaneInstruction(), DecodeFPR128_0to7RegisterClass(), DecodeFPR128_loRegisterClass(), DecodeModImmInstruction(), DecodeModImmTiedInstruction(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 475 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 463 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 451 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeModImmInstruction(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 487 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 577 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeExclusiveLdStInstruction(), DecodeLogicalImmInstruction(), DecodeMoveImmInstruction(), DecodePairLdStInstruction(), DecodePRFMRegInstruction(), DecodeSignedLdStInstruction(), DecodeTestAndBranch(), DecodeThreeAddrSRegInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 589 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), and DecodeLogicalImmInstruction().
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Definition at line 500 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeCPYMemOpInstruction(), and DecodeSETMemOpInstruction().
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Definition at line 512 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeAdrInstruction(), DecodeAuthLoadInstruction(), DecodeCPYMemOpInstruction(), DecodeExclusiveLdStInstruction(), DecodeFMOVLaneInstruction(), DecodeLogicalImmInstruction(), DecodeMoveImmInstruction(), DecodePairLdStInstruction(), DecodePRFMRegInstruction(), DecodeSETMemOpInstruction(), DecodeSignedLdStInstruction(), DecodeSyspXzrInstruction(), DecodeTestAndBranch(), DecodeThreeAddrSRegInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 539 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeAuthLoadInstruction(), DecodeExclusiveLdStInstruction(), DecodeLogicalImmInstruction(), DecodePairLdStInstruction(), DecodePRFMRegInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 525 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 1920 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeWSeqPairsClassRegisterClass(), and DecodeXSeqPairsClassRegisterClass().
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Definition at line 2000 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 1691 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR32spRegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), llvm::AArch64_AM::isValidDecodeLogicalImmediate(), and Success.
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Definition at line 564 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 551 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 730 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, MatrixZATileDecoderTable, and Success.
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Definition at line 709 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, RegMask, and Success.
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Definition at line 905 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
Referenced by DecodePRFMRegInstruction().
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Definition at line 1722 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), DecodeFPR64RegisterClass(), llvm::MCInst::getOpcode(), and Success.
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Definition at line 1761 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), and Success.
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Definition at line 1094 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), Fail, llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), and Success.
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Definition at line 913 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 923 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 1467 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), DecodeFPR32RegisterClass(), DecodeFPR64RegisterClass(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), Opcode, SoftFail, and Success.
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Definition at line 890 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), llvm::MCInst::getOpcode(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 776 of file AArch64Disassembler.cpp.
References Addr, DecodePNRRegisterClass(), and Fail.
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Definition at line 753 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodePNR_p8to15RegisterClass().
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Definition at line 797 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 785 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 765 of file AArch64Disassembler.cpp.
References Addr, DecodePPRRegisterClass(), and Fail.
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Definition at line 741 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodePPR_3bRegisterClass().
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Definition at line 2077 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), DecodeMemExtend(), Fail, llvm::MCInst::getOpcode(), and Success.
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Definition at line 830 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 819 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 808 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 2053 of file AArch64Disassembler.cpp.
References Addr, DecodeGPR64commonRegisterClass(), DecodeGPR64RegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 1186 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), DecodeFPR16RegisterClass(), DecodeFPR32RegisterClass(), DecodeFPR64RegisterClass(), DecodeFPR8RegisterClass(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), SoftFail, and Success.
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Definition at line 1985 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 2019 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 2012 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 1969 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeZPRRegisterClass(), Fail, llvm::MCInst::getOpcode(), llvm::AArch64_AM::isValidDecodeLogicalImmediate(), and Success.
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Definition at line 1948 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeGPR64RegisterClass(), Fail, and Success.
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Definition at line 1854 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), isInvalidPState(), and Success.
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Definition at line 1875 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), isInvalidPState(), and Success.
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Definition at line 1896 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 1033 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), Fail, llvm::MCInst::getOpcode(), and Success.
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Definition at line 1832 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 1128 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), Addr, llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), DecodeFPR16RegisterClass(), DecodeFPR32RegisterClass(), DecodeFPR64RegisterClass(), DecodeFPR8RegisterClass(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), Fail, llvm::MCInst::getOpcode(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 1020 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 1014 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 1008 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 1026 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 960 of file AArch64Disassembler.cpp.
References llvm::Add, llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
Referenced by DecodeVecShiftL16Imm(), DecodeVecShiftL32Imm(), DecodeVecShiftL64Imm(), and DecodeVecShiftL8Imm().
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Definition at line 990 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 996 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 978 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 984 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 966 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 972 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 1002 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 954 of file AArch64Disassembler.cpp.
References llvm::Add, llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
Referenced by DecodeVecShiftR16Imm(), DecodeVecShiftR16ImmNarrow(), DecodeVecShiftR32Imm(), DecodeVecShiftR32ImmNarrow(), DecodeVecShiftR64Imm(), DecodeVecShiftR64ImmNarrow(), and DecodeVecShiftR8Imm().
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Definition at line 1933 of file AArch64Disassembler.cpp.
References Addr, and DecodeGPRSeqPairsClassRegisterClass().
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Definition at line 1941 of file AArch64Disassembler.cpp.
References Addr, and DecodeGPRSeqPairsClassRegisterClass().
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Definition at line 662 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 629 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 684 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 640 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 673 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 651 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 696 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 621 of file AArch64Disassembler.cpp.
References llvm::Address, DecodeZPRRegisterClass(), and Fail.
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Definition at line 613 of file AArch64Disassembler.cpp.
References llvm::Address, DecodeZPRRegisterClass(), and Fail.
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Definition at line 601 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeSVELogicalImmInstruction(), DecodeZPR_3bRegisterClass(), and DecodeZPR_4bRegisterClass().
Definition at line 1847 of file AArch64Disassembler.cpp.
Referenced by DecodeSystemPStateImm0_15Instruction(), and DecodeSystemPStateImm0_1Instruction().
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Disassembler | ( | ) |
Definition at line 399 of file AArch64Disassembler.cpp.
References createAArch64Disassembler(), createAArch64ExternalSymbolizer(), llvm::getTheAArch64_32Target(), llvm::getTheAArch64beTarget(), llvm::getTheAArch64leTarget(), llvm::getTheARM64_32Target(), llvm::getTheARM64Target(), llvm::TargetRegistry::RegisterMCDisassembler(), and llvm::TargetRegistry::RegisterMCSymbolizer().
Definition at line 718 of file AArch64Disassembler.cpp.
Referenced by DecodeMatrixTile().