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LLVM 24.0.0git
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#include "MCTargetDesc/RISCVBaseInfo.h"#include "MCTargetDesc/RISCVMCTargetDesc.h"#include "TargetInfo/RISCVTargetInfo.h"#include "llvm/MC/MCContext.h"#include "llvm/MC/MCDecoder.h"#include "llvm/MC/MCDecoderOps.h"#include "llvm/MC/MCDisassembler/MCDisassembler.h"#include "llvm/MC/MCInst.h"#include "llvm/MC/MCInstrInfo.h"#include "llvm/MC/MCRegisterInfo.h"#include "llvm/MC/MCSubtargetInfo.h"#include "llvm/MC/TargetRegistry.h"#include "llvm/Support/Compiler.h"#include "llvm/Support/Endian.h"#include "RISCVGenDisassemblerTables.inc"Go to the source code of this file.
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| #define | DEBUG_TYPE "riscv-disassembler" |
Variables | |
| constexpr auto | DecodeGPRRegisterClass |
| constexpr auto | DecodeYGPRRegisterClass |
| constexpr auto | DecodeGPRNoX0RegisterClass |
| constexpr auto | DecodeYGPRNoX0RegisterClass |
| constexpr auto | DecodeGPRNoX2RegisterClass |
| constexpr auto | DecodeGPRNoX31RegisterClass |
| constexpr auto | DecodeGPRX1X5RegisterClass |
| constexpr auto | DecodeGPRPairNoX0RegisterClass |
| static constexpr FeatureBitset | XCVFeatureGroup |
| static constexpr FeatureBitset | XqciFeatureGroup |
| static constexpr FeatureBitset | XSfVectorGroup |
| static constexpr FeatureBitset | XSfSystemGroup |
| static constexpr FeatureBitset | XMIPSGroup |
| static constexpr FeatureBitset | XTHeadGroup |
| static constexpr FeatureBitset | XAndesGroup |
| static constexpr FeatureBitset | XSMTGroup |
| static constexpr FeatureBitset | XAIFGroup = {RISCV::FeatureVendorXAIFET} |
| static constexpr DecoderListEntry | DecoderList32 [] |
| static constexpr DecoderListEntry | DecoderList16 [] |
| static constexpr DecoderListEntry | DecoderList48 [] |
| #define DEBUG_TYPE "riscv-disassembler" |
Definition at line 31 of file RISCVDisassembler.cpp.
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Definition at line 62 of file RISCVDisassembler.cpp.
References T.
Referenced by LLVMInitializeRISCVDisassembler().
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Definition at line 69 of file RISCVDisassembler.cpp.
References llvm::createMCSymbolizer().
Referenced by LLVMInitializeRISCVDisassembler().
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Definition at line 450 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, llvm::MCDisassembler::Fail, Imm, llvm::isUInt(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
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Definition at line 471 of file RISCVDisassembler.cpp.
References Decoder, decodeUImmOperand(), llvm::MCDisassembler::Fail, llvm::MCOperand::getImm(), llvm::MCInst::getNumOperands(), llvm::MCInst::getOperand(), and Imm.
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Definition at line 138 of file RISCVDisassembler.cpp.
References Decoder, llvm::MCDisassembler::Fail, and uint64_t.
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Definition at line 314 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Decoder, Imm, and llvm::MCDisassembler::Success.
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Definition at line 461 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, llvm::MCDisassembler::Fail, Imm, llvm::isUInt(), llvm::RISCVFPRndMode::isValidRoundingMode(), and llvm::MCDisassembler::Success.
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Definition at line 214 of file RISCVDisassembler.cpp.
References DecodeGPRPairRegisterClass(), Decoder, llvm::MCDisassembler::Fail, and uint64_t.
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Definition at line 191 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Fail, llvm::MCRegisterInfo::getMatchingSuperReg(), Reg, llvm::MCDisassembler::Success, and uint64_t.
Referenced by DecodeGPRPairCRegisterClass().
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Definition at line 223 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Fail, Reg, llvm::MCDisassembler::Success, and uint64_t.
Referenced by decodeMvsa01Rs2Operand().
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Definition at line 385 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), and llvm::MCDisassembler::Success.
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Definition at line 498 of file RISCVDisassembler.cpp.
References DecodeGPRS07RegisterClass(), Decoder, llvm::MCDisassembler::Fail, llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), llvm::MCDisassembler::Success, and uint64_t.
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Definition at line 403 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
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Definition at line 430 of file RISCVDisassembler.cpp.
References Decoder, decodeSImmOperand(), llvm::MCDisassembler::Fail, and Imm.
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Definition at line 394 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
Referenced by decodeSImmNonZeroOperand().
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Definition at line 439 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), N, llvm::SignExtend64(), and llvm::MCDisassembler::Success.
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Definition at line 102 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Fail, Reg, llvm::MCDisassembler::Success, and uint64_t.
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Definition at line 126 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Decoder, and llvm::MCDisassembler::Success.
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Definition at line 117 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Success, and uint64_t.
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Definition at line 162 of file RISCVDisassembler.cpp.
References DecodeGPRRegisterClass, Decoder, llvm::MCDisassembler::Fail, llvm::MCInst::getNumOperands(), llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), llvm::MCDisassembler::Success, and uint64_t.
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Definition at line 176 of file RISCVDisassembler.cpp.
References DecodeGPRRegisterClass, Decoder, llvm::MCDisassembler::Fail, llvm::MCInst::getNumOperands(), llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), llvm::MCDisassembler::Success, and uint64_t.
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Definition at line 254 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Fail, Reg, llvm::MCDisassembler::Success, and uint64_t.
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Definition at line 265 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Fail, Reg, llvm::MCDisassembler::Success, and uint64_t.
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Definition at line 416 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
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Definition at line 365 of file RISCVDisassembler.cpp.
References Decoder, decodeUImmLog2XLenOperand(), llvm::MCDisassembler::Fail, and Imm.
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Definition at line 342 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, llvm::MCDisassembler::Fail, Imm, llvm::isUInt(), and llvm::MCDisassembler::Success.
Referenced by decodeUImmLog2XLenNonZeroOperand().
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Definition at line 356 of file RISCVDisassembler.cpp.
References Decoder, decodeUImmOperand(), llvm::MCDisassembler::Fail, and Imm.
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Definition at line 321 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, llvm::MCDisassembler::Fail, Imm, llvm::isUInt(), and llvm::MCDisassembler::Success.
Referenced by decodeCVInsertIs2Operand(), and decodeUImmNonZeroOperand().
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Definition at line 373 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, llvm::MCDisassembler::Fail, Imm, llvm::isUInt(), and llvm::MCDisassembler::Success.
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Definition at line 333 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), and llvm::MCDisassembler::Success.
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Definition at line 237 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Fail, llvm::MCRegisterInfo::getMatchingSuperReg(), Reg, llvm::MCDisassembler::Success, and uint64_t.
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Definition at line 301 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Fail, Reg, llvm::MCDisassembler::Success, and uint64_t.
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Definition at line 490 of file RISCVDisassembler.cpp.
References Decoder, decodeZcmpRlist(), llvm::MCDisassembler::Fail, Imm, llvm::RISCVZC::RA_S0, and uint64_t.
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Definition at line 276 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.
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Definition at line 480 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Decoder, llvm::MCDisassembler::Fail, Imm, llvm::RISCVZC::RA, llvm::RISCVZC::RA_S0_S2, llvm::MCDisassembler::Success, and uint64_t.
Referenced by decodeXqccmpRlistS0().
| LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVDisassembler | ( | ) |
Definition at line 81 of file RISCVDisassembler.cpp.
References createRISCVDisassembler(), createRISCVMCSymbolizer(), llvm::getTheRISCV32beTarget(), llvm::getTheRISCV32Target(), llvm::getTheRISCV64beTarget(), llvm::getTheRISCV64Target(), llvm::TargetRegistry::RegisterMCDisassembler(), and llvm::TargetRegistry::RegisterMCSymbolizer().
Definition at line 146 of file RISCVDisassembler.cpp.
Definition at line 147 of file RISCVDisassembler.cpp.
Definition at line 148 of file RISCVDisassembler.cpp.
Definition at line 149 of file RISCVDisassembler.cpp.
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Definition at line 151 of file RISCVDisassembler.cpp.
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Definition at line 155 of file RISCVDisassembler.cpp.
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Definition at line 157 of file RISCVDisassembler.cpp.
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Definition at line 211 of file RISCVDisassembler.cpp.
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Definition at line 132 of file RISCVDisassembler.cpp.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeAddrMode5FP16Operand(), DecodeAddrMode5Operand(), DecodeAddrMode6Operand(), DecodeAddrMode7Operand(), DecodeAddrModeImm12Operand(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeForVMRSandVMSR(), DecodeGPRnopcRegisterClass(), DecodeGPRNoR0R1RegisterClass(), DecodeGPRnospRegisterClass(), DecodeGPRwithAPSRRegisterClass(), DecodeGPRwithZRRegisterClass(), DecodeLazyLoadStoreMul(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeMVEVMOVDRegtoQ(), DecodeMVEVMOVQtoDReg(), DecodeRegListOperand(), DecodeRegSeqOperand(), DecodeRFEInstruction(), DecoderGPRRegisterClass(), DecodeSORegMemOperand(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeT2AddrModeImm12(), DecodeT2AddrModeImm8(), DecodeT2AddrModeImm8s4(), DecodeT2AddrModeSOReg(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodetGPRRegisterClass(), decodeTHMemIdxRs1Operand(), decodeTHMemPairRs1Operand(), DecodeThumbAddSPReg(), DecodeThumbTableBranch(), DecodeTSTInstruction(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVMOVRRS(), DecodeVMOVSRR(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().
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Definition at line 159 of file RISCVDisassembler.cpp.
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Definition at line 638 of file RISCVDisassembler.cpp.
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Definition at line 583 of file RISCVDisassembler.cpp.
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Definition at line 686 of file RISCVDisassembler.cpp.
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Definition at line 153 of file RISCVDisassembler.cpp.
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Definition at line 134 of file RISCVDisassembler.cpp.
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Definition at line 581 of file RISCVDisassembler.cpp.
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Definition at line 572 of file RISCVDisassembler.cpp.
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Definition at line 527 of file RISCVDisassembler.cpp.
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Definition at line 557 of file RISCVDisassembler.cpp.
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Definition at line 533 of file RISCVDisassembler.cpp.
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Definition at line 552 of file RISCVDisassembler.cpp.
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Definition at line 545 of file RISCVDisassembler.cpp.
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Definition at line 578 of file RISCVDisassembler.cpp.
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Definition at line 564 of file RISCVDisassembler.cpp.