LLVM 22.0.0git
GCNPreRAOptimizations.cpp File Reference

This pass combines split register tuple initialization into a single pseudo: More...

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Macros

#define DEBUG_TYPE   "amdgpu-pre-ra-optimizations"

Functions

 INITIALIZE_PASS_BEGIN (GCNPreRAOptimizationsLegacy, DEBUG_TYPE, "AMDGPU Pre-RA optimizations", false, false) INITIALIZE_PASS_END(GCNPreRAOptimizationsLegacy

Variables

 DEBUG_TYPE
Pre RA optimizations
Pre RA false

Detailed Description

This pass combines split register tuple initialization into a single pseudo:

undef %0.sub1:sreg_64 = S_MOV_B32 1 %0.sub0:sreg_64 = S_MOV_B32 2 => %0:sreg_64 = S_MOV_B64_IMM_PSEUDO 0x200000001

This is to allow rematerialization of a value instead of spilling. It is supposed to be done after register coalescer to allow it to do its job and before actual register allocation to allow rematerialization.

Right now the pass only handles 64 bit SGPRs with immediate initializers, although the same shall be possible with other register classes and instructions if necessary.

This pass also adds register allocation hints to COPY. The hints will be post-processed by SIRegisterInfo::getRegAllocationHints. When using True16, we often see COPY moving a 16-bit value between a VGPR_32 and a VGPR_16. If we use the VGPR_16 that corresponds to the lo16 bits of the VGPR_32, the COPY can be completely eliminated.

Definition in file GCNPreRAOptimizations.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "amdgpu-pre-ra-optimizations"

Definition at line 44 of file GCNPreRAOptimizations.cpp.

Function Documentation

◆ INITIALIZE_PASS_BEGIN()

INITIALIZE_PASS_BEGIN ( GCNPreRAOptimizationsLegacy ,
DEBUG_TYPE ,
"AMDGPU Pre-RA optimizations" ,
false ,
false  )

Variable Documentation

◆ DEBUG_TYPE

DEBUG_TYPE

Definition at line 87 of file GCNPreRAOptimizations.cpp.

◆ false

Pre RA false

Definition at line 88 of file GCNPreRAOptimizations.cpp.

◆ optimizations

Pre RA optimizations

Definition at line 88 of file GCNPreRAOptimizations.cpp.