LLVM 17.0.0git
Classes | Macros | Functions | Variables
GCNSchedStrategy.cpp File Reference

This contains a MachineSchedStrategy implementation for maximizing wave occupancy on GCN hardware. More...

#include "GCNSchedStrategy.h"
#include "AMDGPUIGroupLP.h"
#include "SIMachineFunctionInfo.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
Include dependency graph for GCNSchedStrategy.cpp:

Go to the source code of this file.

Classes

struct  EarlierIssuingCycle
 

Macros

#define DEBUG_TYPE   "machine-scheduler"
 Generally, the reason for having multiple scheduling stages is to account for the kernel-wide effect of register usage on occupancy.
 

Functions

static void printScheduleModel (std::set< std::pair< MachineInstr *, unsigned >, EarlierIssuingCycle > &ReadyCycles)
 
static bool hasIGLPInstrs (ScheduleDAGInstrs *DAG)
 

Variables

static cl::opt< boolDisableUnclusterHighRP ("amdgpu-disable-unclustred-high-rp-reschedule", cl::Hidden, cl::desc("Disable unclustred high register pressure " "reduction scheduling stage."), cl::init(false))
 
static cl::opt< unsignedScheduleMetricBias ("amdgpu-schedule-metric-bias", cl::Hidden, cl::desc("Sets the bias which adds weight to occupancy vs latency. Set it to " "100 to chase the occupancy only."), cl::init(10))
 

Detailed Description

This contains a MachineSchedStrategy implementation for maximizing wave occupancy on GCN hardware.

This pass will apply multiple scheduling stages to the same function. Regions are first recorded in GCNScheduleDAGMILive::schedule. The actual entry point for the scheduling of those regions is GCNScheduleDAGMILive::runSchedStages.

Definition in file GCNSchedStrategy.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "machine-scheduler"

Generally, the reason for having multiple scheduling stages is to account for the kernel-wide effect of register usage on occupancy.

Usually, only a few scheduling regions will have register pressure high enough to limit occupancy for the kernel, so constraints can be relaxed to improve ILP in other regions.

Definition at line 31 of file GCNSchedStrategy.cpp.

Function Documentation

◆ hasIGLPInstrs()

static bool hasIGLPInstrs ( ScheduleDAGInstrs DAG)
static

◆ printScheduleModel()

static void printScheduleModel ( std::set< std::pair< MachineInstr *, unsigned >, EarlierIssuingCycle > &  ReadyCycles)
static

Definition at line 984 of file GCNSchedStrategy.cpp.

References llvm::dbgs(), and I.

Referenced by llvm::GCNSchedStage::getScheduleMetrics().

Variable Documentation

◆ DisableUnclusterHighRP

cl::opt< bool > DisableUnclusterHighRP("amdgpu-disable-unclustred-high-rp-reschedule", cl::Hidden, cl::desc("Disable unclustred high register pressure " "reduction scheduling stage."), cl::init(false)) ( "amdgpu-disable-unclustred-high-rp-reschedule"  ,
cl::Hidden  ,
cl::desc("Disable unclustred high register pressure " "reduction scheduling stage.")  ,
cl::init(false)   
)
static

◆ ScheduleMetricBias

cl::opt< unsigned > ScheduleMetricBias("amdgpu-schedule-metric-bias", cl::Hidden, cl::desc( "Sets the bias which adds weight to occupancy vs latency. Set it to " "100 to chase the occupancy only."), cl::init(10)) ( "amdgpu-schedule-metric-bias"  ,
cl::Hidden  ,
cl::desc( "Sets the bias which adds weight to occupancy vs latency. Set it to " "100 to chase the occupancy only.")  ,
cl::init(10)   
)
static