LLVM 20.0.0git
Macros | Functions | Variables
GCNRegPressure.cpp File Reference

This file implements the GCNRegPressure class. More...

#include "GCNRegPressure.h"
#include "AMDGPU.h"
#include "llvm/CodeGen/RegisterPressure.h"

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "machine-scheduler"
 
#define PFX   " "
 

Functions

static LaneBitmask getDefRegMask (const MachineOperand &MO, const MachineRegisterInfo &MRI)
 
static void collectVirtualRegUses (SmallVectorImpl< RegisterMaskPair > &RegMaskPairs, const MachineInstr &MI, const LiveIntervals &LIS, const MachineRegisterInfo &MRI)
 
static LaneBitmask getLanesWithProperty (const LiveIntervals &LIS, const MachineRegisterInfo &MRI, bool TrackLaneMasks, Register RegUnit, SlotIndex Pos, LaneBitmask SafeDefault, function_ref< bool(const LiveRange &LR, SlotIndex Pos)> Property)
 Mostly copy/paste from CodeGen/RegisterPressure.cpp.
 
static LaneBitmask findUseBetween (unsigned Reg, LaneBitmask LastUseMask, SlotIndex PriorUseIdx, SlotIndex NextUseIdx, const MachineRegisterInfo &MRI, const SIRegisterInfo *TRI, const LiveIntervals *LIS, bool Upward=false)
 Mostly copy/paste from CodeGen/RegisterPressure.cpp Helper to find a vreg use between two indices {PriorUseIdx, NextUseIdx}.
 
static LaneBitmask getRegLiveThroughMask (const MachineRegisterInfo &MRI, const LiveIntervals &LIS, Register Reg, SlotIndex Begin, SlotIndex End, LaneBitmask Mask=LaneBitmask::getAll())
 

Variables

static cl::opt< boolUseDownwardTracker ("amdgpu-print-rp-downward", cl::desc("Use GCNDownwardRPTracker for GCNRegPressurePrinter pass"), cl::init(false), cl::Hidden)
 

Detailed Description

This file implements the GCNRegPressure class.

Definition in file GCNRegPressure.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "machine-scheduler"

Definition at line 20 of file GCNRegPressure.cpp.

◆ PFX

#define PFX   " "

Function Documentation

◆ collectVirtualRegUses()

static void collectVirtualRegUses ( SmallVectorImpl< RegisterMaskPair > &  RegMaskPairs,
const MachineInstr MI,
const LiveIntervals LIS,
const MachineRegisterInfo MRI 
)
static

◆ findUseBetween()

static LaneBitmask findUseBetween ( unsigned  Reg,
LaneBitmask  LastUseMask,
SlotIndex  PriorUseIdx,
SlotIndex  NextUseIdx,
const MachineRegisterInfo MRI,
const SIRegisterInfo TRI,
const LiveIntervals LIS,
bool  Upward = false 
)
static

Mostly copy/paste from CodeGen/RegisterPressure.cpp Helper to find a vreg use between two indices {PriorUseIdx, NextUseIdx}.

The query starts with a lane bitmask which gets lanes/bits removed for every use we find.

Definition at line 331 of file GCNRegPressure.cpp.

References llvm::LiveIntervals::getInstructionIndex(), llvm::LaneBitmask::getNone(), llvm::SlotIndex::getRegSlot(), InRange(), MI, MRI, llvm::LaneBitmask::none(), and TRI.

◆ getDefRegMask()

static LaneBitmask getDefRegMask ( const MachineOperand MO,
const MachineRegisterInfo MRI 
)
static

◆ getLanesWithProperty()

static LaneBitmask getLanesWithProperty ( const LiveIntervals LIS,
const MachineRegisterInfo MRI,
bool  TrackLaneMasks,
Register  RegUnit,
SlotIndex  Pos,
LaneBitmask  SafeDefault,
function_ref< bool(const LiveRange &LR, SlotIndex Pos)>  Property 
)
static

◆ getRegLiveThroughMask()

static LaneBitmask getRegLiveThroughMask ( const MachineRegisterInfo MRI,
const LiveIntervals LIS,
Register  Reg,
SlotIndex  Begin,
SlotIndex  End,
LaneBitmask  Mask = LaneBitmask::getAll() 
)
static

Variable Documentation

◆ UseDownwardTracker

cl::opt< bool > UseDownwardTracker("amdgpu-print-rp-downward", cl::desc("Use GCNDownwardRPTracker for GCNRegPressurePrinter pass"), cl::init(false), cl::Hidden) ( "amdgpu-print-rp-downward"  ,
cl::desc("Use GCNDownwardRPTracker for GCNRegPressurePrinter pass")  ,
cl::init(false)  ,
cl::Hidden   
)
static