LLVM  14.0.0git
Macros | Functions
SIShrinkInstructions.cpp File Reference
#include "AMDGPU.h"
#include "GCNSubtarget.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
Include dependency graph for SIShrinkInstructions.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "si-shrink-instructions"
 The pass tries to use the 32-bit encoding for instructions when possible. More...
 

Functions

 STATISTIC (NumInstructionsShrunk, "Number of 64-bit instruction reduced to 32-bit.")
 
 STATISTIC (NumLiteralConstantsFolded, "Number of literal constants folded into 32-bit instructions.")
 
static bool foldImmediates (MachineInstr &MI, const SIInstrInfo *TII, MachineRegisterInfo &MRI, bool TryToCommute=true)
 This function checks MI for operands defined by a move immediate instruction and then folds the literal constant into the instruction if it can. More...
 
static bool isKImmOperand (const SIInstrInfo *TII, const MachineOperand &Src)
 
static bool isKUImmOperand (const SIInstrInfo *TII, const MachineOperand &Src)
 
static bool isKImmOrKUImmOperand (const SIInstrInfo *TII, const MachineOperand &Src, bool &IsUnsigned)
 
static bool isReverseInlineImm (const SIInstrInfo *TII, const MachineOperand &Src, int32_t &ReverseImm)
 
static void copyExtraImplicitOps (MachineInstr &NewMI, MachineFunction &MF, const MachineInstr &MI)
 Copy implicit register operands from specified instruction to this instruction that are not part of the instruction definition. More...
 
static void shrinkScalarCompare (const SIInstrInfo *TII, MachineInstr &MI)
 
static bool shrinkScalarLogicOp (const GCNSubtarget &ST, MachineRegisterInfo &MRI, const SIInstrInfo *TII, MachineInstr &MI)
 Attempt to shink AND/OR/XOR operations requiring non-inlineable literals. More...
 
static bool instAccessReg (iterator_range< MachineInstr::const_mop_iterator > &&R, Register Reg, unsigned SubReg, const SIRegisterInfo &TRI)
 
static bool instReadsReg (const MachineInstr *MI, unsigned Reg, unsigned SubReg, const SIRegisterInfo &TRI)
 
static bool instModifiesReg (const MachineInstr *MI, unsigned Reg, unsigned SubReg, const SIRegisterInfo &TRI)
 
static TargetInstrInfo::RegSubRegPair getSubRegForIndex (Register Reg, unsigned Sub, unsigned I, const SIRegisterInfo &TRI, const MachineRegisterInfo &MRI)
 
static void dropInstructionKeepingImpDefs (MachineInstr &MI, const SIInstrInfo *TII)
 
static MachineInstrmatchSwap (MachineInstr &MovT, MachineRegisterInfo &MRI, const SIInstrInfo *TII)
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "si-shrink-instructions"

The pass tries to use the 32-bit encoding for instructions when possible.

Definition at line 17 of file SIShrinkInstructions.cpp.

Function Documentation

◆ copyExtraImplicitOps()

static void copyExtraImplicitOps ( MachineInstr NewMI,
MachineFunction MF,
const MachineInstr MI 
)
static

Copy implicit register operands from specified instruction to this instruction that are not part of the instruction definition.

Definition at line 159 of file SIShrinkInstructions.cpp.

References llvm::MachineInstr::addOperand(), llvm::numbers::e, i, llvm::MachineOperand::isImplicit(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isRegMask(), and MI.

◆ dropInstructionKeepingImpDefs()

static void dropInstructionKeepingImpDefs ( MachineInstr MI,
const SIInstrInfo TII 
)
static

Definition at line 438 of file SIShrinkInstructions.cpp.

References llvm::BuildMI(), llvm::numbers::e, i, MI, and TII.

Referenced by matchSwap().

◆ foldImmediates()

static bool foldImmediates ( MachineInstr MI,
const SIInstrInfo TII,
MachineRegisterInfo MRI,
bool  TryToCommute = true 
)
static

◆ getSubRegForIndex()

static TargetInstrInfo::RegSubRegPair getSubRegForIndex ( Register  Reg,
unsigned  Sub,
unsigned  I,
const SIRegisterInfo TRI,
const MachineRegisterInfo MRI 
)
static

◆ instAccessReg()

static bool instAccessReg ( iterator_range< MachineInstr::const_mop_iterator > &&  R,
Register  Reg,
unsigned  SubReg,
const SIRegisterInfo TRI 
)
static

◆ instModifiesReg()

static bool instModifiesReg ( const MachineInstr MI,
unsigned  Reg,
unsigned  SubReg,
const SIRegisterInfo TRI 
)
static

Definition at line 419 of file SIShrinkInstructions.cpp.

References instAccessReg(), MI, Reg, SubReg, and TRI.

Referenced by matchSwap().

◆ instReadsReg()

static bool instReadsReg ( const MachineInstr MI,
unsigned  Reg,
unsigned  SubReg,
const SIRegisterInfo TRI 
)
static

Definition at line 413 of file SIShrinkInstructions.cpp.

References instAccessReg(), MI, Reg, SubReg, and TRI.

Referenced by matchSwap().

◆ isKImmOperand()

static bool isKImmOperand ( const SIInstrInfo TII,
const MachineOperand Src 
)
static

Definition at line 117 of file SIShrinkInstructions.cpp.

References llvm::isInt< 16 >(), and TII.

Referenced by shrinkScalarCompare().

◆ isKImmOrKUImmOperand()

static bool isKImmOrKUImmOperand ( const SIInstrInfo TII,
const MachineOperand Src,
bool &  IsUnsigned 
)
static

Definition at line 129 of file SIShrinkInstructions.cpp.

References llvm::isInt< 16 >(), llvm::isUInt< 16 >(), and TII.

Referenced by shrinkScalarCompare().

◆ isKUImmOperand()

static bool isKUImmOperand ( const SIInstrInfo TII,
const MachineOperand Src 
)
static

Definition at line 123 of file SIShrinkInstructions.cpp.

References llvm::isUInt< 16 >(), and TII.

Referenced by shrinkScalarCompare().

◆ isReverseInlineImm()

static bool isReverseInlineImm ( const SIInstrInfo TII,
const MachineOperand Src,
int32_t &  ReverseImm 
)
static
Returns
true if the constant in Src should be replaced with a bitreverse of an inline immediate.

Definition at line 147 of file SIShrinkInstructions.cpp.

References llvm::isInt< 32 >(), and TII.

◆ matchSwap()

static MachineInstr* matchSwap ( MachineInstr MovT,
MachineRegisterInfo MRI,
const SIInstrInfo TII 
)
static

◆ shrinkScalarCompare()

static void shrinkScalarCompare ( const SIInstrInfo TII,
MachineInstr MI 
)
static

◆ shrinkScalarLogicOp()

static bool shrinkScalarLogicOp ( const GCNSubtarget ST,
MachineRegisterInfo MRI,
const SIInstrInfo TII,
MachineInstr MI 
)
static

Attempt to shink AND/OR/XOR operations requiring non-inlineable literals.

For AND or OR, try using S_BITSET{0,1} to clear or set bits. If the inverse of the immediate is legal, use ANDN2, ORN2 or XNOR (as a ^ b == ~(a ^ ~b)).

Returns
true if the caller should continue the machine function iterator

Definition at line 314 of file SIShrinkInstructions.cpp.

References llvm::MachineOperand::ChangeToImmediate(), llvm::countTrailingOnes(), llvm::countTrailingZeros(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isImm(), llvm::AMDGPU::isInlinableLiteral32(), llvm::MachineOperand::isKill(), llvm::isPowerOf2_32(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUndef(), llvm::Register::isVirtual(), llvm_unreachable, MI, MRI, llvm::MachineOperand::setImm(), llvm::MachineRegisterInfo::setRegAllocationHint(), llvm::ARM_MB::ST, and TII.

◆ STATISTIC() [1/2]

STATISTIC ( NumInstructionsShrunk  ,
"Number of 64-bit instruction reduced to 32-bit."   
)

◆ STATISTIC() [2/2]

STATISTIC ( NumLiteralConstantsFolded  ,
"Number of literal constants folded into 32-bit instructions."   
)