LLVM 20.0.0git
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#include "ARMBaseInstrInfo.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "MCTargetDesc/ARMBaseInfo.h"
#include "MCTargetDesc/ARMMCTargetDesc.h"
#include "TargetInfo/ARMTargetInfo.h"
#include "Utils/ARMBaseInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDecoderOps.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/TargetParser/SubtargetFeature.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <vector>
#include "ARMGenDisassemblerTables.inc"
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "arm-disassembler" |
Typedefs | |
using | DecodeStatus = MCDisassembler::DecodeStatus |
typedef DecodeStatus | OperandDecoder(MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder) |
Variables | |
static const uint16_t | GPRDecoderTable [] |
static const uint16_t | CLRMGPRDecoderTable [] |
static const uint16_t | GPRPairDecoderTable [] |
static const uint16_t | SPRDecoderTable [] |
static const uint16_t | DPRDecoderTable [] |
static const uint16_t | QPRDecoderTable [] |
static const uint16_t | DPairDecoderTable [] |
static const uint16_t | DPairSpacedDecoderTable [] |
static const uint16_t | QQPRDecoderTable [] |
static const uint16_t | QQQQPRDecoderTable [] |
#define DEBUG_TYPE "arm-disassembler" |
Definition at line 35 of file ARMDisassembler.cpp.
Definition at line 37 of file ARMDisassembler.cpp.
typedef DecodeStatus OperandDecoder(MCInst &Inst, unsigned Val, uint64_t Address, const MCDisassembler *Decoder) |
Definition at line 686 of file ARMDisassembler.cpp.
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Definition at line 716 of file ARMDisassembler.cpp.
References Cond, llvm::MCDisassembler::Fail, Insn, MI, and llvm::MCDisassembler::SoftFail.
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Definition at line 709 of file ARMDisassembler.cpp.
Referenced by LLVMInitializeARMDisassembler().
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Definition at line 2049 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), Address, llvm::ARM_AM::asr, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeGPRnopcRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM2Opc(), llvm::MCInst::getOpcode(), llvm::ARMII::IndexModePost, llvm::ARMII::IndexModePre, Insn, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, P, pred, llvm::ARM_AM::ror, llvm::ARM_AM::rrx, llvm::MCDisassembler::SoftFail, llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
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Definition at line 2211 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::ARMII::IndexModePost, llvm::ARMII::IndexModePre, Insn, P, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 2864 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM5FP16Opc(), llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
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Definition at line 2843 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM5Opc(), llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
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Definition at line 2948 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeVLDInstruction(), and DecodeVSTInstruction().
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Definition at line 2885 of file ARMDisassembler.cpp.
References Address, and DecodeGPRRegisterClass().
Referenced by DecodeLDR().
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Definition at line 2822 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::Success, and tryAddingPcLoadReferenceComment().
Referenced by DecodeLDRPreImm(), and DecodeSTRPreImm().
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Definition at line 2714 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, pred, llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 5083 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 6313 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::MCOperand::createImm(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 6294 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, isNeg(), isSigned(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 1841 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Check, llvm::MCOperand::createImm(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 2918 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, pred, llvm::MCInst::setOpcode(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 1657 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddSubSPImm().
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Definition at line 1308 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), CLRMGPRDecoderTable, llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeRegListOperand().
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Definition at line 1869 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM5Opc(), llvm::MCInst::getOpcode(), Insn, pred, llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
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Definition at line 4821 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::isValidCoprocessorNumber(), and llvm::MCDisassembler::Success.
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Definition at line 2573 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, Insn, mode, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeQADDInstruction(), DecodeSMLAInstruction(), and DecodeSwap().
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Definition at line 5099 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRPairRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, Insn, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 5121 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRnopcRegisterClass(), DecodeGPRPairRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, Insn, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1604 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), DPairDecoderTable, llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeTBLInstruction(), DecodeVLD1DupInstruction(), DecodeVLD2DupInstruction(), DecodeVLDInstruction(), and DecodeVSTInstruction().
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Definition at line 1627 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), DPairSpacedDecoderTable, llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeVLD2DupInstruction(), DecodeVLDInstruction(), and DecodeVSTInstruction().
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Definition at line 1552 of file ARMDisassembler.cpp.
References Address, DecodeDPRRegisterClass(), and llvm::MCDisassembler::Fail.
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Definition at line 1568 of file ARMDisassembler.cpp.
References Address, DecodeDPRRegisterClass(), and llvm::MCDisassembler::Fail.
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Definition at line 1541 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), DPRDecoderTable, llvm::MCDisassembler::Fail, PermitsD32(), and llvm::MCDisassembler::Success.
Referenced by DecodeDPR_8RegisterClass(), DecodeDPR_VFP2RegisterClass(), DecodeDPRRegListOperand(), DecodeNEONComplexLane64Instruction(), DecodeTBLInstruction(), DecodeVCVTD(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVMOVModImmInstruction(), DecodeVSCCLRM(), DecodeVSHLMaxInstruction(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().
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Definition at line 1814 of file ARMDisassembler.cpp.
References Address, Check, DecodeDPRRegisterClass(), llvm::MCDisassembler::Fail, PermitsD32(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeVSCCLRM().
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Definition at line 6242 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::ARMCC::AL, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeGPRnopcRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1322 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeArmMOVTWInstruction(), DecodeDoubleRegStore(), DecodeForVMRSandVMSR(), DecodeLDR(), DecodeMveAddrModeRQ(), DecodePostIdxReg(), DecodeQADDInstruction(), DecoderForMRRC2AndMCRR2(), DecodeSMLAInstruction(), DecodeSORegRegOperand(), DecodeSwap(), DecodeT2AddrModeImm0_1020s4(), DecodeT2AddrModeImm7(), DecodeT2AddrModeImm7s4(), and DecodeVSTRVLDR_SYSREG().
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Definition at line 1335 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1423 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRPairDecoderTable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1404 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRPairDecoderTable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeDoubleRegLoad(), and DecodeDoubleRegStore().
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Definition at line 1297 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeAddrMode5FP16Operand(), DecodeAddrMode5Operand(), DecodeAddrMode6Operand(), DecodeAddrMode7Operand(), DecodeAddrModeImm12Operand(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeForVMRSandVMSR(), DecodeGPRnopcRegisterClass(), DecodeGPRnospRegisterClass(), DecodeGPRwithAPSRRegisterClass(), DecodeGPRwithZRRegisterClass(), DecodeLazyLoadStoreMul(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeMVEVMOVDRegtoQ(), DecodeMVEVMOVQtoDReg(), DecodeRegListOperand(), DecodeRFEInstruction(), DecoderGPRRegisterClass(), DecodeSORegMemOperand(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeT2AddrModeImm12(), DecodeT2AddrModeImm8(), DecodeT2AddrModeImm8s4(), DecodeT2AddrModeSOReg(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodetGPRRegisterClass(), DecodeThumbAddSPReg(), DecodeThumbTableBranch(), DecodeTSTInstruction(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVMOVRRS(), DecodeVMOVSRR(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().
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Definition at line 1436 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddSubSPImm().
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Definition at line 6432 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), GPRDecoderTable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1349 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createReg(), DecodeGPRRegisterClass(), and llvm::MCDisassembler::Success.
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Definition at line 1382 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRwithZRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 1364 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createReg(), DecodeGPRRegisterClass(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeGPRwithZRnospRegisterClass(), and DecodeMVEVCMP().
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Definition at line 2550 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), Insn, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1515 of file ARMDisassembler.cpp.
References Address, and DecodeSPRRegisterClass().
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Definition at line 4972 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 5853 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, Insn, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 7061 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::ARMCC::AL, Check, llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, Insn, and llvm::MCDisassembler::Success.
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Definition at line 6169 of file ARMDisassembler.cpp.
References Address, Check, Cond, DecodeAddrMode7Operand(), DecodeGPRnopcRegisterClass(), DecodePostIdxReg(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 5147 of file ARMDisassembler.cpp.
References Address, Check, DecodeAddrModeImm12Operand(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, Insn, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 5173 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSORegMemOperand(), llvm::MCDisassembler::Fail, Insn, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 6334 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createReg(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 6396 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 4962 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeThumb2BCCInstruction().
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Definition at line 2458 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeRegListOperand(), DecodeRFEInstruction(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, pred, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 6486 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, QPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeMVE_MEM_3_pre(), DecodeMVE_MEM_pre(), DecodeMveAddrModeQ(), DecodeMveAddrModeRQ(), DecodeMVEModImmInstruction(), DecodeMVEVADCInstruction(), DecodeMVEVCMP(), DecodeMVEVCVTt1fp(), DecodeMVEVMOVDRegtoQ(), and DecodeMVEVMOVQtoDReg().
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Definition at line 6502 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, QQPRDecoderTable, and llvm::MCDisassembler::Success.
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Definition at line 6518 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, QQQQPRDecoderTable, and llvm::MCDisassembler::Success.
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Definition at line 4982 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 6766 of file ARMDisassembler.cpp.
References Address, DecodeMVE_MEM_pre(), and DecodetGPRRegisterClass().
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Definition at line 6776 of file ARMDisassembler.cpp.
References Address, DecodeMVE_MEM_pre(), and DecoderGPRRegisterClass().
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Definition at line 6786 of file ARMDisassembler.cpp.
References Address, DecodeMQPRRegisterClass(), and DecodeMVE_MEM_pre().
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Definition at line 6746 of file ARMDisassembler.cpp.
References Address, Check, DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeMVE_MEM_1_pre(), DecodeMVE_MEM_2_pre(), and DecodeMVE_MEM_3_pre().
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Definition at line 4773 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, and llvm::MCDisassembler::Success.
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Definition at line 4757 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRnopcRegisterClass(), DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, and llvm::MCDisassembler::Success.
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Definition at line 3801 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, llvm::ARMVCC::None, and llvm::MCDisassembler::Success.
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Definition at line 6870 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecoderGPRRegisterClass(), DecodetGPREvenRegisterClass(), DecodetGPROddRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, llvm_unreachable, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 6810 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 3830 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, and llvm::MCDisassembler::Success.
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Definition at line 6970 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeGPRwithZRRegisterClass(), DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, llvm::ARMVCC::None, and llvm::MCDisassembler::Success.
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Definition at line 7007 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createReg(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, and llvm::MCDisassembler::Success.
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Definition at line 6949 of file ARMDisassembler.cpp.
References Address, Check, DecodeMQPRRegisterClass(), DecodeVCVTImmOperand(), llvm::MCDisassembler::Fail, Insn, and llvm::MCDisassembler::Success.
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Definition at line 6843 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, and llvm::MCDisassembler::Success.
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Definition at line 6819 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), DecodeMQPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, and llvm::MCDisassembler::Success.
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Definition at line 7017 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
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Definition at line 6137 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeDPRRegisterClass(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, and llvm::MCDisassembler::Success.
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Definition at line 4743 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, Insn, and llvm::MCDisassembler::Success.
Referenced by DecodeLDR().
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Definition at line 6796 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 1637 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::ARMCC::AL, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCInstrInfo::get(), llvm::MCInst::getOpcode(), llvm::MCInstrDesc::isPredicable(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeArmMOVTWInstruction(), DecodeBranchImmInstruction(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeForVMRSandVMSR(), DecodeHINTInstruction(), DecodeLazyLoadStoreMul(), DecodeLDR(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeQADDInstruction(), DecodeSMLAInstruction(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeSwap(), DecodeThumb2BCCInstruction(), DecodeTSTInstruction(), DecodeVMOVRRS(), and DecodeVMOVSRR().
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Definition at line 6325 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::ARMCC::AL, llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 2433 of file ARMDisassembler.cpp.
References Address, Check, DecodeCPSInstruction(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, Insn, pred, and llvm::MCDisassembler::Success.
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Definition at line 1583 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, QPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeNEONComplexLane64Instruction(), DecodeVCVTQ(), DecodeVMOVModImmInstruction(), and DecodeVSHLMaxInstruction().
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Definition at line 1741 of file ARMDisassembler.cpp.
References Address, Check, DecodeCLRMGPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCInst::end(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMultipleWritebackInstruction().
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Definition at line 6621 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::ARMCC::EQ, llvm::MCDisassembler::Fail, llvm::ARMCC::GE, llvm::ARMCC::GT, llvm::ARMCC::LE, llvm::ARMCC::LT, llvm::ARMCC::NE, and llvm::MCDisassembler::Success.
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Definition at line 6585 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::ARMCC::EQ, llvm::ARMCC::NE, and llvm::MCDisassembler::Success.
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Definition at line 6592 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::ARMCC::GE, llvm::ARMCC::GT, llvm::ARMCC::LE, llvm::ARMCC::LT, and llvm::MCDisassembler::Success.
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Definition at line 6614 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::ARMCC::HI, llvm::ARMCC::HS, and llvm::MCDisassembler::Success.
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Definition at line 2403 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::ARM_AM::da, llvm::ARM_AM::db, DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::ia, llvm::ARM_AM::ib, Insn, mode, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMultipleWritebackInstruction().
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Definition at line 6196 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1478 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeLOLoop(), DecodeMVE_MEM_2_pre(), DecodeMVEOverlappingLongShift(), DecodeMveVCTP(), DecodeSORegImmOperand(), DecodeT2AddrModeImm7(), DecodeT2AddrModeSOReg(), DecodeT2Adr(), DecodeT2LDRDPreInstruction(), DecodeT2LoadT(), DecodeT2MOVTWInstruction(), DecodeT2STRDPreInstruction(), and DecodeThumbTableBranch().
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Definition at line 2793 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), Insn, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeTSTInstruction().
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Definition at line 3883 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 3890 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 3897 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 3876 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 2742 of file ARMDisassembler.cpp.
References Address, Check, DecodeCPSInstruction(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, Insn, pred, and llvm::MCDisassembler::Success.
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Definition at line 1667 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::ARM_AM::asr, Check, llvm::MCOperand::createImm(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, llvm::ARM_AM::ror, llvm::ARM_AM::rrx, and llvm::MCDisassembler::Success.
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Definition at line 2154 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), Address, llvm::ARM_AM::asr, Check, llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM2Opc(), llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, llvm::ARM_AM::ror, llvm::ARM_AM::rrx, llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
Referenced by DecodeLDRPreReg(), and DecodeSTRPreReg().
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Definition at line 1705 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::ARM_AM::asr, Check, llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, llvm::ARM_AM::ror, and llvm::MCDisassembler::Success.
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Definition at line 1560 of file ARMDisassembler.cpp.
References Address, DecodeSPRRegisterClass(), and llvm::MCDisassembler::Fail.
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Definition at line 1504 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, SPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeHPRRegisterClass(), DecodeSPR_8RegisterClass(), DecodeSPRRegListOperand(), DecodeVMOVRRS(), DecodeVMOVSRR(), and DecodeVSCCLRM().
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Definition at line 1789 of file ARMDisassembler.cpp.
References Address, Check, DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 5201 of file ARMDisassembler.cpp.
References Address, Check, DecodeAddrModeImm12Operand(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, Insn, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 5227 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSORegMemOperand(), llvm::MCDisassembler::Fail, Insn, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 5991 of file ARMDisassembler.cpp.
References Address, Check, DecodeCPSInstruction(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, Insn, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4478 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4666 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2LoadImm12().
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Definition at line 4586 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRnopcRegisterClass(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4462 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRnopcRegisterClass(), DecodeT2Imm7S4(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeVSTRVLDR_SYSREG().
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Definition at line 4521 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), DecodeT2Imm8(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2LdStPre(), DecodeT2LoadImm8(), and DecodeT2LoadT().
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Definition at line 4446 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), DecodeT2Imm8S4(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeT2LDRDPreInstruction(), and DecodeT2STRDPreInstruction().
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Definition at line 4044 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2LoadShift().
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Definition at line 7026 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeCCOutOperand(), DecodeGPRspRegisterClass(), DecodeT2SOImm(), llvm::MCDisassembler::Fail, Insn, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 5954 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, assert(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getNumOperands(), Insn, and llvm::MCInst::setOpcode().
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Definition at line 2891 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::MCOperand::createImm(), Insn, llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3975 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
Referenced by DecodeThumb2BCCInstruction().
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Definition at line 2621 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, Insn, mode, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 2665 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Insn, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 4507 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 4431 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddrModeImm7s4().
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Definition at line 4494 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddrModeImm8().
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Definition at line 4417 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddrModeImm8s4().
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Definition at line 5882 of file ARMDisassembler.cpp.
References Address, Check, DecoderGPRRegisterClass(), DecodeT2AddrModeImm8s4(), llvm::MCDisassembler::Fail, Insn, P, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4604 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), DecodeT2AddrModeImm8(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, load, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 4243 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), DecodeT2AddrModeImm12(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 4158 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), DecodeT2AddrModeImm8(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 4363 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadShift(), and DecodeT2LoadT().
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Definition at line 4074 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), DecodeT2AddrModeSOReg(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 4324 of file ARMDisassembler.cpp.
References Address, Check, DecoderGPRRegisterClass(), DecodeT2AddrModeImm8(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 2689 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 5980 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4898 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddSubSPImm().
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Definition at line 5919 of file ARMDisassembler.cpp.
References Address, Check, DecoderGPRRegisterClass(), DecodeT2AddrModeImm8s4(), llvm::MCDisassembler::Fail, Insn, P, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4569 of file ARMDisassembler.cpp.
References Address, Check, DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 3904 of file ARMDisassembler.cpp.
References Address, Check, DecodeDPairRegisterClass(), DecodeDPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, op, and llvm::MCDisassembler::Success.
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Definition at line 1447 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 6420 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeMVEOverlappingLongShift().
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Definition at line 6409 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeMVEOverlappingLongShift().
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Definition at line 1391 of file ARMDisassembler.cpp.
References Address, DecodeGPRRegisterClass(), and llvm::MCDisassembler::Fail.
Referenced by DecodeMVE_MEM_1_pre(), DecodeTAddrModeImm7(), DecodeThumbAddrModeIS(), DecodeThumbAddrModeRR(), and DecodeThumbAddSpecialReg().
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Definition at line 4855 of file ARMDisassembler.cpp.
References Address, Check, DecodeMemBarrierOption(), DecodePredicateOperand(), DecodeT2BROperand(), llvm::MCDisassembler::Fail, Insn, pred, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 4009 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4024 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingPcLoadReferenceComment().
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Definition at line 3993 of file ARMDisassembler.cpp.
References Address, Check, DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4035 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
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Definition at line 3941 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, and llvm::MCDisassembler::Success.
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Definition at line 4693 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), Insn, and llvm::MCDisassembler::Success.
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Definition at line 4705 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createReg(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, and llvm::MCDisassembler::Success.
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Definition at line 4929 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 4938 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 4796 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3966 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3984 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 4731 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Insn, and llvm::MCDisassembler::Success.
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Definition at line 4837 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 2198 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::ARM_TSB::CSYNC, llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 2771 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSETPANInstruction(), llvm::MCDisassembler::Fail, Insn, and llvm::MCDisassembler::Success.
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Definition at line 6018 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeDPRRegisterClass(), DecodeVMOVModImmInstruction(), llvm::MCDisassembler::Fail, Insn, op, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 6651 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeMVEVCVTt1fp().
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Definition at line 6077 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeQPRRegisterClass(), DecodeVMOVModImmInstruction(), llvm::MCDisassembler::Fail, Insn, op, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3569 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeDPairRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 5253 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 3617 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 5385 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 3666 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, and llvm::MCDisassembler::Success.
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Definition at line 5515 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 3702 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 5648 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 2966 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeAddrMode6Operand(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, and llvm::MCDisassembler::Success.
Referenced by DecodeVLDST1Instruction(), DecodeVLDST2Instruction(), DecodeVLDST3Instruction(), and DecodeVLDST4Instruction().
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Definition at line 3243 of file ARMDisassembler.cpp.
References Address, DecodeVLDInstruction(), DecodeVSTInstruction(), llvm::MCDisassembler::Fail, Insn, and load.
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Definition at line 3257 of file ARMDisassembler.cpp.
References Address, DecodeVLDInstruction(), DecodeVSTInstruction(), llvm::MCDisassembler::Fail, Insn, load, and llvm::size().
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Definition at line 3273 of file ARMDisassembler.cpp.
References Address, DecodeVLDInstruction(), DecodeVSTInstruction(), llvm::MCDisassembler::Fail, Insn, load, and llvm::size().
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Definition at line 3287 of file ARMDisassembler.cpp.
References Address, DecodeVLDInstruction(), DecodeVSTInstruction(), llvm::MCDisassembler::Fail, Insn, load, and llvm::size().
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Definition at line 3755 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeDPRRegisterClass(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, and llvm::MCDisassembler::Success.
Referenced by DecodeVCVTD(), and DecodeVCVTQ().
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Definition at line 5827 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 5801 of file ARMDisassembler.cpp.
References Address, Check, DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 6574 of file ARMDisassembler.cpp.
References llvm::MCDisassembler::Success.
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Definition at line 6560 of file ARMDisassembler.cpp.
References llvm::MCDisassembler::Success.
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Definition at line 6529 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 6449 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::ARMCC::AL, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeDPRRegListOperand(), DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3856 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), DecodeDPRRegisterClass(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 5320 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 5452 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 5585 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 5729 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, Insn, llvm::size(), and llvm::MCDisassembler::Success.
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Definition at line 3298 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeAddrMode6Operand(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Insn, and llvm::MCDisassembler::Success.
Referenced by DecodeVLDST1Instruction(), DecodeVLDST2Instruction(), DecodeVLDST3Instruction(), and DecodeVLDST4Instruction().
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Definition at line 6702 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), Address, llvm::ARMCC::AL, Check, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeGPRnopcRegisterClass(), DecodeT2AddrModeImm7s4(), llvm::MCDisassembler::Fail, FixedRegForVSTRVLDR_SYSREG(), llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Definition at line 6680 of file ARMDisassembler.cpp.
Referenced by DecodeVSTRVLDR_SYSREG().
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMDisassembler | ( | ) |
Definition at line 1272 of file ARMDisassembler.cpp.
References createARMDisassembler(), llvm::getTheARMBETarget(), llvm::getTheARMLETarget(), llvm::getTheThumbBETarget(), llvm::getTheThumbLETarget(), and llvm::TargetRegistry::RegisterMCDisassembler().
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Definition at line 1533 of file ARMDisassembler.cpp.
References llvm::MCInst::getOpcode().
Referenced by DecodeDPRRegisterClass(), and DecodeDPRRegListOperand().
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tryAddingPcLoadReferenceComment - trys to add a comment as to what is being referenced by a load instruction with the base register that is the Pc.
These can often be values in a literal pool near the Address of the instruction. The Address of the instruction and its immediate Value are used as a possible literal pool entry. The SymbolLookUp call back will return the name of a symbol referenced by the literal pool's entry if the referenced address is that of a symbol. Or it will return a pointer to a literal 'C' string if the referenced address of the literal pool's entry is an address into a section with 'C' string literals.
Definition at line 878 of file ARMDisassembler.cpp.
References Address, and llvm::MCDisassembler::tryAddingPcLoadReferenceComment().
Referenced by DecodeAddrModeImm12Operand(), and DecodeThumbAddrModePC().
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tryAddingSymbolicOperand - trys to add a symbolic operand in place of the immediate Value in the MCInst.
The immediate Value has had any PC adjustment made by the caller. If the instruction is a branch instruction then isBranch is true, else false. If the getOpInfo() function was set as part of the setupForSymbolicDisassembly() call then that function is called to get any symbolic information at the Address for this instruction. If that returns non-zero then the symbolic information it returns is used to create an MCExpr and that is added as an operand to the MCInst. If getOpInfo() returns zero and isBranch is true then a symbol look up for Value is done and if a symbol is found an MCExpr is created with that, else an MCExpr with Value is created. This function returns true if it adds an operand to the MCInst and false otherwise.
Definition at line 859 of file ARMDisassembler.cpp.
References Address, isBranch(), MI, and llvm::MCDisassembler::tryAddingSymbolicOperand().
Referenced by DecodeArmMOVTWInstruction(), DecodeBFAfterTargetOperand(), DecodeBFLabelOperand(), decodeBranch(), DecodeBranchImmInstruction(), DecodeT2BInstruction(), DecodeT2BROperand(), DecodeT2MOVTWInstruction(), DecodeThumbBCCTargetOperand(), DecodeThumbBLTargetOperand(), DecodeThumbBLXOffset(), DecodeThumbBROperand(), and DecodeThumbCmpBROperand().
Definition at line 1290 of file ARMDisassembler.cpp.
Referenced by DecodeCLRMGPRRegisterClass().
Definition at line 1595 of file ARMDisassembler.cpp.
Referenced by DecodeDPairRegisterClass().
Definition at line 1615 of file ARMDisassembler.cpp.
Referenced by DecodeDPairSpacedRegisterClass().
Definition at line 1521 of file ARMDisassembler.cpp.
Referenced by DecodeDPRRegisterClass().
Definition at line 1283 of file ARMDisassembler.cpp.
Referenced by DecodeGPRRegisterClass(), DecodeGPRspRegisterClass(), DecodeGPRwithAPSR_NZCVnospRegisterClass(), decodeRiMemoryValue(), decodeRrMemoryValue(), decodeSplsValue(), DecodetGPREvenRegisterClass(), and DecodetGPROddRegisterClass().
Definition at line 1399 of file ARMDisassembler.cpp.
Referenced by DecodeGPRPairnospRegisterClass(), and DecodeGPRPairRegisterClass().
Definition at line 1576 of file ARMDisassembler.cpp.
Referenced by DecodeMQPRRegisterClass(), and DecodeQPRRegisterClass().
Definition at line 6497 of file ARMDisassembler.cpp.
Referenced by DecodeMQQPRRegisterClass().
Definition at line 6513 of file ARMDisassembler.cpp.
Referenced by DecodeMQQQQPRRegisterClass().
Definition at line 1493 of file ARMDisassembler.cpp.
Referenced by DecodeSPRRegisterClass().