LLVM  10.0.0svn
llvm::AMDGPUDisassembler Member List

This is the complete list of members for llvm::AMDGPUDisassembler, including all inherited members.

AMDGPUDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, MCInstrInfo const *MCII)llvm::AMDGPUDisassembler
CommentStreamllvm::MCDisassemblermutable
convertDPP8Inst(MCInst &MI) constllvm::AMDGPUDisassembler
convertMIMGInst(MCInst &MI) constllvm::AMDGPUDisassembler
convertSDWAInst(MCInst &MI) constllvm::AMDGPUDisassembler
createRegOperand(unsigned int RegId) constllvm::AMDGPUDisassemblerinline
createRegOperand(unsigned RegClassID, unsigned Val) constllvm::AMDGPUDisassemblerinline
createSRegOperand(unsigned SRegClassID, unsigned Val) constllvm::AMDGPUDisassemblerinline
decodeBoolReg(unsigned Val) constllvm::AMDGPUDisassembler
decodeDstOp(const OpWidthTy Width, unsigned Val) constllvm::AMDGPUDisassembler
decodeFPImmed(OpWidthTy Width, unsigned Imm)llvm::AMDGPUDisassemblerstatic
decodeIntImmed(unsigned Imm)llvm::AMDGPUDisassemblerstatic
decodeLiteralConstant() constllvm::AMDGPUDisassembler
decodeOperand_AGPR_32(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_AReg_1024(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_AReg_128(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_AReg_512(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_AV_32(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_AV_64(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_SReg_128(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_SReg_256(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_SReg_32(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_SReg_32_XEXEC_HI(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_SReg_32_XM0_XEXEC(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_SReg_512(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_SReg_64(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_SReg_64_XEXEC(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_SRegOrLds_32(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_VGPR_32(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_VReg_128(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_VReg_256(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_VReg_512(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_VReg_64(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_VReg_96(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_VRegOrLds_32(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_VS_128(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_VS_32(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_VS_64(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_VSrc16(unsigned Val) constllvm::AMDGPUDisassembler
decodeOperand_VSrcV216(unsigned Val) constllvm::AMDGPUDisassembler
decodeSDWASrc(const OpWidthTy Width, unsigned Val) constllvm::AMDGPUDisassembler
decodeSDWASrc16(unsigned Val) constllvm::AMDGPUDisassembler
decodeSDWASrc32(unsigned Val) constllvm::AMDGPUDisassembler
decodeSDWAVopcDst(unsigned Val) constllvm::AMDGPUDisassembler
decodeSpecialReg32(unsigned Val) constllvm::AMDGPUDisassembler
decodeSpecialReg64(unsigned Val) constllvm::AMDGPUDisassembler
decodeSrcOp(const OpWidthTy Width, unsigned Val) constllvm::AMDGPUDisassembler
DecodeStatus enum namellvm::MCDisassembler
errOperand(unsigned V, const Twine &ErrMsg) constllvm::AMDGPUDisassemblerinline
Fail enum valuellvm::MCDisassembler
getAgprClassId(const OpWidthTy Width) constllvm::AMDGPUDisassembler
getContext() constllvm::MCDisassemblerinline
getInstruction(MCInst &MI, uint64_t &Size, ArrayRef< uint8_t > Bytes, uint64_t Address, raw_ostream &WS, raw_ostream &CS) const overridellvm::AMDGPUDisassemblervirtual
getRegClassName(unsigned RegClassID) constllvm::AMDGPUDisassembler
getSgprClassId(const OpWidthTy Width) constllvm::AMDGPUDisassembler
getSubtargetInfo() constllvm::MCDisassemblerinline
getTtmpClassId(const OpWidthTy Width) constllvm::AMDGPUDisassembler
getTTmpIdx(unsigned Val) constllvm::AMDGPUDisassembler
getVgprClassId(const OpWidthTy Width) constllvm::AMDGPUDisassembler
isGFX10() constllvm::AMDGPUDisassembler
isGFX9() constllvm::AMDGPUDisassembler
isVI() constllvm::AMDGPUDisassembler
MCDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)llvm::MCDisassemblerinline
onSymbolStart(StringRef Name, uint64_t &Size, ArrayRef< uint8_t > Bytes, uint64_t Address, raw_ostream &VStream, raw_ostream &CStream) constllvm::MCDisassemblervirtual
OPW1024 enum valuellvm::AMDGPUDisassembler
OPW128 enum valuellvm::AMDGPUDisassembler
OPW16 enum valuellvm::AMDGPUDisassembler
OPW256 enum valuellvm::AMDGPUDisassembler
OPW32 enum valuellvm::AMDGPUDisassembler
OPW512 enum valuellvm::AMDGPUDisassembler
OPW64 enum valuellvm::AMDGPUDisassembler
OPW_FIRST_ enum valuellvm::AMDGPUDisassembler
OPW_LAST_ enum valuellvm::AMDGPUDisassembler
OpWidthTy enum namellvm::AMDGPUDisassembler
OPWV216 enum valuellvm::AMDGPUDisassembler
setSymbolizer(std::unique_ptr< MCSymbolizer > Symzer)llvm::MCDisassembler
SoftFail enum valuellvm::MCDisassembler
STIllvm::MCDisassemblerprotected
Success enum valuellvm::MCDisassembler
Symbolizerllvm::MCDisassemblerprotected
tryAddingPcLoadReferenceComment(int64_t Value, uint64_t Address) constllvm::MCDisassembler
tryAddingSymbolicOperand(MCInst &Inst, int64_t Value, uint64_t Address, bool IsBranch, uint64_t Offset, uint64_t InstSize) constllvm::MCDisassembler
tryDecodeInst(const uint8_t *Table, MCInst &MI, uint64_t Inst, uint64_t Address) constllvm::AMDGPUDisassembler
~AMDGPUDisassembler() override=defaultllvm::AMDGPUDisassembler
~MCDisassembler()llvm::MCDisassemblervirtual