LLVM  14.0.0git
llvm::AMDGPULegalizerInfo Member List

This is the complete list of members for llvm::AMDGPULegalizerInfo, including all inherited members.

aliasActionDefinitions(unsigned OpcodeTo, unsigned OpcodeFrom)llvm::LegalizerInfo
AMDGPULegalizerInfo(const GCNSubtarget &ST, const GCNTargetMachine &TM)llvm::AMDGPULegalizerInfo
buildPCRelGlobalAddress(Register DstReg, LLT PtrTy, MachineIRBuilder &B, const GlobalValue *GV, int64_t Offset, unsigned GAFlags=SIInstrInfo::MO_NONE) constllvm::AMDGPULegalizerInfo
fixStoreSourceType(MachineIRBuilder &B, Register VData, bool IsFormat) constllvm::AMDGPULegalizerInfo
getAction(const LegalityQuery &Query) constllvm::LegalizerInfo
getAction(const MachineInstr &MI, const MachineRegisterInfo &MRI) constllvm::LegalizerInfo
getActionDefinitions(unsigned Opcode) constllvm::LegalizerInfo
getActionDefinitionsBuilder(unsigned Opcode)llvm::LegalizerInfo
getActionDefinitionsBuilder(std::initializer_list< unsigned > Opcodes)llvm::LegalizerInfo
getActionDefinitionsIdx(unsigned Opcode) constllvm::LegalizerInfo
getExtOpcodeForWideningConstant(LLT SmallTy) constllvm::LegalizerInfovirtual
getImplicitArgPtr(Register DstReg, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
getLegacyLegalizerInfo() constllvm::LegalizerInfoinline
getLegacyLegalizerInfo()llvm::LegalizerInfoinline
getOpcodeIdxForOpcode(unsigned Opcode) constllvm::LegalizerInfo
getSegmentAperture(unsigned AddrSpace, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
handleD16VData(MachineIRBuilder &B, MachineRegisterInfo &MRI, Register Reg, bool ImageStore=false) constllvm::AMDGPULegalizerInfo
isLegal(const LegalityQuery &Query) constllvm::LegalizerInfoinline
isLegal(const MachineInstr &MI, const MachineRegisterInfo &MRI) constllvm::LegalizerInfo
isLegalOrCustom(const LegalityQuery &Query) constllvm::LegalizerInfoinline
isLegalOrCustom(const MachineInstr &MI, const MachineRegisterInfo &MRI) constllvm::LegalizerInfo
legalizeAddrSpaceCast(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeAtomicCmpXChg(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeAtomicIncDec(MachineInstr &MI, MachineIRBuilder &B, bool IsInc) constllvm::AMDGPULegalizerInfo
legalizeBufferAtomic(MachineInstr &MI, MachineIRBuilder &B, Intrinsic::ID IID) constllvm::AMDGPULegalizerInfo
legalizeBufferLoad(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, bool IsFormat, bool IsTyped) constllvm::AMDGPULegalizerInfo
legalizeBufferStore(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, bool IsTyped, bool IsFormat) constllvm::AMDGPULegalizerInfo
legalizeBuildVector(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeBVHIntrinsic(MachineInstr &MI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeCTLZ_CTTZ(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const overridellvm::AMDGPULegalizerInfovirtual
legalizeDebugTrapIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeDSAtomicFPIntrinsic(LegalizerHelper &Helper, MachineInstr &MI, Intrinsic::ID IID) constllvm::AMDGPULegalizerInfo
legalizeExtractVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeFastUnsafeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeFastUnsafeFDIV64(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeFceil(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeFDIV16(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeFDIV32(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeFDIV64(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeFDIVFastIntrin(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeFExp(MachineInstr &MI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeFFloor(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeFlog(MachineInstr &MI, MachineIRBuilder &B, double Log2BaseInverted) constllvm::AMDGPULegalizerInfo
legalizeFMad(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeFPow(MachineInstr &MI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeFPTOI(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, bool Signed) constllvm::AMDGPULegalizerInfo
legalizeFrem(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeFrint(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeImageIntrinsic(MachineInstr &MI, MachineIRBuilder &B, GISelChangeObserver &Observer, const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr) constllvm::AMDGPULegalizerInfo
legalizeImplicitArgPtr(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeInsertVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeIntrinsic(LegalizerHelper &Helper, MachineInstr &MI) const overridellvm::AMDGPULegalizerInfovirtual
legalizeIntrinsicTrunc(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeIsAddrSpace(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, unsigned AddrSpace) constllvm::AMDGPULegalizerInfo
legalizeITOFP(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, bool Signed) constllvm::AMDGPULegalizerInfo
legalizeLoad(LegalizerHelper &Helper, MachineInstr &MI) constllvm::AMDGPULegalizerInfo
legalizeMinNumMaxNum(LegalizerHelper &Helper, MachineInstr &MI) constllvm::AMDGPULegalizerInfo
legalizePreloadedArgIntrin(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, AMDGPUFunctionArgInfo::PreloadedValue ArgType) constllvm::AMDGPULegalizerInfo
legalizeRawBufferLoad(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, bool IsFormat) constllvm::AMDGPULegalizerInfo
legalizeRawBufferStore(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, bool IsFormat) constllvm::AMDGPULegalizerInfo
legalizeRsqClampIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeSBufferLoad(LegalizerHelper &Helper, MachineInstr &MI) constllvm::AMDGPULegalizerInfo
legalizeShuffleVector(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeSignedDIV_REM(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeSinCos(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeTrapEndpgm(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeTrapHsa(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeTrapHsaQueuePtr(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeTrapIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeUnsignedDIV_REM(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) constllvm::AMDGPULegalizerInfo
legalizeUnsignedDIV_REM32Impl(MachineIRBuilder &B, Register DstDivReg, Register DstRemReg, Register Num, Register Den) constllvm::AMDGPULegalizerInfo
legalizeUnsignedDIV_REM64Impl(MachineIRBuilder &B, Register DstDivReg, Register DstRemReg, Register Numer, Register Denom) constllvm::AMDGPULegalizerInfo
loadInputValue(Register DstReg, MachineIRBuilder &B, const ArgDescriptor *Arg, const TargetRegisterClass *ArgRC, LLT ArgTy) constllvm::AMDGPULegalizerInfo
loadInputValue(Register DstReg, MachineIRBuilder &B, AMDGPUFunctionArgInfo::PreloadedValue ArgType) constllvm::AMDGPULegalizerInfo
splitBufferOffsets(MachineIRBuilder &B, Register OrigOffset) constllvm::AMDGPULegalizerInfo
updateBufferMMO(MachineMemOperand *MMO, Register VOffset, Register SOffset, unsigned ImmOffset, Register VIndex, MachineRegisterInfo &MRI) constllvm::AMDGPULegalizerInfo
verify(const MCInstrInfo &MII) constllvm::LegalizerInfo
~LegalizerInfo()=defaultllvm::LegalizerInfovirtual