LLVM 17.0.0git
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This class provides the information for the target register banks. More...
#include "Target/AMDGPU/AMDGPULegalizerInfo.h"
This class provides the information for the target register banks.
Definition at line 31 of file AMDGPULegalizerInfo.h.
AMDGPULegalizerInfo::AMDGPULegalizerInfo | ( | const GCNSubtarget & | ST, |
const GCNTargetMachine & | TM | ||
) |
Definition at line 459 of file AMDGPULegalizerInfo.cpp.
References llvm::LegalityPredicates::all(), llvm::LegalizeRuleSet::alwaysLegal(), assert(), llvm::LegalizeMutations::changeTo(), llvm::LegalizeRuleSet::clampMaxNumElements(), llvm::LegalizeRuleSet::clampMaxNumElementsStrict(), llvm::LegalizeRuleSet::clampScalar(), llvm::LegalizeRuleSet::clampScalarOrElt(), llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::AMDGPUAS::CONSTANT_ADDRESS_32BIT, llvm::LegalizeRuleSet::custom(), llvm::LegalizeRuleSet::customFor(), llvm::LegalizeRuleSet::customIf(), elementTypeIsLegal(), llvm::LegalizeRuleSet::fewerElementsIf(), fewerEltsToSize64Vector(), llvm::LLT::fixed_vector(), llvm::AMDGPUAS::FLAT_ADDRESS, llvm::LegalizerInfo::getActionDefinitionsBuilder(), llvm::AMDGPUAS::GLOBAL_ADDRESS, llvm::AMDGPUSubtarget::has16BitInsts(), llvm::GCNSubtarget::hasAddNoCarry(), llvm::GCNSubtarget::hasFractBug(), llvm::GCNSubtarget::hasIntClamp(), llvm::GCNSubtarget::hasMad64_32(), llvm::GCNSubtarget::hasMadF16(), llvm::AMDGPUSubtarget::hasMadMacF32Insts(), llvm::AMDGPUSubtarget::hasVOP3PInsts(), llvm::LegalityPredicates::isPointer(), isRegisterType(), llvm::LegalityPredicates::isScalar(), isSmallOddVector(), llvm::LegalizeRuleSet::legalFor(), llvm::LegalizeRuleSet::legalIf(), llvm::AMDGPUAS::LOCAL_ADDRESS, llvm::LegalizeRuleSet::lower(), MaxRegisterSize, llvm::LegalizeRuleSet::maxScalar(), llvm::LegalizeRuleSet::minScalar(), llvm::LegalizeRuleSet::moreElementsIf(), llvm::Mul, oneMoreElement(), llvm::LLT::pointer(), llvm::AMDGPUAS::PRIVATE_ADDRESS, llvm::AMDGPUAS::REGION_ADDRESS, llvm::LLT::scalar(), llvm::LegalizeMutations::scalarize(), llvm::LegalizeRuleSet::scalarize(), TM, llvm::LegalityPredicates::typeIs(), llvm::LegalityPredicates::typeIsNot(), vectorWiderThan(), llvm::LegalizeRuleSet::widenScalarToNextMultipleOf(), and llvm::LegalizeRuleSet::widenScalarToNextPow2().
void AMDGPULegalizerInfo::buildMultiply | ( | LegalizerHelper & | Helper, |
MutableArrayRef< Register > | Accum, | ||
ArrayRef< Register > | Src0, | ||
ArrayRef< Register > | Src1, | ||
bool | UsePartialMad64_32, | ||
bool | SeparateOddAlignedProducts | ||
) | const |
Definition at line 2942 of file AMDGPULegalizerInfo.cpp.
References llvm::Add, assert(), B, llvm::MutableArrayRef< T >::drop_front(), llvm::LegalizerHelper::getKnownBits(), llvm::GISelKnownBits::getKnownBits(), llvm::Hi, llvm::KnownBits::isZero(), llvm::Lo, llvm::LegalizerHelper::MIRBuilder, llvm::Mul, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::LLT::scalar(), llvm::ArrayRef< T >::size(), and llvm::MutableArrayRef< T >::take_front().
Referenced by legalizeMul().
bool AMDGPULegalizerInfo::buildPCRelGlobalAddress | ( | Register | DstReg, |
LLT | PtrTy, | ||
MachineIRBuilder & | B, | ||
const GlobalValue * | GV, | ||
int64_t | Offset, | ||
unsigned | GAFlags = SIInstrInfo::MO_NONE |
||
) | const |
Definition at line 2476 of file AMDGPULegalizerInfo.cpp.
References llvm::MachineInstrBuilder::addGlobalAddress(), llvm::MachineInstrBuilder::addImm(), assert(), B, llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::LLT::getSizeInBits(), llvm::SIInstrInfo::MO_NONE, llvm::Offset, and llvm::LLT::pointer().
Referenced by legalizeGlobalValue().
Register AMDGPULegalizerInfo::fixStoreSourceType | ( | MachineIRBuilder & | B, |
Register | VData, | ||
bool | IsFormat | ||
) | const |
Definition at line 4430 of file AMDGPULegalizerInfo.cpp.
References B, llvm::LLT::getElementType(), llvm::LLT::getNumElements(), handleD16VData(), llvm::LLT::isVector(), MRI, and llvm::LLT::scalar().
Referenced by legalizeBufferStore().
bool AMDGPULegalizerInfo::getImplicitArgPtr | ( | Register | DstReg, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 4211 of file AMDGPULegalizerInfo.cpp.
References B, llvm::AMDGPUTargetLowering::FIRST_IMPLICIT, llvm::AMDGPUTargetLowering::getImplicitParameterOffset(), llvm::LLT::getSizeInBits(), llvm::GCNSubtarget::getTargetLowering(), llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, loadInputValue(), MRI, llvm::Offset, and llvm::LLT::scalar().
Referenced by legalizeImplicitArgPtr().
Register AMDGPULegalizerInfo::getKernargParameterPtr | ( | MachineIRBuilder & | B, |
int64_t | Offset | ||
) | const |
Definition at line 3433 of file AMDGPULegalizerInfo.cpp.
References B, llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, llvm_unreachable, loadInputValue(), llvm::Offset, llvm::LLT::pointer(), and llvm::LLT::scalar().
Referenced by legalizeKernargMemParameter().
bool AMDGPULegalizerInfo::getLDSKernelId | ( | Register | DstReg, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 4247 of file AMDGPULegalizerInfo.cpp.
References B, F, and llvm::AMDGPUMachineFunction::getLDSKernelIdMetadata().
Referenced by legalizeLDSKernelId().
Register AMDGPULegalizerInfo::getSegmentAperture | ( | unsigned | AddrSpace, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 1866 of file AMDGPULegalizerInfo.cpp.
References llvm::AMDGPU::AMDHSA_COV5, assert(), B, llvm::commonAlignment(), llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::AMDGPU::getCodeObjectVersion(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::GlobalValue::getParent(), llvm::MachineFunction::getSubtarget(), llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, loadInputValue(), llvm::AMDGPUAS::LOCAL_ADDRESS, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, MRI, llvm::Offset, llvm::LLT::pointer(), llvm::AMDGPUAS::PRIVATE_ADDRESS, llvm::AMDGPUTargetLowering::PRIVATE_BASE, llvm::AMDGPUFunctionArgInfo::QUEUE_PTR, llvm::LLT::scalar(), and llvm::AMDGPUTargetLowering::SHARED_BASE.
Referenced by legalizeAddrSpaceCast(), and legalizeIsAddrSpace().
Register AMDGPULegalizerInfo::handleD16VData | ( | MachineIRBuilder & | B, |
MachineRegisterInfo & | MRI, | ||
Register | Reg, | ||
bool | ImageStore = false |
||
) | const |
Handle register layout difference for f16 images for some subtargets.
Definition at line 4367 of file AMDGPULegalizerInfo.cpp.
References assert(), B, E, llvm::LLT::fixed_vector(), llvm::LLT::getElementType(), llvm::LLT::getNumElements(), llvm::GCNSubtarget::hasImageStoreD16Bug(), llvm::GCNSubtarget::hasUnpackedD16VMem(), I, llvm::LLT::isVector(), llvm_unreachable, MRI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::SmallVectorImpl< T >::resize(), and llvm::LLT::scalar().
Referenced by fixStoreSourceType(), and legalizeImageIntrinsic().
bool AMDGPULegalizerInfo::legalizeAddrSpaceCast | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 1973 of file AMDGPULegalizerInfo.cpp.
References assert(), B, llvm::AMDGPUAS::CONSTANT_ADDRESS_32BIT, llvm::LLVMContext::diagnose(), llvm::AMDGPUAS::FLAT_ADDRESS, llvm::LLT::getAddressSpace(), llvm::Function::getContext(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), getSegmentAperture(), llvm::LLT::getSizeInBits(), llvm::MachineFunction::getTarget(), llvm::CmpInst::ICMP_NE, Info, isKnownNonNull(), llvm::Register::isValid(), llvm::LLT::isVector(), llvm::AMDGPUAS::LOCAL_ADDRESS, MI, MRI, llvm::AMDGPUAS::PRIVATE_ADDRESS, llvm::LLT::scalar(), and TM.
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeAtomicCmpXChg | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 2750 of file AMDGPULegalizerInfo.cpp.
References assert(), B, llvm::LLT::fixed_vector(), getReg(), llvm::AMDGPU::isFlatGlobalAddrSpace(), MI, and MRI.
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeAtomicIncDec | ( | MachineInstr & | MI, |
MachineIRBuilder & | B, | ||
bool | IsInc | ||
) | const |
Definition at line 4696 of file AMDGPULegalizerInfo.cpp.
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::legalizeBufferAtomic | ( | MachineInstr & | MI, |
MachineIRBuilder & | B, | ||
Intrinsic::ID | IID | ||
) | const |
Definition at line 4765 of file AMDGPULegalizerInfo.cpp.
References B, getBufferAtomicPseudo(), getReg(), MI, llvm::LLT::scalar(), splitBufferOffsets(), and updateBufferMMO().
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::legalizeBufferLoad | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B, | ||
bool | IsFormat, | ||
bool | IsTyped | ||
) | const |
Definition at line 4561 of file AMDGPULegalizerInfo.cpp.
References assert(), B, buildBufferLoad(), llvm::LLT::changeElementSize(), llvm::divideCeil(), llvm::LLT::fixed_vector(), llvm::Format, llvm::MachineMemOperand::getMemoryType(), llvm::LLT::getScalarType(), llvm::LLT::getSizeInBits(), llvm::GCNSubtarget::hasUnpackedD16VMem(), I, llvm::LLT::isVector(), MI, MRI, N, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::LLT::scalar(), splitBufferOffsets(), llvm::SmallVectorImpl< T >::truncate(), and updateBufferMMO().
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::legalizeBufferStore | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B, | ||
bool | IsTyped, | ||
bool | IsFormat | ||
) | const |
Definition at line 4453 of file AMDGPULegalizerInfo.cpp.
References B, fixStoreSourceType(), llvm::Format, llvm::LLT::getScalarType(), llvm::MachineMemOperand::getSize(), llvm::LLT::getSizeInBits(), MI, MRI, llvm::LLT::scalar(), splitBufferOffsets(), and updateBufferMMO().
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::legalizeBuildVector | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 2910 of file AMDGPULegalizerInfo.cpp.
References assert(), B, llvm::LLT::fixed_vector(), Merge, MI, MRI, and llvm::LLT::scalar().
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeBVHIntrinsic | ( | MachineInstr & | MI, |
MachineIRBuilder & | B | ||
) | const |
Definition at line 5480 of file AMDGPULegalizerInfo.cpp.
References assert(), B, llvm::SmallVectorImpl< T >::clear(), llvm::LLT::fixed_vector(), llvm::AMDGPU::getMIMGOpcode(), llvm::GCNSubtarget::getNSAMaxSize(), llvm::GCNSubtarget::hasGFX10_AEncoding(), llvm::GCNSubtarget::hasNSAEncoding(), llvm::AMDGPU::isGFX11Plus(), MI, MRI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), R2, llvm::LLT::scalar(), and llvm::SmallVectorBase< Size_T >::size().
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::legalizeCTLZ_CTTZ | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 3246 of file AMDGPULegalizerInfo.cpp.
References B, llvm::LLT::getSizeInBits(), MI, and MRI.
Referenced by legalizeCustom().
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overridevirtual |
Called for instructions with the Custom LegalizationAction.
Reimplemented from llvm::LegalizerInfo.
Definition at line 1783 of file AMDGPULegalizerInfo.cpp.
References B, legalizeAddrSpaceCast(), legalizeAtomicCmpXChg(), legalizeBuildVector(), legalizeCTLZ_CTTZ(), legalizeExtractVectorElt(), legalizeFceil(), legalizeFDIV(), legalizeFExp(), legalizeFFloor(), legalizeFlog(), legalizeFMad(), legalizeFPow(), legalizeFPTOI(), legalizeFPTruncRound(), legalizeFrem(), legalizeFrint(), legalizeGlobalValue(), legalizeInsertVectorElt(), legalizeIntrinsicTrunc(), legalizeITOFP(), legalizeLoad(), legalizeMinNumMaxNum(), legalizeMul(), legalizeSignedDIV_REM(), legalizeSinCos(), legalizeUnsignedDIV_REM(), llvm_unreachable, llvm::numbers::ln10f, llvm::numbers::ln2f, MI, llvm::LegalizerHelper::MIRBuilder, and MRI.
bool AMDGPULegalizerInfo::legalizeDebugTrapIntrinsic | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 5459 of file AMDGPULegalizerInfo.cpp.
References llvm::GCNSubtarget::AMDHSA, B, llvm::LLVMContext::diagnose(), llvm::DS_Warning, llvm::GCNSubtarget::getTrapHandlerAbi(), llvm::GCNSubtarget::isTrapHandlerEnabled(), llvm::GCNSubtarget::LLVMAMDHSADebugTrap, and MI.
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::legalizeDSAtomicFPIntrinsic | ( | LegalizerHelper & | Helper, |
MachineInstr & | MI, | ||
Intrinsic::ID | IID | ||
) | const |
Definition at line 4193 of file AMDGPULegalizerInfo.cpp.
References llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), getDSFPAtomicOpcode(), llvm::GCNSubtarget::getInstrInfo(), I, MI, and llvm::LegalizerHelper::Observer.
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::legalizeExtractVectorElt | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 2372 of file AMDGPULegalizerInfo.cpp.
References assert(), B, llvm::LLT::getElementType(), llvm::getIConstantVRegValWithLookThrough(), llvm::LLT::getNumElements(), MI, and MRI.
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeFastUnsafeFDIV | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 3796 of file AMDGPULegalizerInfo.cpp.
References B, Flags, llvm::MachineInstr::FmAfn, llvm::getConstantFPVRegVal(), llvm::MachineFunction::getTarget(), LHS, MI, MRI, llvm::TargetMachine::Options, RHS, and llvm::TargetOptions::UnsafeFPMath.
Referenced by legalizeFDIV16(), and legalizeFDIV32().
bool AMDGPULegalizerInfo::legalizeFastUnsafeFDIV64 | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 3845 of file AMDGPULegalizerInfo.cpp.
References B, Flags, llvm::MachineInstr::FmAfn, llvm::MachineFunction::getTarget(), MI, MRI, llvm::TargetMachine::Options, llvm::TargetOptions::UnsafeFPMath, X, and Y.
Referenced by legalizeFDIV64().
bool AMDGPULegalizerInfo::legalizeFceil | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 2112 of file AMDGPULegalizerInfo.cpp.
References llvm::Add, assert(), B, llvm::CmpInst::FCMP_OGT, llvm::CmpInst::FCMP_ONE, MI, MRI, and llvm::LLT::scalar().
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeFDIV | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 3469 of file AMDGPULegalizerInfo.cpp.
References B, legalizeFDIV16(), legalizeFDIV32(), legalizeFDIV64(), MI, MRI, and llvm::LLT::scalar().
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeFDIV16 | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 3882 of file AMDGPULegalizerInfo.cpp.
References B, Flags, legalizeFastUnsafeFDIV(), LHS, MI, MRI, RHS, and llvm::LLT::scalar().
Referenced by legalizeFDIV().
bool AMDGPULegalizerInfo::legalizeFDIV32 | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 3946 of file AMDGPULegalizerInfo.cpp.
References B, Flags, llvm::SIMachineFunctionInfo::getMode(), legalizeFastUnsafeFDIV(), LHS, MI, MRI, llvm::Mul, RHS, llvm::LLT::scalar(), and toggleSPDenormMode().
Referenced by legalizeFDIV().
bool AMDGPULegalizerInfo::legalizeFDIV64 | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 4015 of file AMDGPULegalizerInfo.cpp.
References B, Flags, llvm::GCNSubtarget::hasUsableDivScaleConditionOutput(), llvm::CmpInst::ICMP_EQ, legalizeFastUnsafeFDIV64(), LHS, MI, MRI, llvm::Mul, RHS, and llvm::LLT::scalar().
Referenced by legalizeFDIV().
bool AMDGPULegalizerInfo::legalizeFDIVFastIntrin | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 4096 of file AMDGPULegalizerInfo.cpp.
References B, llvm::CmpInst::FCMP_OGT, Flags, LHS, MI, RHS, and llvm::LLT::scalar().
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::legalizeFExp | ( | MachineInstr & | MI, |
MachineIRBuilder & | B | ||
) | const |
Definition at line 2790 of file AMDGPULegalizerInfo.cpp.
References B, Flags, llvm::numbers::log2e, MI, and llvm::Mul.
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeFFloor | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 2851 of file AMDGPULegalizerInfo.cpp.
References assert(), B, llvm::CmpInst::FCMP_ORD, Flags, llvm::MachineInstr::FmNoNans, llvm::SIMachineFunctionInfo::getMode(), llvm::GCNSubtarget::hasFractBug(), llvm::SIModeRegisterDefaults::IEEE, MI, MRI, llvm::LLT::scalar(), and stripAnySourceMods().
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeFlog | ( | MachineInstr & | MI, |
MachineIRBuilder & | B, | ||
double | Log2BaseInverted | ||
) | const |
Definition at line 2775 of file AMDGPULegalizerInfo.cpp.
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeFMad | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 2728 of file AMDGPULegalizerInfo.cpp.
References llvm::SIModeRegisterDefaults::allFP32Denormals(), llvm::SIModeRegisterDefaults::allFP64FP16Denormals(), assert(), B, llvm::MachineFunction::getInfo(), llvm::SIMachineFunctionInfo::getMode(), llvm::LLT::isScalar(), llvm::LegalizerHelper::Legalized, llvm::LegalizerHelper::lowerFMad(), MI, MRI, and llvm::LLT::scalar().
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeFPow | ( | MachineInstr & | MI, |
MachineIRBuilder & | B | ||
) | const |
Definition at line 2804 of file AMDGPULegalizerInfo.cpp.
References B, Flags, MI, llvm::Mul, and llvm::LLT::scalar().
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeFPTOI | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B, | ||
bool | Signed | ||
) | const |
Definition at line 2283 of file AMDGPULegalizerInfo.cpp.
References assert(), B, Flags, llvm::Hi, llvm::Lo, MI, MRI, llvm::Mul, llvm::LLT::scalar(), and Signed.
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeFPTruncRound | ( | MachineInstr & | MI, |
MachineIRBuilder & | B | ||
) | const |
Definition at line 5627 of file AMDGPULegalizerInfo.cpp.
References B, MI, llvm::TowardNegative, and llvm::TowardPositive.
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeFrem | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 2141 of file AMDGPULegalizerInfo.cpp.
References B, Flags, MI, and MRI.
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeFrint | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 2086 of file AMDGPULegalizerInfo.cpp.
References assert(), B, Cond, llvm::CmpInst::FCMP_OGT, llvm::LLT::getSizeInBits(), llvm::APFloatBase::IEEEdouble(), llvm::LLT::isScalar(), MI, MRI, and llvm::LLT::scalar().
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeGlobalValue | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 2537 of file AMDGPULegalizerInfo.cpp.
References llvm::AMDGPUMachineFunction::allocateLDSGlobal(), B, buildPCRelGlobalAddress(), llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::LLVMContext::diagnose(), llvm::DS_Warning, llvm::StringRef::equals(), llvm::LLT::getAddressSpace(), llvm::Function::getContext(), llvm::MachineFunction::getFunction(), llvm::MachinePointerInfo::getGOT(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::Value::getName(), llvm::LLT::getSizeInBits(), llvm::GCNSubtarget::getTargetLowering(), llvm::GlobalValue::getValueType(), llvm::GlobalValue::hasExternalLinkage(), llvm::AMDGPUMachineFunction::isModuleEntryFunction(), llvm::AMDGPUAS::LOCAL_ADDRESS, MI, llvm::SIInstrInfo::MO_ABS32_LO, llvm::SIInstrInfo::MO_GOTPCREL32, llvm::SIInstrInfo::MO_REL32, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, MRI, llvm::LLT::pointer(), llvm::AMDGPUAS::REGION_ADDRESS, llvm::LLT::scalar(), llvm::AMDGPUMachineFunction::setDynLDSAlign(), llvm::SITargetLowering::shouldEmitFixup(), llvm::SITargetLowering::shouldEmitPCReloc(), and llvm::SITargetLowering::shouldUseLDSConstAddress().
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeImageIntrinsic | ( | MachineInstr & | MI, |
MachineIRBuilder & | B, | ||
GISelChangeObserver & | Observer, | ||
const AMDGPU::ImageDimIntrinsicInfo * | Intr | ||
) | const |
Rewrite image intrinsics to use register layouts expected by the subtarget.
Depending on the subtarget, load/store with 16-bit element data need to be rewritten to use the low half of 32-bit registers, or directly use a packed layout. 16-bit addresses should also sometimes be packed into 32-bit registers.
We don't want to directly select image instructions just yet, but also want to exposes all register repacking to the legalizer/combiners. We also don't want a selected instruction entering RegBankSelect. In order to avoid defining a multitude of intermediate image instructions, directly hack on the intrinsic's arguments. In cases like a16 addresses, this requires padding now unnecessary arguments with $noreg.
Definition at line 4939 of file AMDGPULegalizerInfo.cpp.
References assert(), llvm::AMDGPU::MIMGBaseOpcodeInfo::Atomic, llvm::AMDGPU::MIMGBaseOpcodeInfo::AtomicX2, B, llvm::GISelChangeObserver::changedInstr(), llvm::LLT::changeElementCount(), llvm::GISelChangeObserver::changingInstr(), Concat, convertImageAddrToPacked(), llvm::MachineOperand::CreateImm(), llvm::LLT::fixed_vector(), Flags, llvm::AMDGPU::MIMGBaseOpcodeInfo::Gather4, llvm::ElementCount::getFixed(), llvm::SrcOp::getImm(), llvm::AMDGPU::getMIMGBaseOpcodeInfo(), llvm::GCNSubtarget::getNSAMaxSize(), llvm::GCNSubtarget::getNSAThreshold(), llvm::LLT::getNumElements(), llvm::SrcOp::getReg(), llvm::LLT::getScalarType(), llvm::LLT::getSizeInBits(), llvm::AMDGPU::MIMGBaseOpcodeInfo::Gradients, handleD16VData(), llvm::GCNSubtarget::hasA16(), llvm::GCNSubtarget::hasG16(), llvm::GCNSubtarget::hasNSAEncoding(), llvm::GCNSubtarget::hasPartialNSAEncoding(), llvm::GCNSubtarget::hasUnpackedD16VMem(), I, Intr, llvm::LLT::isVector(), llvm::make_scope_exit(), MI, MRI, packImage16bitOpsToDwords(), llvm::popcount(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::SmallVectorImpl< T >::resize(), llvm::LLT::scalar(), llvm::LLT::scalarOrVector(), llvm::SmallVectorBase< Size_T >::size(), and llvm::AMDGPU::MIMGBaseOpcodeInfo::Store.
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::legalizeImplicitArgPtr | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 4230 of file AMDGPULegalizerInfo.cpp.
References B, getImplicitArgPtr(), llvm::AMDGPUFunctionArgInfo::IMPLICIT_ARG_PTR, llvm::AMDGPUMachineFunction::isEntryFunction(), legalizePreloadedArgIntrin(), MI, and MRI.
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::legalizeInsertVectorElt | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 2406 of file AMDGPULegalizerInfo.cpp.
References assert(), B, llvm::LLT::getElementType(), llvm::getIConstantVRegValWithLookThrough(), llvm::LLT::getNumElements(), MI, MRI, and llvm::SmallVectorTemplateBase< T, bool >::push_back().
Referenced by legalizeCustom().
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overridevirtual |
Reimplemented from llvm::LegalizerInfo.
Definition at line 5648 of file AMDGPULegalizerInfo.cpp.
References B, llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), llvm::AMDGPUFunctionArgInfo::DISPATCH_ID, llvm::AMDGPUFunctionArgInfo::DISPATCH_PTR, llvm::AMDGPU::getImageDimIntrinsicInfo(), llvm::MachineInstr::getOperand(), llvm::AMDGPUSubtarget::getWavefrontSize(), llvm::SI::KernelInputOffsets::GLOBAL_SIZE_X, llvm::SI::KernelInputOffsets::GLOBAL_SIZE_Y, llvm::SI::KernelInputOffsets::GLOBAL_SIZE_Z, llvm::AMDGPUFunctionArgInfo::IMPLICIT_BUFFER_PTR, llvm::AMDGPU::isKernel(), llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, llvm::AMDGPUFunctionArgInfo::LDS_KERNEL_ID, legalizeAtomicIncDec(), legalizeBufferAtomic(), legalizeBufferLoad(), legalizeBufferStore(), legalizeBVHIntrinsic(), legalizeDebugTrapIntrinsic(), legalizeDSAtomicFPIntrinsic(), legalizeFDIVFastIntrin(), legalizeImageIntrinsic(), legalizeImplicitArgPtr(), legalizeIsAddrSpace(), legalizeKernargMemParameter(), legalizePreloadedArgIntrin(), legalizeRsqClampIntrinsic(), legalizeSBufferLoad(), legalizeTrapIntrinsic(), legalizeWorkitemIDIntrinsic(), llvm::AMDGPUAS::LOCAL_ADDRESS, llvm::SI::KernelInputOffsets::LOCAL_SIZE_X, llvm::SI::KernelInputOffsets::LOCAL_SIZE_Y, llvm::SI::KernelInputOffsets::LOCAL_SIZE_Z, MI, llvm::LegalizerHelper::MIRBuilder, MRI, llvm::SI::KernelInputOffsets::NGROUPS_X, llvm::SI::KernelInputOffsets::NGROUPS_Y, llvm::SI::KernelInputOffsets::NGROUPS_Z, llvm::LegalizerHelper::Observer, llvm::AMDGPUAS::PRIVATE_ADDRESS, llvm::AMDGPUFunctionArgInfo::QUEUE_PTR, llvm::MachineOperand::setMBB(), std::swap(), TRI, verifyCFIntrinsic(), llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_X, llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_Y, llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_Z, llvm::AMDGPUFunctionArgInfo::WORKITEM_ID_X, llvm::AMDGPUFunctionArgInfo::WORKITEM_ID_Y, and llvm::AMDGPUFunctionArgInfo::WORKITEM_ID_Z.
bool AMDGPULegalizerInfo::legalizeIntrinsicTrunc | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 2175 of file AMDGPULegalizerInfo.cpp.
References assert(), B, extractF64Exponent(), llvm::Hi, llvm::CmpInst::ICMP_SGT, llvm::CmpInst::ICMP_SLT, MI, MRI, and llvm::LLT::scalar().
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeIsAddrSpace | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B, | ||
unsigned | AddrSpace | ||
) | const |
Definition at line 4276 of file AMDGPULegalizerInfo.cpp.
References B, getSegmentAperture(), llvm::CmpInst::ICMP_EQ, MI, MRI, and llvm::LLT::scalar().
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::legalizeITOFP | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B, | ||
bool | Signed | ||
) | const |
Definition at line 2220 of file AMDGPULegalizerInfo.cpp.
References assert(), B, MI, MRI, llvm::LLT::scalar(), Signed, and X.
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeKernargMemParameter | ( | MachineInstr & | MI, |
MachineIRBuilder & | B, | ||
uint64_t | Offset, | ||
Align | Alignment = Align(4) |
||
) | const |
Legalize a value that's loaded from kernel arguments.
This is only used by legacy intrinsics.
Definition at line 3451 of file AMDGPULegalizerInfo.cpp.
References assert(), B, llvm::AMDGPUAS::CONSTANT_ADDRESS, getKernargParameterPtr(), MI, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::Offset, Ptr, and llvm::LLT::scalar().
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::legalizeLDSKernelId | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 4258 of file AMDGPULegalizerInfo.cpp.
References B, getLDSKernelId(), llvm::AMDGPUMachineFunction::isEntryFunction(), llvm::AMDGPUFunctionArgInfo::LDS_KERNEL_ID, legalizePreloadedArgIntrin(), MI, and MRI.
bool AMDGPULegalizerInfo::legalizeLoad | ( | LegalizerHelper & | Helper, |
MachineInstr & | MI | ||
) | const |
Definition at line 2646 of file AMDGPULegalizerInfo.cpp.
References B, llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::AMDGPUAS::CONSTANT_ADDRESS_32BIT, llvm::LLT::getAddressSpace(), llvm::MachineMemOperand::getAlign(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineMemOperand::getMemoryType(), llvm::LLT::getSizeInBits(), isRegisterType(), llvm::LLT::isVector(), MI, llvm::LegalizerHelper::MIRBuilder, MRI, llvm::LegalizerHelper::Observer, llvm::LLT::pointer(), llvm::PowerOf2Ceil(), shouldWidenLoad(), llvm::Align::value(), and widenToNextPowerOf2().
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeMinNumMaxNum | ( | LegalizerHelper & | Helper, |
MachineInstr & | MI | ||
) | const |
Definition at line 2353 of file AMDGPULegalizerInfo.cpp.
References llvm::MachineFunction::getInfo(), llvm::MachineIRBuilder::getMF(), llvm::SIMachineFunctionInfo::getMode(), llvm::SIModeRegisterDefaults::IEEE, llvm::LegalizerHelper::Legalized, llvm::LegalizerHelper::lowerFMinNumMaxNum(), MI, and llvm::LegalizerHelper::MIRBuilder.
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeMul | ( | LegalizerHelper & | Helper, |
MachineInstr & | MI | ||
) | const |
Definition at line 3195 of file AMDGPULegalizerInfo.cpp.
References assert(), B, buildMultiply(), llvm::GCNSubtarget::getGeneration(), llvm::LLT::getSizeInBits(), llvm::AMDGPUSubtarget::GFX10, llvm::GCNSubtarget::hasFullRate64Ops(), llvm::GCNSubtarget::hasMad64_32(), llvm::LLT::isScalar(), MI, llvm::LegalizerHelper::MIRBuilder, MRI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::LLT::scalar(), and Size.
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizePreloadedArgIntrin | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B, | ||
AMDGPUFunctionArgInfo::PreloadedValue | ArgType | ||
) | const |
Definition at line 3376 of file AMDGPULegalizerInfo.cpp.
References B, loadInputValue(), and MI.
Referenced by legalizeImplicitArgPtr(), legalizeIntrinsic(), and legalizeLDSKernelId().
bool llvm::AMDGPULegalizerInfo::legalizeRawBufferLoad | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B, | ||
bool | IsFormat | ||
) | const |
bool llvm::AMDGPULegalizerInfo::legalizeRawBufferStore | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B, | ||
bool | IsFormat | ||
) | const |
bool AMDGPULegalizerInfo::legalizeRsqClampIntrinsic | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 4137 of file AMDGPULegalizerInfo.cpp.
References B, Flags, llvm::GCNSubtarget::getGeneration(), llvm::APFloat::getLargest(), llvm::SIMachineFunctionInfo::getMode(), llvm::SIModeRegisterDefaults::IEEE, llvm::APFloatBase::IEEEdouble(), llvm::APFloatBase::IEEEsingle(), MI, MRI, llvm::LLT::scalar(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::legalizeSBufferLoad | ( | LegalizerHelper & | Helper, |
MachineInstr & | MI | ||
) | const |
Definition at line 5317 of file AMDGPULegalizerInfo.cpp.
References B, llvm::LegalizerHelper::bitcastDst(), llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), getBitcastRegisterType(), llvm::MachineFunction::getMachineMemOperand(), getPow2ScalarType(), getPow2VectorType(), llvm::LLT::getSizeInBits(), llvm::isPowerOf2_32(), llvm::LLT::isVector(), MI, llvm::LegalizerHelper::MIRBuilder, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, llvm::LegalizerHelper::moreElementsVectorDst(), llvm::LegalizerHelper::Observer, llvm::LLT::scalar(), shouldBitcastLoadStoreType(), Size, and llvm::LegalizerHelper::widenScalarDst().
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::legalizeSignedDIV_REM | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 3728 of file AMDGPULegalizerInfo.cpp.
References B, llvm::LLT::getSizeInBits(), legalizeUnsignedDIV_REM32Impl(), legalizeUnsignedDIV_REM64Impl(), LHS, llvm_unreachable, MI, MRI, RHS, and llvm::LLT::scalar().
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeSinCos | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 2448 of file AMDGPULegalizerInfo.cpp.
References B, Flags, llvm::AMDGPUSubtarget::hasTrigReducedRange(), llvm::numbers::inv_pi, MI, and MRI.
Referenced by legalizeCustom().
bool AMDGPULegalizerInfo::legalizeTrapEndpgm | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 5384 of file AMDGPULegalizerInfo.cpp.
Referenced by legalizeTrapIntrinsic().
bool AMDGPULegalizerInfo::legalizeTrapHsa | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 5451 of file AMDGPULegalizerInfo.cpp.
References B, llvm::GCNSubtarget::LLVMAMDHSATrap, and MI.
Referenced by legalizeTrapIntrinsic().
bool AMDGPULegalizerInfo::legalizeTrapHsaQueuePtr | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 5391 of file AMDGPULegalizerInfo.cpp.
References llvm::AMDGPU::AMDHSA_COV5, B, llvm::commonAlignment(), llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::AMDGPU::getCodeObjectVersion(), llvm::MachineFunction::getFunction(), llvm::AMDGPUTargetLowering::getImplicitParameterOffset(), llvm::MachineFunction::getMachineMemOperand(), llvm::GlobalValue::getParent(), llvm::GCNSubtarget::getTargetLowering(), llvm::RegState::Implicit, llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, llvm::GCNSubtarget::LLVMAMDHSATrap, loadInputValue(), MI, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, MRI, llvm::Offset, llvm::LLT::pointer(), llvm::AMDGPUFunctionArgInfo::QUEUE_PTR, llvm::AMDGPUTargetLowering::QUEUE_PTR, and llvm::LLT::scalar().
Referenced by legalizeTrapIntrinsic().
bool AMDGPULegalizerInfo::legalizeTrapIntrinsic | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 5368 of file AMDGPULegalizerInfo.cpp.
References llvm::GCNSubtarget::AMDHSA, llvm::AMDGPU::AMDHSA_COV3, B, llvm::AMDGPU::getCodeObjectVersion(), llvm::GCNSubtarget::getTrapHandlerAbi(), llvm::GCNSubtarget::isTrapHandlerEnabled(), legalizeTrapEndpgm(), legalizeTrapHsa(), legalizeTrapHsaQueuePtr(), MI, MRI, and llvm::GCNSubtarget::supportsGetDoorbellID().
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::legalizeUnsignedDIV_REM | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B | ||
) | const |
Definition at line 3688 of file AMDGPULegalizerInfo.cpp.
References B, legalizeUnsignedDIV_REM32Impl(), legalizeUnsignedDIV_REM64Impl(), llvm_unreachable, MI, MRI, and llvm::LLT::scalar().
Referenced by legalizeCustom().
void AMDGPULegalizerInfo::legalizeUnsignedDIV_REM32Impl | ( | MachineIRBuilder & | B, |
Register | DstDivReg, | ||
Register | DstRemReg, | ||
Register | Num, | ||
Register | Den | ||
) | const |
Definition at line 3488 of file AMDGPULegalizerInfo.cpp.
References B, Cond, llvm::CmpInst::ICMP_UGE, llvm::LLT::scalar(), X, and Y.
Referenced by legalizeSignedDIV_REM(), and legalizeUnsignedDIV_REM().
void AMDGPULegalizerInfo::legalizeUnsignedDIV_REM64Impl | ( | MachineIRBuilder & | B, |
Register | DstDivReg, | ||
Register | DstRemReg, | ||
Register | Num, | ||
Register | Den | ||
) | const |
Definition at line 3576 of file AMDGPULegalizerInfo.cpp.
References B, emitReciprocalU64(), llvm::CmpInst::ICMP_EQ, llvm::CmpInst::ICMP_NE, llvm::CmpInst::ICMP_UGE, and llvm::LLT::scalar().
Referenced by legalizeSignedDIV_REM(), and legalizeUnsignedDIV_REM().
bool AMDGPULegalizerInfo::legalizeWorkitemIDIntrinsic | ( | MachineInstr & | MI, |
MachineRegisterInfo & | MRI, | ||
MachineIRBuilder & | B, | ||
unsigned | Dim, | ||
AMDGPUFunctionArgInfo::PreloadedValue | ArgType | ||
) | const |
Definition at line 3393 of file AMDGPULegalizerInfo.cpp.
References Arg, B, llvm::bit_width(), llvm::AMDGPUSubtarget::getMaxWorkitemID(), llvm::SIMachineFunctionInfo::getPreloadedValue(), loadInputValue(), llvm::CallingConv::MaxID, MI, MRI, replaceWithConstant(), and llvm::LLT::scalar().
Referenced by legalizeIntrinsic().
bool AMDGPULegalizerInfo::loadInputValue | ( | Register | DstReg, |
MachineIRBuilder & | B, | ||
AMDGPUFunctionArgInfo::PreloadedValue | ArgType | ||
) | const |
Definition at line 3348 of file AMDGPULegalizerInfo.cpp.
References Arg, B, llvm::SIMachineFunctionInfo::getPreloadedValue(), llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, and loadInputValue().
bool AMDGPULegalizerInfo::loadInputValue | ( | Register | DstReg, |
MachineIRBuilder & | B, | ||
const ArgDescriptor * | Arg, | ||
const TargetRegisterClass * | ArgRC, | ||
LLT | ArgTy | ||
) | const |
Definition at line 3315 of file AMDGPULegalizerInfo.cpp.
References Arg, assert(), B, llvm::getFunctionLiveInPhysReg(), llvm::Register::isPhysicalRegister(), llvm::Register::isVirtual(), and llvm::LLT::scalar().
Referenced by getImplicitArgPtr(), getKernargParameterPtr(), getSegmentAperture(), legalizePreloadedArgIntrin(), legalizeTrapHsaQueuePtr(), legalizeWorkitemIDIntrinsic(), and loadInputValue().
std::pair< Register, unsigned > AMDGPULegalizerInfo::splitBufferOffsets | ( | MachineIRBuilder & | B, |
Register | OrigOffset | ||
) | const |
Definition at line 4296 of file AMDGPULegalizerInfo.cpp.
References B, llvm::AMDGPU::getBaseWithConstantOffset(), llvm::SIInstrInfo::getMaxMUBUFImmOffset(), MRI, and llvm::LLT::scalar().
Referenced by legalizeBufferAtomic(), legalizeBufferLoad(), and legalizeBufferStore().
void AMDGPULegalizerInfo::updateBufferMMO | ( | MachineMemOperand * | MMO, |
Register | VOffset, | ||
Register | SOffset, | ||
unsigned | ImmOffset, | ||
Register | VIndex, | ||
MachineRegisterInfo & | MRI | ||
) | const |
Update MMO
based on the offset inputs to a raw/struct buffer intrinsic.
Definition at line 4342 of file AMDGPULegalizerInfo.cpp.
References llvm::getIConstantVRegValWithLookThrough(), MRI, llvm::MachineMemOperand::setOffset(), and llvm::MachineMemOperand::setValue().
Referenced by legalizeBufferAtomic(), legalizeBufferLoad(), and legalizeBufferStore().