LLVM 18.0.0git
Public Member Functions | List of all members
llvm::AMDGPULegalizerInfo Class Referencefinal

This class provides the information for the target register banks. More...

#include "Target/AMDGPU/AMDGPULegalizerInfo.h"

Inheritance diagram for llvm::AMDGPULegalizerInfo:
Inheritance graph
[legend]

Public Member Functions

 AMDGPULegalizerInfo (const GCNSubtarget &ST, const GCNTargetMachine &TM)
 
bool legalizeCustom (LegalizerHelper &Helper, MachineInstr &MI) const override
 Called for instructions with the Custom LegalizationAction.
 
Register getSegmentAperture (unsigned AddrSpace, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeAddrSpaceCast (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeFroundeven (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeFceil (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeFrem (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeIntrinsicTrunc (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeITOFP (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, bool Signed) const
 
bool legalizeFPTOI (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, bool Signed) const
 
bool legalizeMinNumMaxNum (LegalizerHelper &Helper, MachineInstr &MI) const
 
bool legalizeExtractVectorElt (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeInsertVectorElt (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeSinCos (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool buildPCRelGlobalAddress (Register DstReg, LLT PtrTy, MachineIRBuilder &B, const GlobalValue *GV, int64_t Offset, unsigned GAFlags=SIInstrInfo::MO_NONE) const
 
void buildAbsGlobalAddress (Register DstReg, LLT PtrTy, MachineIRBuilder &B, const GlobalValue *GV, MachineRegisterInfo &MRI) const
 
bool legalizeGlobalValue (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeLoad (LegalizerHelper &Helper, MachineInstr &MI) const
 
bool legalizeStore (LegalizerHelper &Helper, MachineInstr &MI) const
 
bool legalizeFMad (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeAtomicCmpXChg (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
std::pair< Register, Register > getScaledLogInput (MachineIRBuilder &B, Register Src, unsigned Flags) const
 
bool legalizeFlog2 (MachineInstr &MI, MachineIRBuilder &B) const
 
bool legalizeFlogCommon (MachineInstr &MI, MachineIRBuilder &B) const
 
bool legalizeFlogUnsafe (MachineIRBuilder &B, Register Dst, Register Src, bool IsLog10, unsigned Flags) const
 
bool legalizeFExp2 (MachineInstr &MI, MachineIRBuilder &B) const
 
bool legalizeFExpUnsafe (MachineIRBuilder &B, Register Dst, Register Src, unsigned Flags) const
 
bool legalizeFExp (MachineInstr &MI, MachineIRBuilder &B) const
 
bool legalizeFPow (MachineInstr &MI, MachineIRBuilder &B) const
 
bool legalizeFFloor (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeBuildVector (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
void buildMultiply (LegalizerHelper &Helper, MutableArrayRef< Register > Accum, ArrayRef< Register > Src0, ArrayRef< Register > Src1, bool UsePartialMad64_32, bool SeparateOddAlignedProducts) const
 
bool legalizeMul (LegalizerHelper &Helper, MachineInstr &MI) const
 
bool legalizeCTLZ_CTTZ (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool loadInputValue (Register DstReg, MachineIRBuilder &B, const ArgDescriptor *Arg, const TargetRegisterClass *ArgRC, LLT ArgTy) const
 
bool loadInputValue (Register DstReg, MachineIRBuilder &B, AMDGPUFunctionArgInfo::PreloadedValue ArgType) const
 
bool legalizePointerAsRsrcIntrin (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 To create a buffer resource from a 64-bit pointer, mask off the upper 32 bits of the pointer and replace them with the stride argument, then merge_values everything together.
 
bool legalizePreloadedArgIntrin (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, AMDGPUFunctionArgInfo::PreloadedValue ArgType) const
 
bool legalizeWorkitemIDIntrinsic (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, unsigned Dim, AMDGPUFunctionArgInfo::PreloadedValue ArgType) const
 
Register getKernargParameterPtr (MachineIRBuilder &B, int64_t Offset) const
 
bool legalizeKernargMemParameter (MachineInstr &MI, MachineIRBuilder &B, uint64_t Offset, Align Alignment=Align(4)) const
 Legalize a value that's loaded from kernel arguments.
 
bool legalizeUnsignedDIV_REM (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
void legalizeUnsignedDIV_REM32Impl (MachineIRBuilder &B, Register DstDivReg, Register DstRemReg, Register Num, Register Den) const
 
void legalizeUnsignedDIV_REM64Impl (MachineIRBuilder &B, Register DstDivReg, Register DstRemReg, Register Num, Register Den) const
 
bool legalizeSignedDIV_REM (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeFDIV (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeFDIV16 (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeFDIV32 (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeFDIV64 (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeFFREXP (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeFastUnsafeFDIV (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeFastUnsafeFDIV64 (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeFDIVFastIntrin (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeFSQRTF16 (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeFSQRTF32 (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeFSQRTF64 (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeFSQRT (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeRsqClampIntrinsic (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeDSAtomicFPIntrinsic (LegalizerHelper &Helper, MachineInstr &MI, Intrinsic::ID IID) const
 
bool getImplicitArgPtr (Register DstReg, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeImplicitArgPtr (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool getLDSKernelId (Register DstReg, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeLDSKernelId (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeIsAddrSpace (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, unsigned AddrSpace) const
 
std::pair< Register, unsigned > splitBufferOffsets (MachineIRBuilder &B, Register OrigOffset) const
 
Register handleD16VData (MachineIRBuilder &B, MachineRegisterInfo &MRI, Register Reg, bool ImageStore=false) const
 Handle register layout difference for f16 images for some subtargets.
 
Register fixStoreSourceType (MachineIRBuilder &B, Register VData, bool IsFormat) const
 
bool legalizeBufferStore (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, bool IsTyped, bool IsFormat) const
 
bool legalizeBufferLoad (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, bool IsFormat, bool IsTyped) const
 
bool legalizeBufferAtomic (MachineInstr &MI, MachineIRBuilder &B, Intrinsic::ID IID) const
 
bool legalizeBVHIntrinsic (MachineInstr &MI, MachineIRBuilder &B) const
 
bool legalizeFPTruncRound (MachineInstr &MI, MachineIRBuilder &B) const
 
bool legalizeStackSave (MachineInstr &MI, MachineIRBuilder &B) const
 
bool legalizeImageIntrinsic (MachineInstr &MI, MachineIRBuilder &B, GISelChangeObserver &Observer, const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr) const
 Rewrite image intrinsics to use register layouts expected by the subtarget.
 
bool legalizeSBufferLoad (LegalizerHelper &Helper, MachineInstr &MI) const
 
bool legalizeTrapIntrinsic (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeTrapEndpgm (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeTrapHsaQueuePtr (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeTrapHsa (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeDebugTrapIntrinsic (MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const
 
bool legalizeIntrinsic (LegalizerHelper &Helper, MachineInstr &MI) const override
 
- Public Member Functions inherited from llvm::LegalizerInfo
virtual ~LegalizerInfo ()=default
 
const LegacyLegalizerInfo & getLegacyLegalizerInfo () const
 
LegacyLegalizerInfo & getLegacyLegalizerInfo ()
 
unsigned getOpcodeIdxForOpcode (unsigned Opcode) const
 
unsigned getActionDefinitionsIdx (unsigned Opcode) const
 
void verify (const MCInstrInfo &MII) const
 Perform simple self-diagnostic and assert if there is anything obviously wrong with the actions set up.
 
const LegalizeRuleSet & getActionDefinitions (unsigned Opcode) const
 Get the action definitions for the given opcode.
 
LegalizeRuleSet & getActionDefinitionsBuilder (unsigned Opcode)
 Get the action definition builder for the given opcode.
 
LegalizeRuleSet & getActionDefinitionsBuilder (std::initializer_list< unsigned > Opcodes)
 Get the action definition builder for the given set of opcodes.
 
void aliasActionDefinitions (unsigned OpcodeTo, unsigned OpcodeFrom)
 
LegalizeActionStep getAction (const LegalityQuery &Query) const
 Determine what action should be taken to legalize the described instruction.
 
LegalizeActionStep getAction (const MachineInstr &MI, const MachineRegisterInfo &MRI) const
 Determine what action should be taken to legalize the given generic instruction.
 
bool isLegal (const LegalityQuery &Query) const
 
bool isLegalOrCustom (const LegalityQuery &Query) const
 
bool isLegal (const MachineInstr &MI, const MachineRegisterInfo &MRI) const
 
bool isLegalOrCustom (const MachineInstr &MI, const MachineRegisterInfo &MRI) const
 
virtual bool legalizeCustom (LegalizerHelper &Helper, MachineInstr &MI) const
 Called for instructions with the Custom LegalizationAction.
 
virtual bool legalizeIntrinsic (LegalizerHelper &Helper, MachineInstr &MI) const
 
virtual unsigned getExtOpcodeForWideningConstant (LLT SmallTy) const
 Return the opcode (SEXT/ZEXT/ANYEXT) that should be performed while widening a constant of type SmallTy which targets can override.
 

Detailed Description

This class provides the information for the target register banks.

Definition at line 31 of file AMDGPULegalizerInfo.h.

Constructor & Destructor Documentation

◆ AMDGPULegalizerInfo()

AMDGPULegalizerInfo::AMDGPULegalizerInfo ( const GCNSubtarget &  ST,
const GCNTargetMachine &  TM 
)

Definition at line 572 of file AMDGPULegalizerInfo.cpp.

References llvm::LegalityPredicates::all(), llvm::LegalizeRuleSet::alwaysLegal(), assert(), llvm::AMDGPUAS::BUFFER_FAT_POINTER, llvm::AMDGPUAS::BUFFER_RESOURCE, llvm::LegalizeMutations::changeTo(), llvm::LegalizeRuleSet::clampMaxNumElements(), llvm::LegalizeRuleSet::clampMaxNumElementsStrict(), llvm::LegalizeRuleSet::clampScalar(), llvm::LegalizeRuleSet::clampScalarOrElt(), llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::AMDGPUAS::CONSTANT_ADDRESS_32BIT, llvm::LegalizeRuleSet::custom(), llvm::LegalizeRuleSet::customFor(), llvm::LegalizeRuleSet::customIf(), elementTypeIsLegal(), llvm::LegalizeRuleSet::fewerElementsIf(), fewerEltsToSize64Vector(), llvm::LLT::fixed_vector(), llvm::AMDGPUAS::FLAT_ADDRESS, llvm::LegalizerInfo::getActionDefinitionsBuilder(), llvm::AMDGPUAS::GLOBAL_ADDRESS, llvm::AMDGPUSubtarget::has16BitInsts(), llvm::GCNSubtarget::hasAddNoCarry(), llvm::GCNSubtarget::hasFractBug(), llvm::GCNSubtarget::hasIntClamp(), llvm::GCNSubtarget::hasMad64_32(), llvm::GCNSubtarget::hasMadF16(), llvm::AMDGPUSubtarget::hasMadMacF32Insts(), llvm::GCNSubtarget::hasPackedFP32Ops(), llvm::AMDGPUSubtarget::hasVOP3PInsts(), llvm::LegalityPredicates::isPointer(), isRegisterType(), llvm::LegalityPredicates::isScalar(), isSmallOddVector(), llvm::LegalizeRuleSet::legalFor(), llvm::LegalizeRuleSet::legalIf(), llvm::AMDGPUAS::LOCAL_ADDRESS, llvm::LegalizeRuleSet::lower(), MaxRegisterSize, llvm::LegalizeRuleSet::maxScalar(), llvm::LegalizeRuleSet::minScalar(), llvm::LegalizeRuleSet::moreElementsIf(), llvm::Mul, oneMoreElement(), llvm::LLT::pointer(), llvm::AMDGPUAS::PRIVATE_ADDRESS, llvm::AMDGPUAS::REGION_ADDRESS, llvm::LLT::scalar(), llvm::LegalizeMutations::scalarize(), llvm::LegalizeRuleSet::scalarize(), TM, llvm::LegalityPredicates::typeIs(), llvm::LegalityPredicates::typeIsNot(), vectorWiderThan(), llvm::LegalizeRuleSet::widenScalarToNextMultipleOf(), and llvm::LegalizeRuleSet::widenScalarToNextPow2().

Member Function Documentation

◆ buildAbsGlobalAddress()

void AMDGPULegalizerInfo::buildAbsGlobalAddress ( Register  DstReg,
LLT  PtrTy,
MachineIRBuilder &  B,
const GlobalValue *  GV,
MachineRegisterInfo &  MRI 
) const

Definition at line 2768 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::LLT::getSizeInBits(), llvm::SIInstrInfo::MO_ABS32_HI, llvm::SIInstrInfo::MO_ABS32_LO, MRI, and llvm::LLT::scalar().

Referenced by legalizeGlobalValue().

◆ buildMultiply()

void AMDGPULegalizerInfo::buildMultiply ( LegalizerHelper &  Helper,
MutableArrayRef< Register >  Accum,
ArrayRef< Register >  Src0,
ArrayRef< Register >  Src1,
bool  UsePartialMad64_32,
bool  SeparateOddAlignedProducts 
) const

Definition at line 3740 of file AMDGPULegalizerInfo.cpp.

References llvm::Add, assert(), B, llvm::MutableArrayRef< T >::drop_front(), llvm::LegalizerHelper::getKnownBits(), llvm::GISelKnownBits::getKnownBits(), llvm::Hi, llvm::KnownBits::isZero(), llvm::Lo, llvm::LegalizerHelper::MIRBuilder, llvm::Mul, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::LLT::scalar(), llvm::ArrayRef< T >::size(), and llvm::MutableArrayRef< T >::take_front().

Referenced by legalizeMul().

◆ buildPCRelGlobalAddress()

bool AMDGPULegalizerInfo::buildPCRelGlobalAddress ( Register  DstReg,
LLT  PtrTy,
MachineIRBuilder &  B,
const GlobalValue *  GV,
int64_t  Offset,
unsigned  GAFlags = SIInstrInfo::MO_NONE 
) const

Definition at line 2715 of file AMDGPULegalizerInfo.cpp.

References llvm::MachineInstrBuilder::addGlobalAddress(), llvm::MachineInstrBuilder::addImm(), assert(), B, llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::LLT::getSizeInBits(), llvm::SIInstrInfo::MO_NONE, llvm::Offset, and llvm::LLT::pointer().

Referenced by legalizeGlobalValue().

◆ fixStoreSourceType()

Register AMDGPULegalizerInfo::fixStoreSourceType ( MachineIRBuilder &  B,
Register  VData,
bool  IsFormat 
) const

Definition at line 5507 of file AMDGPULegalizerInfo.cpp.

References B, castBufferRsrcToV4I32(), llvm::LLT::getElementType(), llvm::LLT::getNumElements(), handleD16VData(), hasBufferRsrcWorkaround(), llvm::LLT::isVector(), MRI, and llvm::LLT::scalar().

Referenced by legalizeBufferStore().

◆ getImplicitArgPtr()

bool AMDGPULegalizerInfo::getImplicitArgPtr ( Register  DstReg,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 5269 of file AMDGPULegalizerInfo.cpp.

References B, llvm::AMDGPUTargetLowering::FIRST_IMPLICIT, llvm::AMDGPUTargetLowering::getImplicitParameterOffset(), llvm::LLT::getSizeInBits(), llvm::GCNSubtarget::getTargetLowering(), llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, loadInputValue(), MRI, llvm::Offset, and llvm::LLT::scalar().

Referenced by legalizeImplicitArgPtr().

◆ getKernargParameterPtr()

Register AMDGPULegalizerInfo::getKernargParameterPtr ( MachineIRBuilder &  B,
int64_t  Offset 
) const

Definition at line 4231 of file AMDGPULegalizerInfo.cpp.

References B, llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, llvm_unreachable, loadInputValue(), llvm::Offset, llvm::LLT::pointer(), and llvm::LLT::scalar().

Referenced by legalizeKernargMemParameter().

◆ getLDSKernelId()

bool AMDGPULegalizerInfo::getLDSKernelId ( Register  DstReg,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 5349 of file AMDGPULegalizerInfo.cpp.

References B, F, and llvm::AMDGPUMachineFunction::getLDSKernelIdMetadata().

Referenced by legalizeLDSKernelId().

◆ getScaledLogInput()

std::pair< Register, Register > AMDGPULegalizerInfo::getScaledLogInput ( MachineIRBuilder &  B,
Register  Src,
unsigned  Flags 
) const

Definition at line 3138 of file AMDGPULegalizerInfo.cpp.

References B, llvm::CmpInst::FCMP_OLT, llvm::APFloat::getSmallestNormalized(), llvm::APFloatBase::IEEEsingle(), needsDenormHandlingF32(), and llvm::LLT::scalar().

Referenced by legalizeFlog2(), legalizeFlogCommon(), and legalizeFlogUnsafe().

◆ getSegmentAperture()

Register AMDGPULegalizerInfo::getSegmentAperture ( unsigned  AddrSpace,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 2074 of file AMDGPULegalizerInfo.cpp.

References llvm::AMDGPU::AMDHSA_COV5, assert(), B, llvm::commonAlignment(), llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::AMDGPU::getCodeObjectVersion(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::GlobalValue::getParent(), llvm::MachineFunction::getSubtarget(), llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, loadInputValue(), llvm::AMDGPUAS::LOCAL_ADDRESS, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, MRI, llvm::Offset, llvm::LLT::pointer(), llvm::AMDGPUAS::PRIVATE_ADDRESS, llvm::AMDGPUTargetLowering::PRIVATE_BASE, llvm::AMDGPUFunctionArgInfo::QUEUE_PTR, llvm::LLT::scalar(), and llvm::AMDGPUTargetLowering::SHARED_BASE.

Referenced by legalizeAddrSpaceCast(), and legalizeIsAddrSpace().

◆ handleD16VData()

Register AMDGPULegalizerInfo::handleD16VData ( MachineIRBuilder &  B,
MachineRegisterInfo &  MRI,
Register  Reg,
bool  ImageStore = false 
) const

Handle register layout difference for f16 images for some subtargets.

Definition at line 5444 of file AMDGPULegalizerInfo.cpp.

References assert(), B, E, llvm::LLT::fixed_vector(), llvm::LLT::getElementType(), llvm::LLT::getNumElements(), llvm::GCNSubtarget::hasImageStoreD16Bug(), llvm::GCNSubtarget::hasUnpackedD16VMem(), I, llvm::LLT::isVector(), llvm_unreachable, MRI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::SmallVectorImpl< T >::resize(), and llvm::LLT::scalar().

Referenced by fixStoreSourceType(), and legalizeImageIntrinsic().

◆ legalizeAddrSpaceCast()

bool AMDGPULegalizerInfo::legalizeAddrSpaceCast ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 2181 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::AMDGPUAS::CONSTANT_ADDRESS_32BIT, llvm::LLVMContext::diagnose(), llvm::AMDGPUAS::FLAT_ADDRESS, llvm::LLT::getAddressSpace(), llvm::Function::getContext(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), getSegmentAperture(), llvm::LLT::getSizeInBits(), llvm::MachineFunction::getTarget(), llvm::CmpInst::ICMP_NE, Info, isKnownNonNull(), llvm::Register::isValid(), llvm::LLT::isVector(), llvm::AMDGPUAS::LOCAL_ADDRESS, MI, MRI, llvm::AMDGPUAS::PRIVATE_ADDRESS, llvm::LLT::scalar(), and TM.

Referenced by legalizeCustom().

◆ legalizeAtomicCmpXChg()

bool AMDGPULegalizerInfo::legalizeAtomicCmpXChg ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 3068 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::LLT::fixed_vector(), getReg(), llvm::AMDGPU::isFlatGlobalAddrSpace(), MI, and MRI.

Referenced by legalizeCustom().

◆ legalizeBufferAtomic()

bool AMDGPULegalizerInfo::legalizeBufferAtomic ( MachineInstr &  MI,
MachineIRBuilder &  B,
Intrinsic::ID  IID 
) const

Definition at line 5870 of file AMDGPULegalizerInfo.cpp.

References B, castBufferRsrcArgToV4I32(), getBufferAtomicPseudo(), MI, llvm::LLT::scalar(), and splitBufferOffsets().

Referenced by legalizeIntrinsic().

◆ legalizeBufferLoad()

bool AMDGPULegalizerInfo::legalizeBufferLoad ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B,
bool  IsFormat,
bool  IsTyped 
) const

Definition at line 5642 of file AMDGPULegalizerInfo.cpp.

References assert(), B, buildBufferLoad(), castBufferRsrcArgToV4I32(), castBufferRsrcFromV4I32(), llvm::LLT::changeElementSize(), llvm::divideCeil(), llvm::LLT::fixed_vector(), llvm::Format, llvm::MachineMemOperand::getMemoryType(), llvm::LLT::getScalarType(), llvm::LLT::getSizeInBits(), hasBufferRsrcWorkaround(), llvm::GCNSubtarget::hasUnpackedD16VMem(), I, llvm::LLT::isVector(), MI, MRI, N, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::LLT::scalar(), splitBufferOffsets(), and llvm::SmallVectorImpl< T >::truncate().

Referenced by legalizeIntrinsic().

◆ legalizeBufferStore()

bool AMDGPULegalizerInfo::legalizeBufferStore ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B,
bool  IsTyped,
bool  IsFormat 
) const

Definition at line 5534 of file AMDGPULegalizerInfo.cpp.

References B, castBufferRsrcArgToV4I32(), fixStoreSourceType(), llvm::Format, llvm::LLT::getScalarType(), llvm::MachineMemOperand::getSize(), llvm::LLT::getSizeInBits(), MI, MRI, llvm::LLT::scalar(), and splitBufferOffsets().

Referenced by legalizeIntrinsic().

◆ legalizeBuildVector()

bool AMDGPULegalizerInfo::legalizeBuildVector ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 3708 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::LLT::fixed_vector(), Merge, MI, MRI, and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeBVHIntrinsic()

bool AMDGPULegalizerInfo::legalizeBVHIntrinsic ( MachineInstr &  MI,
MachineIRBuilder &  B 
) const

Definition at line 6599 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::SmallVectorImpl< T >::clear(), llvm::LLT::fixed_vector(), llvm::AMDGPU::getMIMGOpcode(), llvm::GCNSubtarget::getNSAMaxSize(), llvm::GCNSubtarget::hasGFX10_AEncoding(), llvm::GCNSubtarget::hasNSAEncoding(), llvm::AMDGPU::isGFX11Plus(), MI, MRI, Opcode, llvm::SmallVectorTemplateBase< T, bool >::push_back(), R2, llvm::LLT::scalar(), and llvm::SmallVectorBase< Size_T >::size().

Referenced by legalizeIntrinsic().

◆ legalizeCTLZ_CTTZ()

bool AMDGPULegalizerInfo::legalizeCTLZ_CTTZ ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 4044 of file AMDGPULegalizerInfo.cpp.

References B, llvm::LLT::getSizeInBits(), MI, and MRI.

Referenced by legalizeCustom().

◆ legalizeCustom()

bool AMDGPULegalizerInfo::legalizeCustom ( LegalizerHelper &  Helper,
MachineInstr &  MI 
) const
overridevirtual

Called for instructions with the Custom LegalizationAction.

Reimplemented from llvm::LegalizerInfo.

Definition at line 1979 of file AMDGPULegalizerInfo.cpp.

References B, legalizeAddrSpaceCast(), legalizeAtomicCmpXChg(), legalizeBuildVector(), legalizeCTLZ_CTTZ(), legalizeExtractVectorElt(), legalizeFceil(), legalizeFDIV(), legalizeFExp(), legalizeFExp2(), legalizeFFloor(), legalizeFFREXP(), legalizeFlog2(), legalizeFlogCommon(), legalizeFMad(), legalizeFPow(), legalizeFPTOI(), legalizeFPTruncRound(), legalizeFrem(), legalizeFroundeven(), legalizeFSQRT(), legalizeGlobalValue(), legalizeInsertVectorElt(), legalizeIntrinsicTrunc(), legalizeITOFP(), legalizeLoad(), legalizeMinNumMaxNum(), legalizeMul(), legalizeSignedDIV_REM(), legalizeSinCos(), legalizeStackSave(), legalizeStore(), legalizeUnsignedDIV_REM(), llvm_unreachable, MI, llvm::LegalizerHelper::MIRBuilder, and MRI.

◆ legalizeDebugTrapIntrinsic()

bool AMDGPULegalizerInfo::legalizeDebugTrapIntrinsic ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 6578 of file AMDGPULegalizerInfo.cpp.

References llvm::GCNSubtarget::AMDHSA, B, llvm::LLVMContext::diagnose(), llvm::DS_Warning, llvm::GCNSubtarget::getTrapHandlerAbi(), llvm::GCNSubtarget::isTrapHandlerEnabled(), llvm::GCNSubtarget::LLVMAMDHSADebugTrap, and MI.

Referenced by legalizeIntrinsic().

◆ legalizeDSAtomicFPIntrinsic()

bool AMDGPULegalizerInfo::legalizeDSAtomicFPIntrinsic ( LegalizerHelper &  Helper,
MachineInstr &  MI,
Intrinsic::ID  IID 
) const

Definition at line 5251 of file AMDGPULegalizerInfo.cpp.

References llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), getDSFPAtomicOpcode(), llvm::GCNSubtarget::getInstrInfo(), I, MI, and llvm::LegalizerHelper::Observer.

Referenced by legalizeIntrinsic().

◆ legalizeExtractVectorElt()

bool AMDGPULegalizerInfo::legalizeExtractVectorElt ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 2574 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::LLT::changeElementType(), llvm::LLT::getElementType(), llvm::getIConstantVRegValWithLookThrough(), llvm::LLT::getNumElements(), llvm::LLT::getSizeInBits(), llvm::LLT::isPointer(), MI, MRI, and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeFastUnsafeFDIV()

bool AMDGPULegalizerInfo::legalizeFastUnsafeFDIV ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 4594 of file AMDGPULegalizerInfo.cpp.

References B, llvm::MachineInstr::FmAfn, llvm::MachineInstr::FmArcp, llvm::getConstantFPVRegVal(), llvm::MachineFunction::getTarget(), LHS, MI, MRI, llvm::TargetMachine::Options, RHS, llvm::LLT::scalar(), and llvm::TargetOptions::UnsafeFPMath.

Referenced by legalizeFDIV16(), and legalizeFDIV32().

◆ legalizeFastUnsafeFDIV64()

bool AMDGPULegalizerInfo::legalizeFastUnsafeFDIV64 ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 4656 of file AMDGPULegalizerInfo.cpp.

References B, llvm::MachineInstr::FmAfn, llvm::MachineFunction::getTarget(), MI, MRI, llvm::TargetMachine::Options, llvm::TargetOptions::UnsafeFPMath, X, and Y.

Referenced by legalizeFDIV64().

◆ legalizeFceil()

bool AMDGPULegalizerInfo::legalizeFceil ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 2320 of file AMDGPULegalizerInfo.cpp.

References llvm::Add, assert(), B, llvm::CmpInst::FCMP_OGT, llvm::CmpInst::FCMP_ONE, MI, MRI, and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeFDIV()

bool AMDGPULegalizerInfo::legalizeFDIV ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 4267 of file AMDGPULegalizerInfo.cpp.

References B, legalizeFDIV16(), legalizeFDIV32(), legalizeFDIV64(), MI, MRI, and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeFDIV16()

bool AMDGPULegalizerInfo::legalizeFDIV16 ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 4693 of file AMDGPULegalizerInfo.cpp.

References B, legalizeFastUnsafeFDIV(), LHS, MI, MRI, RHS, and llvm::LLT::scalar().

Referenced by legalizeFDIV().

◆ legalizeFDIV32()

bool AMDGPULegalizerInfo::legalizeFDIV32 ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 4756 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::DenormalMode::Dynamic, llvm::DenormalMode::getIEEE(), llvm::SIMachineFunctionInfo::getMode(), legalizeFastUnsafeFDIV(), LHS, MI, MRI, llvm::Mul, RHS, llvm::LLT::scalar(), SPDenormModeBitField, and toggleSPDenormMode().

Referenced by legalizeFDIV().

◆ legalizeFDIV64()

bool AMDGPULegalizerInfo::legalizeFDIV64 ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 4843 of file AMDGPULegalizerInfo.cpp.

References B, llvm::GCNSubtarget::hasUsableDivScaleConditionOutput(), llvm::CmpInst::ICMP_EQ, legalizeFastUnsafeFDIV64(), LHS, MI, MRI, llvm::Mul, RHS, and llvm::LLT::scalar().

Referenced by legalizeFDIV().

◆ legalizeFDIVFastIntrin()

bool AMDGPULegalizerInfo::legalizeFDIVFastIntrin ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 4959 of file AMDGPULegalizerInfo.cpp.

References B, llvm::CmpInst::FCMP_OGT, LHS, MI, RHS, and llvm::LLT::scalar().

Referenced by legalizeIntrinsic().

◆ legalizeFExp()

bool AMDGPULegalizerInfo::legalizeFExp ( MachineInstr &  MI,
MachineIRBuilder &  B 
) const

Definition at line 3461 of file AMDGPULegalizerInfo.cpp.

References A, allowApproxFunc(), assert(), B, llvm::CallingConv::C, CC, CH, E, llvm::CmpInst::FCMP_OGT, llvm::CmpInst::FCMP_OLT, llvm::MachineInstr::FmNoInfs, llvm::APFloat::getInf(), getMad(), llvm::MachineFunction::getTarget(), llvm::AMDGPUSubtarget::hasFastFMAF32(), llvm::APFloatBase::IEEEsingle(), legalizeFExpUnsafe(), llvm::numbers::log2ef, MI, MRI, llvm::TargetMachine::Options, Options, llvm::LLT::scalar(), and X.

Referenced by legalizeCustom().

◆ legalizeFExp2()

bool AMDGPULegalizerInfo::legalizeFExp2 ( MachineInstr &  MI,
MachineIRBuilder &  B 
) const

Definition at line 3363 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::CmpInst::FCMP_OLT, llvm::Log2(), MI, needsDenormHandlingF32(), and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeFExpUnsafe()

bool AMDGPULegalizerInfo::legalizeFExpUnsafe ( MachineIRBuilder &  B,
Register  Dst,
Register  Src,
unsigned  Flags 
) const

Definition at line 3421 of file AMDGPULegalizerInfo.cpp.

References B, llvm::CmpInst::FCMP_OLT, llvm::numbers::log2e, llvm::Mul, needsDenormHandlingF32(), llvm::LLT::scalar(), and X.

Referenced by legalizeFExp().

◆ legalizeFFloor()

bool AMDGPULegalizerInfo::legalizeFFloor ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 3649 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::CmpInst::FCMP_ORD, llvm::LLT::float64(), llvm::MachineInstr::FmNoNans, llvm::SIMachineFunctionInfo::getMode(), llvm::GCNSubtarget::hasFractBug(), llvm::SIModeRegisterDefaults::IEEE, MI, MRI, llvm::LLT::scalar(), and stripAnySourceMods().

Referenced by legalizeCustom().

◆ legalizeFFREXP()

bool AMDGPULegalizerInfo::legalizeFFREXP ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 4924 of file AMDGPULegalizerInfo.cpp.

References B, llvm::CmpInst::FCMP_OLT, llvm::getFltSemanticForLLT(), llvm::APFloat::getInf(), llvm::GCNSubtarget::hasFractBug(), MI, MRI, and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeFlog2()

bool AMDGPULegalizerInfo::legalizeFlog2 ( MachineInstr &  MI,
MachineIRBuilder &  B 
) const

Definition at line 3158 of file AMDGPULegalizerInfo.cpp.

References assert(), B, getScaledLogInput(), llvm::Log2(), MI, and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeFlogCommon()

bool AMDGPULegalizerInfo::legalizeFlogCommon ( MachineInstr &  MI,
MachineIRBuilder &  B 
) const

Definition at line 3214 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::CallingConv::C, CC, CH, llvm::CmpInst::FCMP_OLT, llvm::MachineInstr::FmAfn, llvm::MachineInstr::FmNoInfs, llvm::MachineInstr::FmNoNans, llvm::APFloat::getInf(), getMad(), getScaledLogInput(), llvm::MachineFunction::getTarget(), llvm::AMDGPUSubtarget::has16BitInsts(), llvm::AMDGPUSubtarget::hasFastFMAF32(), llvm::APFloatBase::IEEEsingle(), legalizeFlogUnsafe(), MI, MRI, llvm::LLT::scalar(), TM, X, and Y.

Referenced by legalizeCustom().

◆ legalizeFlogUnsafe()

bool AMDGPULegalizerInfo::legalizeFlogUnsafe ( MachineIRBuilder &  B,
Register  Dst,
Register  Src,
bool  IsLog10,
unsigned  Flags 
) const

Definition at line 3322 of file AMDGPULegalizerInfo.cpp.

References B, getScaledLogInput(), llvm::AMDGPUSubtarget::hasFastFMAF32(), llvm::numbers::ln10, llvm::numbers::ln2, llvm::Mul, and llvm::LLT::scalar().

Referenced by legalizeFlogCommon().

◆ legalizeFMad()

bool AMDGPULegalizerInfo::legalizeFMad ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 3044 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::LLT::float16(), llvm::LLT::float32(), llvm::SIModeRegisterDefaults::FP32Denormals, llvm::SIModeRegisterDefaults::FP64FP16Denormals, llvm::MachineFunction::getInfo(), llvm::SIMachineFunctionInfo::getMode(), llvm::DenormalMode::getPreserveSign(), llvm::LLT::isScalar(), llvm::LegalizerHelper::Legalized, llvm::LegalizerHelper::lowerFMad(), MI, and MRI.

Referenced by legalizeCustom().

◆ legalizeFPow()

bool AMDGPULegalizerInfo::legalizeFPow ( MachineInstr &  MI,
MachineIRBuilder &  B 
) const

Definition at line 3603 of file AMDGPULegalizerInfo.cpp.

References B, llvm::LLT::float16(), llvm::LLT::float32(), MI, and llvm::Mul.

Referenced by legalizeCustom().

◆ legalizeFPTOI()

bool AMDGPULegalizerInfo::legalizeFPTOI ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B,
bool  Signed 
) const

Definition at line 2485 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::Hi, llvm::Lo, MI, MRI, llvm::Mul, llvm::LLT::scalar(), and Signed.

Referenced by legalizeCustom().

◆ legalizeFPTruncRound()

bool AMDGPULegalizerInfo::legalizeFPTruncRound ( MachineInstr &  MI,
MachineIRBuilder &  B 
) const

Definition at line 6746 of file AMDGPULegalizerInfo.cpp.

References B, MI, llvm::TowardNegative, and llvm::TowardPositive.

Referenced by legalizeCustom().

◆ legalizeFrem()

bool AMDGPULegalizerInfo::legalizeFrem ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 2349 of file AMDGPULegalizerInfo.cpp.

References B, MI, and MRI.

Referenced by legalizeCustom().

◆ legalizeFroundeven()

bool AMDGPULegalizerInfo::legalizeFroundeven ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 2294 of file AMDGPULegalizerInfo.cpp.

References assert(), B, Cond, llvm::CmpInst::FCMP_OGT, llvm::LLT::getSizeInBits(), llvm::APFloatBase::IEEEdouble(), llvm::LLT::isScalar(), MI, MRI, and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeFSQRT()

bool AMDGPULegalizerInfo::legalizeFSQRT ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 5176 of file AMDGPULegalizerInfo.cpp.

References B, legalizeFSQRTF16(), legalizeFSQRTF32(), legalizeFSQRTF64(), MI, MRI, and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeFSQRTF16()

bool AMDGPULegalizerInfo::legalizeFSQRTF16 ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 4994 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::AMDGPUSubtarget::has16BitInsts(), llvm::Log2(), MI, and llvm::LLT::scalar().

Referenced by legalizeFSQRT().

◆ legalizeFSQRTF32()

bool AMDGPULegalizerInfo::legalizeFSQRTF32 ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 5011 of file AMDGPULegalizerInfo.cpp.

References allowApproxFunc(), B, llvm::CmpInst::FCMP_OGT, llvm::CmpInst::FCMP_OLE, llvm::fcPosInf, llvm::fcZero, MI, MRI, needsDenormHandlingF32(), llvm::LLT::scalar(), and X.

Referenced by legalizeFSQRT().

◆ legalizeFSQRTF64()

bool AMDGPULegalizerInfo::legalizeFSQRTF64 ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 5092 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::CmpInst::FCMP_OLT, llvm::fcPosInf, llvm::fcZero, MI, MRI, llvm::LLT::scalar(), and X.

Referenced by legalizeFSQRT().

◆ legalizeGlobalValue()

bool AMDGPULegalizerInfo::legalizeGlobalValue ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 2823 of file AMDGPULegalizerInfo.cpp.

References llvm::AMDGPUMachineFunction::allocateLDSGlobal(), B, buildAbsGlobalAddress(), buildPCRelGlobalAddress(), llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::LLVMContext::diagnose(), llvm::DS_Warning, llvm::StringRef::equals(), llvm::LLT::getAddressSpace(), llvm::Function::getContext(), llvm::MachineFunction::getFunction(), llvm::MachinePointerInfo::getGOT(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::Value::getName(), llvm::LLT::getSizeInBits(), llvm::GCNSubtarget::getTargetLowering(), llvm::GlobalValue::getValueType(), llvm::GlobalValue::hasExternalLinkage(), llvm::AMDGPUSubtarget::isAmdPalOS(), llvm::AMDGPUSubtarget::isMesa3DOS(), llvm::AMDGPUMachineFunction::isModuleEntryFunction(), llvm::AMDGPUAS::LOCAL_ADDRESS, MI, llvm::SIInstrInfo::MO_ABS32_LO, llvm::SIInstrInfo::MO_GOTPCREL32, llvm::SIInstrInfo::MO_REL32, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, MRI, llvm::LLT::pointer(), llvm::AMDGPUAS::REGION_ADDRESS, llvm::LLT::scalar(), llvm::AMDGPUMachineFunction::setDynLDSAlign(), llvm::SITargetLowering::shouldEmitFixup(), llvm::SITargetLowering::shouldEmitPCReloc(), and llvm::SITargetLowering::shouldUseLDSConstAddress().

Referenced by legalizeCustom().

◆ legalizeImageIntrinsic()

bool AMDGPULegalizerInfo::legalizeImageIntrinsic ( MachineInstr &  MI,
MachineIRBuilder &  B,
GISelChangeObserver &  Observer,
const AMDGPU::ImageDimIntrinsicInfo *  Intr 
) const

Rewrite image intrinsics to use register layouts expected by the subtarget.

Depending on the subtarget, load/store with 16-bit element data need to be rewritten to use the low half of 32-bit registers, or directly use a packed layout. 16-bit addresses should also sometimes be packed into 32-bit registers.

We don't want to directly select image instructions just yet, but also want to exposes all register repacking to the legalizer/combiners. We also don't want a selected instruction entering RegBankSelect. In order to avoid defining a multitude of intermediate image instructions, directly hack on the intrinsic's arguments. In cases like a16 addresses, this requires padding now unnecessary arguments with $noreg.

Definition at line 6038 of file AMDGPULegalizerInfo.cpp.

References assert(), llvm::AMDGPU::MIMGBaseOpcodeInfo::Atomic, llvm::AMDGPU::MIMGBaseOpcodeInfo::AtomicX2, B, llvm::GISelChangeObserver::changedInstr(), llvm::LLT::changeElementCount(), llvm::GISelChangeObserver::changingInstr(), Concat, convertImageAddrToPacked(), llvm::MachineOperand::CreateImm(), llvm::LLT::fixed_vector(), llvm::AMDGPU::MIMGBaseOpcodeInfo::Gather4, llvm::ElementCount::getFixed(), llvm::SrcOp::getImm(), llvm::AMDGPU::getMIMGBaseOpcodeInfo(), llvm::GCNSubtarget::getNSAMaxSize(), llvm::GCNSubtarget::getNSAThreshold(), llvm::LLT::getNumElements(), llvm::SrcOp::getReg(), llvm::LLT::getScalarType(), llvm::LLT::getSizeInBits(), llvm::AMDGPU::MIMGBaseOpcodeInfo::Gradients, handleD16VData(), llvm::GCNSubtarget::hasA16(), llvm::GCNSubtarget::hasG16(), llvm::GCNSubtarget::hasNSAEncoding(), llvm::GCNSubtarget::hasPartialNSAEncoding(), llvm::GCNSubtarget::hasUnpackedD16VMem(), I, Intr, llvm::LLT::isVector(), llvm::make_scope_exit(), MI, MRI, packImage16bitOpsToDwords(), llvm::popcount(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::SmallVectorImpl< T >::resize(), llvm::LLT::scalar(), llvm::LLT::scalarOrVector(), llvm::SmallVectorBase< Size_T >::size(), and llvm::AMDGPU::MIMGBaseOpcodeInfo::Store.

Referenced by legalizeIntrinsic().

◆ legalizeImplicitArgPtr()

bool AMDGPULegalizerInfo::legalizeImplicitArgPtr ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 5332 of file AMDGPULegalizerInfo.cpp.

References B, getImplicitArgPtr(), llvm::AMDGPUFunctionArgInfo::IMPLICIT_ARG_PTR, llvm::AMDGPUMachineFunction::isEntryFunction(), legalizePreloadedArgIntrin(), MI, and MRI.

Referenced by legalizeIntrinsic().

◆ legalizeInsertVectorElt()

bool AMDGPULegalizerInfo::legalizeInsertVectorElt ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 2625 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::LLT::changeElementType(), llvm::LLT::getElementType(), llvm::getIConstantVRegValWithLookThrough(), llvm::LLT::getNumElements(), llvm::LLT::getSizeInBits(), llvm::LLT::isPointer(), MI, MRI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeIntrinsic()

bool AMDGPULegalizerInfo::legalizeIntrinsic ( LegalizerHelper &  Helper,
MachineInstr &  MI 
) const
overridevirtual
Returns
true if MI is either legal or has been legalized and false if not legal. Return true if MI is either legal or has been legalized and false if not legal.

Reimplemented from llvm::LegalizerInfo.

Definition at line 6777 of file AMDGPULegalizerInfo.cpp.

References B, llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), llvm::AMDGPUFunctionArgInfo::DISPATCH_ID, llvm::AMDGPUFunctionArgInfo::DISPATCH_PTR, llvm::AMDGPU::getImageDimIntrinsicInfo(), llvm::MachineInstr::getOperand(), llvm::AMDGPUSubtarget::getWavefrontSize(), llvm::SI::KernelInputOffsets::GLOBAL_SIZE_X, llvm::SI::KernelInputOffsets::GLOBAL_SIZE_Y, llvm::SI::KernelInputOffsets::GLOBAL_SIZE_Z, llvm::AMDGPUFunctionArgInfo::IMPLICIT_BUFFER_PTR, llvm::AMDGPU::isKernel(), llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, llvm::AMDGPUFunctionArgInfo::LDS_KERNEL_ID, legalizeBufferAtomic(), legalizeBufferLoad(), legalizeBufferStore(), legalizeBVHIntrinsic(), legalizeDebugTrapIntrinsic(), legalizeDSAtomicFPIntrinsic(), legalizeFDIVFastIntrin(), legalizeImageIntrinsic(), legalizeImplicitArgPtr(), legalizeIsAddrSpace(), legalizeKernargMemParameter(), legalizePointerAsRsrcIntrin(), legalizePreloadedArgIntrin(), legalizeRsqClampIntrinsic(), legalizeSBufferLoad(), legalizeTrapIntrinsic(), legalizeWorkitemIDIntrinsic(), llvm::AMDGPUAS::LOCAL_ADDRESS, llvm::SI::KernelInputOffsets::LOCAL_SIZE_X, llvm::SI::KernelInputOffsets::LOCAL_SIZE_Y, llvm::SI::KernelInputOffsets::LOCAL_SIZE_Z, MI, llvm::LegalizerHelper::MIRBuilder, MRI, llvm::SI::KernelInputOffsets::NGROUPS_X, llvm::SI::KernelInputOffsets::NGROUPS_Y, llvm::SI::KernelInputOffsets::NGROUPS_Z, llvm::LegalizerHelper::Observer, llvm::AMDGPUAS::PRIVATE_ADDRESS, llvm::AMDGPUFunctionArgInfo::QUEUE_PTR, llvm::MachineOperand::setMBB(), std::swap(), TRI, verifyCFIntrinsic(), llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_X, llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_Y, llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_Z, llvm::AMDGPUFunctionArgInfo::WORKITEM_ID_X, llvm::AMDGPUFunctionArgInfo::WORKITEM_ID_Y, and llvm::AMDGPUFunctionArgInfo::WORKITEM_ID_Z.

◆ legalizeIntrinsicTrunc()

bool AMDGPULegalizerInfo::legalizeIntrinsicTrunc ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 2383 of file AMDGPULegalizerInfo.cpp.

References assert(), B, extractF64Exponent(), llvm::Hi, llvm::CmpInst::ICMP_SGT, llvm::CmpInst::ICMP_SLT, MI, MRI, and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeIsAddrSpace()

bool AMDGPULegalizerInfo::legalizeIsAddrSpace ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B,
unsigned  AddrSpace 
) const

Definition at line 5378 of file AMDGPULegalizerInfo.cpp.

References B, getSegmentAperture(), llvm::CmpInst::ICMP_EQ, MI, MRI, and llvm::LLT::scalar().

Referenced by legalizeIntrinsic().

◆ legalizeITOFP()

bool AMDGPULegalizerInfo::legalizeITOFP ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B,
bool  Signed 
) const

Definition at line 2428 of file AMDGPULegalizerInfo.cpp.

References assert(), B, MI, MRI, llvm::LLT::scalar(), Signed, and X.

Referenced by legalizeCustom().

◆ legalizeKernargMemParameter()

bool AMDGPULegalizerInfo::legalizeKernargMemParameter ( MachineInstr &  MI,
MachineIRBuilder &  B,
uint64_t  Offset,
Align  Alignment = Align(4) 
) const

Legalize a value that's loaded from kernel arguments.

This is only used by legacy intrinsics.

Definition at line 4249 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::AMDGPUAS::CONSTANT_ADDRESS, getKernargParameterPtr(), MI, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::Offset, Ptr, and llvm::LLT::scalar().

Referenced by legalizeIntrinsic().

◆ legalizeLDSKernelId()

bool AMDGPULegalizerInfo::legalizeLDSKernelId ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 5360 of file AMDGPULegalizerInfo.cpp.

References B, getLDSKernelId(), llvm::AMDGPUMachineFunction::isEntryFunction(), llvm::AMDGPUFunctionArgInfo::LDS_KERNEL_ID, legalizePreloadedArgIntrin(), MI, and MRI.

◆ legalizeLoad()

bool AMDGPULegalizerInfo::legalizeLoad ( LegalizerHelper &  Helper,
MachineInstr &  MI 
) const

Definition at line 2937 of file AMDGPULegalizerInfo.cpp.

References B, castBufferRsrcFromV4I32(), llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::AMDGPUAS::CONSTANT_ADDRESS_32BIT, llvm::LLT::getAddressSpace(), llvm::MachineMemOperand::getAlign(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineMemOperand::getMemoryType(), llvm::LLT::getSizeInBits(), hasBufferRsrcWorkaround(), isRegisterType(), llvm::LLT::isVector(), MI, llvm::LegalizerHelper::MIRBuilder, MRI, llvm::LegalizerHelper::Observer, llvm::LLT::pointer(), llvm::PowerOf2Ceil(), shouldWidenLoad(), llvm::Align::value(), and widenToNextPowerOf2().

Referenced by legalizeCustom().

◆ legalizeMinNumMaxNum()

bool AMDGPULegalizerInfo::legalizeMinNumMaxNum ( LegalizerHelper &  Helper,
MachineInstr &  MI 
) const

Definition at line 2555 of file AMDGPULegalizerInfo.cpp.

References llvm::MachineFunction::getInfo(), llvm::MachineIRBuilder::getMF(), llvm::SIMachineFunctionInfo::getMode(), llvm::SIModeRegisterDefaults::IEEE, llvm::LegalizerHelper::Legalized, llvm::LegalizerHelper::lowerFMinNumMaxNum(), MI, and llvm::LegalizerHelper::MIRBuilder.

Referenced by legalizeCustom().

◆ legalizeMul()

bool AMDGPULegalizerInfo::legalizeMul ( LegalizerHelper &  Helper,
MachineInstr &  MI 
) const

Definition at line 3993 of file AMDGPULegalizerInfo.cpp.

References assert(), B, buildMultiply(), llvm::GCNSubtarget::getGeneration(), llvm::LLT::getSizeInBits(), llvm::AMDGPUSubtarget::GFX10, llvm::GCNSubtarget::hasFullRate64Ops(), llvm::GCNSubtarget::hasMad64_32(), llvm::LLT::isScalar(), MI, llvm::LegalizerHelper::MIRBuilder, MRI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::LLT::scalar(), and Size.

Referenced by legalizeCustom().

◆ legalizePointerAsRsrcIntrin()

bool AMDGPULegalizerInfo::legalizePointerAsRsrcIntrin ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

To create a buffer resource from a 64-bit pointer, mask off the upper 32 bits of the pointer and replace them with the stride argument, then merge_values everything together.

In the common case of a raw buffer (the stride component is 0), we can just AND off the upper half.

Definition at line 5292 of file AMDGPULegalizerInfo.cpp.

References B, llvm::getIConstantVRegValWithLookThrough(), llvm::MachineInstrBuilder::getReg(), MI, MRI, and llvm::LLT::scalar().

Referenced by legalizeIntrinsic().

◆ legalizePreloadedArgIntrin()

bool AMDGPULegalizerInfo::legalizePreloadedArgIntrin ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B,
AMDGPUFunctionArgInfo::PreloadedValue  ArgType 
) const

Definition at line 4174 of file AMDGPULegalizerInfo.cpp.

References B, loadInputValue(), and MI.

Referenced by legalizeImplicitArgPtr(), legalizeIntrinsic(), and legalizeLDSKernelId().

◆ legalizeRsqClampIntrinsic()

bool AMDGPULegalizerInfo::legalizeRsqClampIntrinsic ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 5195 of file AMDGPULegalizerInfo.cpp.

References B, llvm::GCNSubtarget::getGeneration(), llvm::APFloat::getLargest(), llvm::SIMachineFunctionInfo::getMode(), llvm::SIModeRegisterDefaults::IEEE, llvm::APFloatBase::IEEEdouble(), llvm::APFloatBase::IEEEsingle(), MI, MRI, llvm::LLT::scalar(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by legalizeIntrinsic().

◆ legalizeSBufferLoad()

bool AMDGPULegalizerInfo::legalizeSBufferLoad ( LegalizerHelper &  Helper,
MachineInstr &  MI 
) const

Definition at line 6415 of file AMDGPULegalizerInfo.cpp.

References B, llvm::LegalizerHelper::bitcastDst(), castBufferRsrcFromV4I32(), llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), getBitcastRegisterType(), llvm::MachineFunction::getMachineMemOperand(), getPow2ScalarType(), getPow2VectorType(), llvm::LLT::getSizeInBits(), hasBufferRsrcWorkaround(), llvm::isPowerOf2_32(), llvm::LLT::isVector(), MI, llvm::LegalizerHelper::MIRBuilder, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, llvm::LegalizerHelper::moreElementsVectorDst(), llvm::LegalizerHelper::Observer, llvm::LLT::scalar(), shouldBitcastLoadStoreType(), Size, and llvm::LegalizerHelper::widenScalarDst().

Referenced by legalizeIntrinsic().

◆ legalizeSignedDIV_REM()

bool AMDGPULegalizerInfo::legalizeSignedDIV_REM ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 4526 of file AMDGPULegalizerInfo.cpp.

References B, llvm::LLT::getSizeInBits(), legalizeUnsignedDIV_REM32Impl(), legalizeUnsignedDIV_REM64Impl(), LHS, llvm_unreachable, MI, MRI, RHS, and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeSinCos()

bool AMDGPULegalizerInfo::legalizeSinCos ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 2686 of file AMDGPULegalizerInfo.cpp.

References B, llvm::AMDGPUSubtarget::hasTrigReducedRange(), llvm::numbers::inv_pi, MI, and MRI.

Referenced by legalizeCustom().

◆ legalizeStackSave()

bool AMDGPULegalizerInfo::legalizeStackSave ( MachineInstr &  MI,
MachineIRBuilder &  B 
) const

Definition at line 6767 of file AMDGPULegalizerInfo.cpp.

References B, llvm::TargetLoweringBase::getStackPointerRegisterToSaveRestore(), llvm::GCNSubtarget::getTargetLowering(), and MI.

Referenced by legalizeCustom().

◆ legalizeStore()

bool AMDGPULegalizerInfo::legalizeStore ( LegalizerHelper &  Helper,
MachineInstr &  MI 
) const

Definition at line 3026 of file AMDGPULegalizerInfo.cpp.

References B, castBufferRsrcArgToV4I32(), llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), hasBufferRsrcWorkaround(), MI, llvm::LegalizerHelper::MIRBuilder, MRI, and llvm::LegalizerHelper::Observer.

Referenced by legalizeCustom().

◆ legalizeTrapEndpgm()

bool AMDGPULegalizerInfo::legalizeTrapEndpgm ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 6481 of file AMDGPULegalizerInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), llvm::MachineBasicBlock::addSuccessor(), B, llvm::BuildMI(), llvm::MachineFunction::CreateMachineBasicBlock(), DL, llvm::MachineBasicBlock::end(), llvm::MachineBasicBlock::getParent(), MI, llvm::MachineFunction::push_back(), llvm::MachineBasicBlock::splitAt(), and llvm::MachineBasicBlock::succ_empty().

Referenced by legalizeTrapIntrinsic().

◆ legalizeTrapHsa()

bool AMDGPULegalizerInfo::legalizeTrapHsa ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 6570 of file AMDGPULegalizerInfo.cpp.

References B, llvm::GCNSubtarget::LLVMAMDHSATrap, and MI.

Referenced by legalizeTrapIntrinsic().

◆ legalizeTrapHsaQueuePtr()

bool AMDGPULegalizerInfo::legalizeTrapHsaQueuePtr ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 6510 of file AMDGPULegalizerInfo.cpp.

References llvm::AMDGPU::AMDHSA_COV5, B, llvm::commonAlignment(), llvm::AMDGPUAS::CONSTANT_ADDRESS, llvm::AMDGPU::getCodeObjectVersion(), llvm::MachineFunction::getFunction(), llvm::AMDGPUTargetLowering::getImplicitParameterOffset(), llvm::MachineFunction::getMachineMemOperand(), llvm::GlobalValue::getParent(), llvm::GCNSubtarget::getTargetLowering(), llvm::RegState::Implicit, llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, llvm::GCNSubtarget::LLVMAMDHSATrap, loadInputValue(), MI, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, MRI, llvm::Offset, llvm::LLT::pointer(), llvm::AMDGPUFunctionArgInfo::QUEUE_PTR, llvm::AMDGPUTargetLowering::QUEUE_PTR, and llvm::LLT::scalar().

Referenced by legalizeTrapIntrinsic().

◆ legalizeTrapIntrinsic()

bool AMDGPULegalizerInfo::legalizeTrapIntrinsic ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 6470 of file AMDGPULegalizerInfo.cpp.

References llvm::GCNSubtarget::AMDHSA, B, llvm::GCNSubtarget::getTrapHandlerAbi(), llvm::GCNSubtarget::isTrapHandlerEnabled(), legalizeTrapEndpgm(), legalizeTrapHsa(), legalizeTrapHsaQueuePtr(), MI, MRI, and llvm::GCNSubtarget::supportsGetDoorbellID().

Referenced by legalizeIntrinsic().

◆ legalizeUnsignedDIV_REM()

bool AMDGPULegalizerInfo::legalizeUnsignedDIV_REM ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B 
) const

Definition at line 4486 of file AMDGPULegalizerInfo.cpp.

References B, legalizeUnsignedDIV_REM32Impl(), legalizeUnsignedDIV_REM64Impl(), llvm_unreachable, MI, MRI, and llvm::LLT::scalar().

Referenced by legalizeCustom().

◆ legalizeUnsignedDIV_REM32Impl()

void AMDGPULegalizerInfo::legalizeUnsignedDIV_REM32Impl ( MachineIRBuilder &  B,
Register  DstDivReg,
Register  DstRemReg,
Register  Num,
Register  Den 
) const

Definition at line 4286 of file AMDGPULegalizerInfo.cpp.

References B, Cond, llvm::CmpInst::ICMP_UGE, llvm::LLT::scalar(), X, and Y.

Referenced by legalizeSignedDIV_REM(), and legalizeUnsignedDIV_REM().

◆ legalizeUnsignedDIV_REM64Impl()

void AMDGPULegalizerInfo::legalizeUnsignedDIV_REM64Impl ( MachineIRBuilder &  B,
Register  DstDivReg,
Register  DstRemReg,
Register  Num,
Register  Den 
) const

Definition at line 4374 of file AMDGPULegalizerInfo.cpp.

References B, emitReciprocalU64(), llvm::CmpInst::ICMP_EQ, llvm::CmpInst::ICMP_NE, llvm::CmpInst::ICMP_UGE, and llvm::LLT::scalar().

Referenced by legalizeSignedDIV_REM(), and legalizeUnsignedDIV_REM().

◆ legalizeWorkitemIDIntrinsic()

bool AMDGPULegalizerInfo::legalizeWorkitemIDIntrinsic ( MachineInstr &  MI,
MachineRegisterInfo &  MRI,
MachineIRBuilder &  B,
unsigned  Dim,
AMDGPUFunctionArgInfo::PreloadedValue  ArgType 
) const

Definition at line 4191 of file AMDGPULegalizerInfo.cpp.

References B, llvm::bit_width(), llvm::AMDGPUSubtarget::getMaxWorkitemID(), llvm::SIMachineFunctionInfo::getPreloadedValue(), loadInputValue(), llvm::CallingConv::MaxID, MI, MRI, replaceWithConstant(), and llvm::LLT::scalar().

Referenced by legalizeIntrinsic().

◆ loadInputValue() [1/2]

bool AMDGPULegalizerInfo::loadInputValue ( Register  DstReg,
MachineIRBuilder &  B,
AMDGPUFunctionArgInfo::PreloadedValue  ArgType 
) const

Definition at line 4146 of file AMDGPULegalizerInfo.cpp.

References B, llvm::SIMachineFunctionInfo::getPreloadedValue(), llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, and loadInputValue().

◆ loadInputValue() [2/2]

bool AMDGPULegalizerInfo::loadInputValue ( Register  DstReg,
MachineIRBuilder &  B,
const ArgDescriptor *  Arg,
const TargetRegisterClass *  ArgRC,
LLT  ArgTy 
) const

Definition at line 4113 of file AMDGPULegalizerInfo.cpp.

References assert(), B, llvm::getFunctionLiveInPhysReg(), llvm::ArgDescriptor::getMask(), llvm::ArgDescriptor::getRegister(), llvm::ArgDescriptor::isMasked(), llvm::Register::isPhysicalRegister(), llvm::Register::isVirtual(), and llvm::LLT::scalar().

Referenced by getImplicitArgPtr(), getKernargParameterPtr(), getSegmentAperture(), legalizePreloadedArgIntrin(), legalizeTrapHsaQueuePtr(), legalizeWorkitemIDIntrinsic(), and loadInputValue().

◆ splitBufferOffsets()

std::pair< Register, unsigned > AMDGPULegalizerInfo::splitBufferOffsets ( MachineIRBuilder &  B,
Register  OrigOffset 
) const

Definition at line 5398 of file AMDGPULegalizerInfo.cpp.

References B, llvm::AMDGPU::getBaseWithConstantOffset(), llvm::SIInstrInfo::getMaxMUBUFImmOffset(), MRI, and llvm::LLT::scalar().

Referenced by legalizeBufferAtomic(), legalizeBufferLoad(), and legalizeBufferStore().

The documentation for this class was generated from the following files:
Generated on Tue Dec 5 2023 00:55:17 for LLVM by doxygen 1.9.6