28using namespace LegalizeActions;
30#define DEBUG_TYPE "legalizer-info"
33 "disable-gisel-legality-check",
34 cl::desc(
"Don't verify that MIR is fully legal between GlobalISel passes"),
49 OS <<
"FewerElements";
73 OS <<
"UseLegacyRules";
80 OS <<
"Opcode=" <<
Opcode <<
", Tys={";
86 OS << MMODescr.MemoryTy <<
", ";
96 const std::pair<unsigned, LLT> &
Mutation) {
114 std::pair<unsigned, LLT>
Mutation) {
124 const unsigned TypeIdx =
Mutation.first;
191 LLVM_DEBUG(
dbgs() <<
".. fallback to legacy rules (no rules defined)\n");
192 return {LegalizeAction::UseLegacyRules, 0,
LLT{}};
195 if (Rule.match(Query)) {
197 std::pair<unsigned, LLT>
Mutation = Rule.determineMutation(Query);
201 "legality mutation invalid for match");
208 return {LegalizeAction::Unsupported, 0,
LLT{}};
215 dbgs() <<
".. type index coverage check SKIPPED: no rules defined\n");
219 if (FirstUncovered < 0) {
221 " user-defined predicate detected\n");
224 const bool AllCovered = (FirstUncovered >= NumTypeIdxs);
226 LLVM_DEBUG(
dbgs() <<
".. the first uncovered type index: " << FirstUncovered
227 <<
", " << (AllCovered ?
"OK" :
"FAIL") <<
"\n");
238 dbgs() <<
".. imm index coverage check SKIPPED: no rules defined\n");
242 if (FirstUncovered < 0) {
244 " user-defined predicate detected\n");
247 const bool AllCovered = (FirstUncovered >= NumImmIdxs);
248 LLVM_DEBUG(
dbgs() <<
".. the first uncovered imm index: " << FirstUncovered
249 <<
", " << (AllCovered ?
"OK" :
"FAIL") <<
"\n");
260 assert(TypeIdx <
MI.getNumOperands() &&
"Unexpected TypeIdx");
264 if (
MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES && TypeIdx == 1)
265 return MRI.getType(
MI.getOperand(
MI.getNumOperands() - 1).getReg());
266 return MRI.getType(
MI.getOperand(OpIdx).getReg());
270 assert(Opcode >= FirstOp && Opcode <= LastOp &&
"Unsupported opcode");
271 return Opcode - FirstOp;
276 if (
unsigned Alias = RulesForOpcode[OpcodeIdx].getAlias()) {
277 LLVM_DEBUG(
dbgs() <<
".. opcode " << Opcode <<
" is aliased to " << Alias
280 assert(RulesForOpcode[OpcodeIdx].getAlias() == 0 &&
"Cannot chain aliases");
289 return RulesForOpcode[OpcodeIdx];
294 auto &Result = RulesForOpcode[OpcodeIdx];
295 assert(!Result.isAliasedByAnother() &&
"Modifying this opcode will modify aliases");
300 std::initializer_list<unsigned> Opcodes) {
301 unsigned Representative = *Opcodes.begin();
303 assert(Opcodes.size() >= 2 &&
304 "Initializer list must have at least two opcodes");
310 Return.setIsAliasedByAnother();
315 unsigned OpcodeFrom) {
316 assert(OpcodeTo != OpcodeFrom &&
"Cannot alias to self");
317 assert(OpcodeTo >= FirstOp && OpcodeTo <= LastOp &&
"Unsupported opcode");
319 RulesForOpcode[OpcodeFromIdx].
aliasTo(OpcodeTo);
325 if (Step.
Action != LegalizeAction::UseLegacyRules) {
339 for (
unsigned i = 0; i <
MI.getDesc().getNumOperands(); ++i) {
340 if (!OpInfo[i].isGenericType())
345 unsigned TypeIdx = OpInfo[i].getGenericTypeIndex();
346 if (SeenTypes[TypeIdx])
349 SeenTypes.
set(TypeIdx);
356 for (
const auto &MMO :
MI.memoperands())
359 return getAction({
MI.getOpcode(), Types, MemDescrs});
376 return SmallTy.
isByteSized() ? TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT;
382 std::vector<unsigned> FailedOpcodes;
383 for (
unsigned Opcode = FirstOp; Opcode <= LastOp; ++Opcode) {
385 const unsigned NumTypeIdxs = std::accumulate(
388 return OpInfo.isGenericType()
389 ? std::max(OpInfo.getGenericTypeIndex() + 1U, Acc)
392 const unsigned NumImmIdxs = std::accumulate(
395 return OpInfo.isGenericImm()
396 ? std::max(OpInfo.getGenericImmIndex() + 1U, Acc)
400 <<
"): " << NumTypeIdxs <<
" type ind"
401 << (NumTypeIdxs == 1 ?
"ex" :
"ices") <<
", "
402 << NumImmIdxs <<
" imm ind"
403 << (NumImmIdxs == 1 ?
"ex" :
"ices") <<
"\n");
406 FailedOpcodes.push_back(Opcode);
408 FailedOpcodes.push_back(Opcode);
410 if (!FailedOpcodes.empty()) {
411 errs() <<
"The following opcodes have ill-defined legalization rules:";
412 for (
unsigned Opcode : FailedOpcodes)
417 ", try -debug-only=legalizer-info for details");
434 !MLI->isLegalOrCustom(
MI,
MRI))
unsigned const MachineRegisterInfo * MRI
static bool hasNoSimpleLoops(const LegalizeRule &Rule, const LegalityQuery &Q, const std::pair< unsigned, LLT > &Mutation)
static LLT getTypeFromTypeIdx(const MachineInstr &MI, const MachineRegisterInfo &MRI, unsigned OpIdx, unsigned TypeIdx)
Helper function to get LLT for the given type index.
static bool mutationIsSane(const LegalizeRule &Rule, const LegalityQuery &Q, std::pair< unsigned, LLT > Mutation)
Interface for Targets to specify which operations they can successfully select and how the others sho...
Implement a low-level type suitable for MachineInstr level instruction selection.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file implements the SmallBitVector class.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
This class represents an Operation in the Expression.
static constexpr ElementCount getFixed(ScalarTy MinVal)
constexpr unsigned getScalarSizeInBits() const
constexpr bool isVector() const
constexpr bool isByteSized() const
constexpr TypeSize getSizeInBits() const
Returns the total size of the type. Must only be called on sized types.
constexpr ElementCount getElementCount() const
constexpr LLT getScalarType() const
LegacyLegalizeActionStep getAction(const LegalityQuery &Query) const
void aliasTo(unsigned Opcode)
bool verifyImmIdxsCoverage(unsigned NumImmIdxs) const
Check if there is no imm index which is obviously not handled by the LegalizeRuleSet in any way at al...
bool verifyTypeIdxsCoverage(unsigned NumTypeIdxs) const
Check if there is no type index which is obviously not handled by the LegalizeRuleSet in any way at a...
LegalizeActionStep apply(const LegalityQuery &Query) const
Apply the ruleset to the given LegalityQuery.
A single rule in a legalizer info ruleset.
LegalizeAction getAction() const
const LegalizeRuleSet & getActionDefinitions(unsigned Opcode) const
Get the action definitions for the given opcode.
LegalizeRuleSet & getActionDefinitionsBuilder(unsigned Opcode)
Get the action definition builder for the given opcode.
const LegacyLegalizerInfo & getLegacyLegalizerInfo() const
virtual unsigned getExtOpcodeForWideningConstant(LLT SmallTy) const
Return the opcode (SEXT/ZEXT/ANYEXT) that should be performed while widening a constant of type Small...
bool isLegalOrCustom(const LegalityQuery &Query) const
void aliasActionDefinitions(unsigned OpcodeTo, unsigned OpcodeFrom)
void verify(const MCInstrInfo &MII) const
Perform simple self-diagnostic and assert if there is anything obviously wrong with the actions set u...
unsigned getOpcodeIdxForOpcode(unsigned Opcode) const
bool isLegal(const LegalityQuery &Query) const
unsigned getActionDefinitionsIdx(unsigned Opcode) const
LegalizeActionStep getAction(const LegalityQuery &Query) const
Determine what action should be taken to legalize the described instruction.
Describe properties that are true of each instruction in the target description file.
ArrayRef< MCOperandInfo > operands() const
Interface to description of machine instruction set.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode.
StringRef getName(unsigned Opcode) const
Returns the name for the instructions with the given opcode.
This holds information about one operand of a machine instruction, indicating the register class for ...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Representation of each machine instruction.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
int find_first_unset() const
Returns the index of the first unset bit, -1 if all of the bits are set.
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
virtual const LegalizerInfo * getLegalizerInfo() const
The instances of the Type class are immutable: once they are created, they are never changed.
static constexpr bool isKnownLE(const FixedOrScalableQuantity &LHS, const FixedOrScalableQuantity &RHS)
static constexpr bool isKnownGE(const FixedOrScalableQuantity &LHS, const FixedOrScalableQuantity &RHS)
This class implements an extremely fast bulk output stream that can only output to a stream.
@ FewerElements
The (vector) operation should be implemented by splitting it into sub-vectors where the operation is ...
@ Libcall
The operation should be implemented as a call to some kind of runtime support library.
@ Unsupported
This operation is completely unsupported on the target.
@ Lower
The operation itself must be expressed in terms of simpler actions on this target.
@ UseLegacyRules
Fall back onto the old rules.
@ WidenScalar
The operation should be implemented in terms of a wider scalar base-type.
@ Bitcast
Perform the operation on a different, but equivalently sized type.
@ NarrowScalar
The operation should be synthesized from multiple instructions acting on a narrower scalar base-type.
@ Custom
The target wants to do something special with this combination of operand and type.
@ NotFound
Sentinel value for when no action was found in the specified table.
@ MoreElements
The (vector) operation should be implemented by widening the input vector and ignoring the lanes adde...
This is an optimization pass for GlobalISel generic memory operations.
auto drop_begin(T &&RangeOrContainer, size_t N=1)
Return a range covering RangeOrContainer with the first N elements excluded.
bool isPreISelGenericOpcode(unsigned Opcode)
Check whether the given Opcode is a generic opcode that is not supposed to appear after ISel.
cl::opt< bool > DisableGISelLegalityCheck
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
const MachineInstr * machineFunctionIsIllegal(const MachineFunction &MF)
Checks that MIR is fully legal, returns an illegal instruction if it's not, nullptr otherwise.
raw_fd_ostream & errs()
This returns a reference to a raw_ostream for standard error.
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
The LegalityQuery object bundles together all the information that's needed to decide whether a given...
ArrayRef< MemDesc > MMODescrs
Operations which require memory can use this to place requirements on the memory type for each MMO.
raw_ostream & print(raw_ostream &OS) const
LegalizeAction Action
The action to take or the final answer.