LLVM  12.0.0git
llvm::ConvergingVLIWScheduler Member List

This is the complete list of members for llvm::ConvergingVLIWScheduler, including all inherited members.

BotQID enum valuellvm::ConvergingVLIWScheduler
ConvergingVLIWScheduler()llvm::ConvergingVLIWSchedulerinline
doMBBSchedRegionsTopDown() constllvm::MachineSchedStrategyinlinevirtual
dumpPolicy() constllvm::MachineSchedStrategyinlinevirtual
enterMBB(MachineBasicBlock *MBB)llvm::MachineSchedStrategyinlinevirtual
initialize(ScheduleDAGMI *dag) overridellvm::ConvergingVLIWSchedulervirtual
initPolicy(MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs)llvm::MachineSchedStrategyinlinevirtual
leaveMBB()llvm::MachineSchedStrategyinlinevirtual
LogMaxQID enum valuellvm::ConvergingVLIWScheduler
pickNode(bool &IsTopNode) overridellvm::ConvergingVLIWSchedulervirtual
pickNodeBidrectional(bool &IsTopNode)llvm::ConvergingVLIWSchedulerprotected
pickNodeFromQueue(VLIWSchedBoundary &Zone, const RegPressureTracker &RPTracker, SchedCandidate &Candidate)llvm::ConvergingVLIWSchedulerprotected
pressureChange(const SUnit *SU, bool isBotUp)llvm::ConvergingVLIWSchedulerprotected
readyQueueVerboseDump(const RegPressureTracker &RPTracker, SchedCandidate &Candidate, ReadyQueue &Q)llvm::ConvergingVLIWSchedulerprotected
registerRoots()llvm::MachineSchedStrategyinlinevirtual
releaseBottomNode(SUnit *SU) overridellvm::ConvergingVLIWSchedulervirtual
releaseTopNode(SUnit *SU) overridellvm::ConvergingVLIWSchedulervirtual
reportPackets()llvm::ConvergingVLIWSchedulerinline
schedNode(SUnit *SU, bool IsTopNode) overridellvm::ConvergingVLIWSchedulervirtual
scheduleTree(unsigned SubtreeID)llvm::MachineSchedStrategyinlinevirtual
SchedulingCost(ReadyQueue &Q, SUnit *SU, SchedCandidate &Candidate, RegPressureDelta &Delta, bool verbose)llvm::ConvergingVLIWSchedulerprotected
shouldTrackLaneMasks() constllvm::MachineSchedStrategyinlinevirtual
shouldTrackPressure() constllvm::MachineSchedStrategyinlinevirtual
TopQID enum valuellvm::ConvergingVLIWScheduler
traceCandidate(const char *Label, const ReadyQueue &Q, SUnit *SU, int Cost, PressureChange P=PressureChange())llvm::ConvergingVLIWSchedulerprotected
~MachineSchedStrategy()=defaultllvm::MachineSchedStrategyvirtual