LLVM 20.0.0git
llvm::MCSubtargetInfo Member List

This is the complete list of members for llvm::MCSubtargetInfo, including all inherited members.

ApplyFeatureFlag(StringRef FS)llvm::MCSubtargetInfo
checkFeatures(StringRef FS) constllvm::MCSubtargetInfo
ClearFeatureBitsTransitively(const FeatureBitset &FB)llvm::MCSubtargetInfo
enableWritePrefetching() constllvm::MCSubtargetInfovirtual
getAllProcessorDescriptions() constllvm::MCSubtargetInfoinline
getAllProcessorFeatures() constllvm::MCSubtargetInfoinline
getCacheAssociativity(unsigned Level) constllvm::MCSubtargetInfovirtual
getCacheLineSize(unsigned Level) constllvm::MCSubtargetInfovirtual
getCacheLineSize() constllvm::MCSubtargetInfoinlinevirtual
getCacheSize(unsigned Level) constllvm::MCSubtargetInfovirtual
getCPU() constllvm::MCSubtargetInfoinline
getEnabledProcessorFeatures() constllvm::MCSubtargetInfo
getFeatureBits() constllvm::MCSubtargetInfoinline
getFeatureString() constllvm::MCSubtargetInfoinline
getHwMode(enum HwModeType type=HwMode_Default) constllvm::MCSubtargetInfoinlinevirtual
getHwModeSet() constllvm::MCSubtargetInfoinlinevirtual
getInstrItineraryForCPU(StringRef CPU) constllvm::MCSubtargetInfo
getMaxPrefetchIterationsAhead() constllvm::MCSubtargetInfovirtual
getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) constllvm::MCSubtargetInfovirtual
getPrefetchDistance() constllvm::MCSubtargetInfovirtual
getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, unsigned WriteResID) constllvm::MCSubtargetInfoinline
getReadAdvanceEntries(const MCSchedClassDesc &SC) constllvm::MCSubtargetInfoinline
getSchedModel() constllvm::MCSubtargetInfoinline
getSchedModelForCPU(StringRef CPU) constllvm::MCSubtargetInfo
getTargetTriple() constllvm::MCSubtargetInfoinline
getTuneCPU() constllvm::MCSubtargetInfoinline
getWriteLatencyEntry(const MCSchedClassDesc *SC, unsigned DefIdx) constllvm::MCSubtargetInfoinline
getWriteProcResBegin(const MCSchedClassDesc *SC) constllvm::MCSubtargetInfoinline
getWriteProcResEnd(const MCSchedClassDesc *SC) constllvm::MCSubtargetInfoinline
hasFeature(unsigned Feature) constllvm::MCSubtargetInfoinline
HwMode_Default enum valuellvm::MCSubtargetInfo
HwMode_EncodingInfo enum valuellvm::MCSubtargetInfo
HwMode_RegInfo enum valuellvm::MCSubtargetInfo
HwMode_ValueType enum valuellvm::MCSubtargetInfo
HwModeType enum namellvm::MCSubtargetInfo
initInstrItins(InstrItineraryData &InstrItins) constllvm::MCSubtargetInfo
InitMCProcessorInfo(StringRef CPU, StringRef TuneCPU, StringRef FS)llvm::MCSubtargetInfoprotected
isCPUStringValid(StringRef CPU) constllvm::MCSubtargetInfoinlinevirtual
MCSubtargetInfo(const MCSubtargetInfo &)=defaultllvm::MCSubtargetInfo
MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, ArrayRef< SubtargetFeatureKV > PF, ArrayRef< SubtargetSubTypeKV > PD, const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC, const unsigned *FP)llvm::MCSubtargetInfo
MCSubtargetInfo()=deletellvm::MCSubtargetInfo
operator=(const MCSubtargetInfo &)=deletellvm::MCSubtargetInfo
operator=(MCSubtargetInfo &&)=deletellvm::MCSubtargetInfo
resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) constllvm::MCSubtargetInfoinlinevirtual
setDefaultFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS)llvm::MCSubtargetInfo
setFeatureBits(const FeatureBitset &FeatureBits_)llvm::MCSubtargetInfoinline
SetFeatureBitsTransitively(const FeatureBitset &FB)llvm::MCSubtargetInfo
shouldPrefetchAddressSpace(unsigned AS) constllvm::MCSubtargetInfovirtual
ToggleFeature(uint64_t FB)llvm::MCSubtargetInfo
ToggleFeature(const FeatureBitset &FB)llvm::MCSubtargetInfo
ToggleFeature(StringRef FS)llvm::MCSubtargetInfo
~MCSubtargetInfo()=defaultllvm::MCSubtargetInfovirtual