| addTargetFlag(unsigned F) | llvm::MachineOperand | inline |
| ChangeToBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0) | llvm::MachineOperand | |
| ChangeToDbgInstrRef(unsigned InstrIdx, unsigned OpIdx, unsigned TargetFlags=0) | llvm::MachineOperand | |
| ChangeToES(const char *SymName, unsigned TargetFlags=0) | llvm::MachineOperand | |
| ChangeToFPImmediate(const ConstantFP *FPImm, unsigned TargetFlags=0) | llvm::MachineOperand | |
| ChangeToFrameIndex(int Idx, unsigned TargetFlags=0) | llvm::MachineOperand | |
| ChangeToGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0) | llvm::MachineOperand | |
| ChangeToImmediate(int64_t ImmVal, unsigned TargetFlags=0) | llvm::MachineOperand | |
| ChangeToMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0) | llvm::MachineOperand | |
| ChangeToRegister(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isDebug=false) | llvm::MachineOperand | |
| ChangeToTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0) | llvm::MachineOperand | |
| clearParent() | llvm::MachineOperand | inline |
| clobbersPhysReg(const uint32_t *RegMask, MCRegister PhysReg) | llvm::MachineOperand | inlinestatic |
| clobbersPhysReg(MCRegister PhysReg) const | llvm::MachineOperand | inline |
| CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0) | llvm::MachineOperand | inlinestatic |
| CreateCFIIndex(unsigned CFIIndex) | llvm::MachineOperand | inlinestatic |
| CreateCImm(const ConstantInt *CI) | llvm::MachineOperand | inlinestatic |
| CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0) | llvm::MachineOperand | inlinestatic |
| CreateDbgInstrRef(unsigned InstrIdx, unsigned OpIdx) | llvm::MachineOperand | inlinestatic |
| CreateES(const char *SymName, unsigned TargetFlags=0) | llvm::MachineOperand | inlinestatic |
| CreateFI(int Idx) | llvm::MachineOperand | inlinestatic |
| CreateFPImm(const ConstantFP *CFP) | llvm::MachineOperand | inlinestatic |
| CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0) | llvm::MachineOperand | inlinestatic |
| CreateImm(int64_t Val) | llvm::MachineOperand | inlinestatic |
| CreateIntrinsicID(Intrinsic::ID ID) | llvm::MachineOperand | inlinestatic |
| CreateJTI(unsigned Idx, unsigned TargetFlags=0) | llvm::MachineOperand | inlinestatic |
| CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) | llvm::MachineOperand | inlinestatic |
| CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0) | llvm::MachineOperand | inlinestatic |
| CreateMetadata(const MDNode *Meta) | llvm::MachineOperand | inlinestatic |
| CreatePredicate(unsigned Pred) | llvm::MachineOperand | inlinestatic |
| CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false) | llvm::MachineOperand | inlinestatic |
| CreateRegLiveOut(const uint32_t *Mask) | llvm::MachineOperand | inlinestatic |
| CreateRegMask(const uint32_t *Mask) | llvm::MachineOperand | inlinestatic |
| CreateShuffleMask(ArrayRef< int > Mask) | llvm::MachineOperand | inlinestatic |
| CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0) | llvm::MachineOperand | inlinestatic |
| DenseMapInfo< MachineOperand > | llvm::MachineOperand | friend |
| dump() const | llvm::MachineOperand | |
| getBlockAddress() const | llvm::MachineOperand | inline |
| getCFIIndex() const | llvm::MachineOperand | inline |
| getCImm() const | llvm::MachineOperand | inline |
| getFPImm() const | llvm::MachineOperand | inline |
| getGlobal() const | llvm::MachineOperand | inline |
| getImm() const | llvm::MachineOperand | inline |
| getIndex() const | llvm::MachineOperand | inline |
| getInstrRefInstrIndex() const | llvm::MachineOperand | inline |
| getInstrRefOpIndex() const | llvm::MachineOperand | inline |
| getIntrinsicID() const | llvm::MachineOperand | inline |
| getMBB() const | llvm::MachineOperand | inline |
| getMCSymbol() const | llvm::MachineOperand | inline |
| getMetadata() const | llvm::MachineOperand | inline |
| getOffset() const | llvm::MachineOperand | inline |
| getOperandNo() const | llvm::MachineOperand | |
| getParent() | llvm::MachineOperand | inline |
| getParent() const | llvm::MachineOperand | inline |
| getPredicate() const | llvm::MachineOperand | inline |
| getReg() const | llvm::MachineOperand | inline |
| getRegLiveOut() const | llvm::MachineOperand | inline |
| getRegMask() const | llvm::MachineOperand | inline |
| getRegMaskSize(unsigned NumRegs) | llvm::MachineOperand | inlinestatic |
| getShuffleMask() const | llvm::MachineOperand | inline |
| getSubReg() const | llvm::MachineOperand | inline |
| getSymbolName() const | llvm::MachineOperand | inline |
| getTargetFlags() const | llvm::MachineOperand | inline |
| getTargetIndexName() const | llvm::MachineOperand | |
| getType() const | llvm::MachineOperand | inline |
| hash_value | llvm::MachineOperand | friend |
| isBlockAddress() const | llvm::MachineOperand | inline |
| isCFIIndex() const | llvm::MachineOperand | inline |
| isCImm() const | llvm::MachineOperand | inline |
| isCPI() const | llvm::MachineOperand | inline |
| isDbgInstrRef() const | llvm::MachineOperand | inline |
| isDead() const | llvm::MachineOperand | inline |
| isDebug() const | llvm::MachineOperand | inline |
| isDef() const | llvm::MachineOperand | inline |
| isEarlyClobber() const | llvm::MachineOperand | inline |
| isFI() const | llvm::MachineOperand | inline |
| isFPImm() const | llvm::MachineOperand | inline |
| isGlobal() const | llvm::MachineOperand | inline |
| isIdenticalTo(const MachineOperand &Other) const | llvm::MachineOperand | |
| isImm() const | llvm::MachineOperand | inline |
| isImplicit() const | llvm::MachineOperand | inline |
| isInternalRead() const | llvm::MachineOperand | inline |
| isIntrinsicID() const | llvm::MachineOperand | inline |
| isJTI() const | llvm::MachineOperand | inline |
| isKill() const | llvm::MachineOperand | inline |
| isMBB() const | llvm::MachineOperand | inline |
| isMCSymbol() const | llvm::MachineOperand | inline |
| isMetadata() const | llvm::MachineOperand | inline |
| isPredicate() const | llvm::MachineOperand | inline |
| isReg() const | llvm::MachineOperand | inline |
| isRegLiveOut() const | llvm::MachineOperand | inline |
| isRegMask() const | llvm::MachineOperand | inline |
| isRenamable() const | llvm::MachineOperand | |
| isShuffleMask() const | llvm::MachineOperand | inline |
| isSymbol() const | llvm::MachineOperand | inline |
| isTargetIndex() const | llvm::MachineOperand | inline |
| isTied() const | llvm::MachineOperand | inline |
| isUndef() const | llvm::MachineOperand | inline |
| isUse() const | llvm::MachineOperand | inline |
| isValidExcessOperand() const | llvm::MachineOperand | inline |
| MachineInstr | llvm::MachineOperand | friend |
| MachineOperandType enum name | llvm::MachineOperand | |
| MachineRegisterInfo | llvm::MachineOperand | friend |
| MO_BlockAddress enum value | llvm::MachineOperand | |
| MO_CFIIndex enum value | llvm::MachineOperand | |
| MO_CImmediate enum value | llvm::MachineOperand | |
| MO_ConstantPoolIndex enum value | llvm::MachineOperand | |
| MO_DbgInstrRef enum value | llvm::MachineOperand | |
| MO_ExternalSymbol enum value | llvm::MachineOperand | |
| MO_FPImmediate enum value | llvm::MachineOperand | |
| MO_FrameIndex enum value | llvm::MachineOperand | |
| MO_GlobalAddress enum value | llvm::MachineOperand | |
| MO_Immediate enum value | llvm::MachineOperand | |
| MO_IntrinsicID enum value | llvm::MachineOperand | |
| MO_JumpTableIndex enum value | llvm::MachineOperand | |
| MO_Last enum value | llvm::MachineOperand | |
| MO_MachineBasicBlock enum value | llvm::MachineOperand | |
| MO_MCSymbol enum value | llvm::MachineOperand | |
| MO_Metadata enum value | llvm::MachineOperand | |
| MO_Predicate enum value | llvm::MachineOperand | |
| MO_Register enum value | llvm::MachineOperand | |
| MO_RegisterLiveOut enum value | llvm::MachineOperand | |
| MO_RegisterMask enum value | llvm::MachineOperand | |
| MO_ShuffleMask enum value | llvm::MachineOperand | |
| MO_TargetIndex enum value | llvm::MachineOperand | |
| OffsetLo | llvm::MachineOperand | |
| print(raw_ostream &os, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const | llvm::MachineOperand | |
| print(raw_ostream &os, ModuleSlotTracker &MST, LLT TypeToPrint, std::optional< unsigned > OpIdx, bool PrintDef, bool IsStandalone, bool ShouldPrintRegisterTies, unsigned TiedOperandIdx, const TargetRegisterInfo *TRI, const TargetIntrinsicInfo *IntrinsicInfo) const | llvm::MachineOperand | |
| print(raw_ostream &os, LLT TypeToPrint, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const | llvm::MachineOperand | |
| printIRSlotNumber(raw_ostream &OS, int Slot) | llvm::MachineOperand | static |
| printOperandOffset(raw_ostream &OS, int64_t Offset) | llvm::MachineOperand | static |
| printStackObjectReference(raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name) | llvm::MachineOperand | static |
| printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI) | llvm::MachineOperand | static |
| printSymbol(raw_ostream &OS, MCSymbol &Sym) | llvm::MachineOperand | static |
| printTargetFlags(raw_ostream &OS, const MachineOperand &Op) | llvm::MachineOperand | static |
| readsReg() const | llvm::MachineOperand | inline |
| RegNo | llvm::MachineOperand | |
| setCImm(const ConstantInt *CI) | llvm::MachineOperand | inline |
| setFPImm(const ConstantFP *CFP) | llvm::MachineOperand | inline |
| setImm(int64_t immVal) | llvm::MachineOperand | inline |
| setImplicit(bool Val=true) | llvm::MachineOperand | inline |
| setIndex(int Idx) | llvm::MachineOperand | inline |
| setInstrRefInstrIndex(unsigned InstrIdx) | llvm::MachineOperand | inline |
| setInstrRefOpIndex(unsigned OpIdx) | llvm::MachineOperand | inline |
| setIntrinsicID(Intrinsic::ID IID) | llvm::MachineOperand | inline |
| setIsDead(bool Val=true) | llvm::MachineOperand | inline |
| setIsDebug(bool Val=true) | llvm::MachineOperand | inline |
| setIsDef(bool Val=true) | llvm::MachineOperand | |
| setIsEarlyClobber(bool Val=true) | llvm::MachineOperand | inline |
| setIsInternalRead(bool Val=true) | llvm::MachineOperand | inline |
| setIsKill(bool Val=true) | llvm::MachineOperand | inline |
| setIsRenamable(bool Val=true) | llvm::MachineOperand | |
| setIsUndef(bool Val=true) | llvm::MachineOperand | inline |
| setIsUse(bool Val=true) | llvm::MachineOperand | inline |
| setMBB(MachineBasicBlock *MBB) | llvm::MachineOperand | inline |
| setMetadata(const MDNode *MD) | llvm::MachineOperand | inline |
| setOffset(int64_t Offset) | llvm::MachineOperand | inline |
| setPredicate(unsigned Predicate) | llvm::MachineOperand | inline |
| setReg(Register Reg) | llvm::MachineOperand | |
| setRegMask(const uint32_t *RegMaskPtr) | llvm::MachineOperand | inline |
| setSubReg(unsigned subReg) | llvm::MachineOperand | inline |
| setTargetFlags(unsigned F) | llvm::MachineOperand | inline |
| substPhysReg(MCRegister Reg, const TargetRegisterInfo &) | llvm::MachineOperand | |
| substVirtReg(Register Reg, unsigned SubIdx, const TargetRegisterInfo &) | llvm::MachineOperand | |
