LLVM 22.0.0git
llvm::SparcInstrInfo Member List

This is the complete list of members for llvm::SparcInstrInfo, including all inherited members.

analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const overridellvm::SparcInstrInfo
analyzeCompare(const MachineInstr &MI, Register &SrcReg, Register &SrcReg2, int64_t &CmpMask, int64_t &CmpValue) const overridellvm::SparcInstrInfo
copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, Register DestReg, Register SrcReg, bool KillSrc, bool RenamableDest=false, bool RenamableSrc=false) const overridellvm::SparcInstrInfo
expandPostRAPseudo(MachineInstr &MI) const overridellvm::SparcInstrInfo
getBranchDestBlock(const MachineInstr &MI) const overridellvm::SparcInstrInfo
getGlobalBaseReg(MachineFunction *MF) constllvm::SparcInstrInfo
getInstSizeInBytes(const MachineInstr &MI) const overridellvm::SparcInstrInfo
getRegisterInfo() constllvm::SparcInstrInfoinline
insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const overridellvm::SparcInstrInfo
isBranchOffsetInRange(unsigned BranchOpc, int64_t Offset) const overridellvm::SparcInstrInfo
isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const overridellvm::SparcInstrInfo
isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const overridellvm::SparcInstrInfo
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const overridellvm::SparcInstrInfo
optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int64_t CmpMask, int64_t CmpValue, const MachineRegisterInfo *MRI) const overridellvm::SparcInstrInfo
removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const overridellvm::SparcInstrInfo
reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const overridellvm::SparcInstrInfo
SparcInstrInfo(const SparcSubtarget &ST)llvm::SparcInstrInfoexplicit
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const overridellvm::SparcInstrInfo