#include "Target/Sparc/SparcInstrInfo.h"

Inheritance diagram for llvm::SparcInstrInfo:

Collaboration diagram for llvm::SparcInstrInfo:

Public Member Functions
	SparcInstrInfo (SparcSubtarget &ST)

const SparcRegisterInfo &	getRegisterInfo () const
	getRegisterInfo - TargetInstrInfo is a superset of MRegister info. More...

unsigned	isLoadFromStackSlot (const MachineInstr &MI, int &FrameIndex) const override
	isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot. More...

unsigned	isStoreToStackSlot (const MachineInstr &MI, int &FrameIndex) const override
	isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot. More...

bool	analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock &TBB, MachineBasicBlock &FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override

unsigned	removeBranch (MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override

unsigned	insertBranch (MachineBasicBlock &MBB, MachineBasicBlock TBB, MachineBasicBlock FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override

bool	reverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override

void	copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override

void	storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass RC, const TargetRegisterInfo TRI) const override

void	loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass RC, const TargetRegisterInfo TRI) const override

Register	getGlobalBaseReg (MachineFunction *MF) const

bool	expandPostRAPseudo (MachineInstr &MI) const override

Detailed Description

Definition at line 38 of file SparcInstrInfo.h.

Constructor & Destructor Documentation

◆ SparcInstrInfo()

SparcInstrInfo::SparcInstrInfo ( SparcSubtarget & ST )

explicit

Definition at line 34 of file SparcInstrInfo.cpp.

Member Function Documentation

◆ analyzeBranch()

bool SparcInstrInfo::analyzeBranch	(	MachineBasicBlock &	MBB,
		MachineBasicBlock *&	TBB,
		MachineBasicBlock *&	FBB,
		SmallVectorImpl< MachineOperand > &	Cond,
		bool	AllowModify = `false`
	)		const

override

Definition at line 159 of file SparcInstrInfo.cpp.

References llvm::MachineBasicBlock::begin(), llvm::MachineBasicBlock::end(), llvm::MachineInstr::eraseFromParent(), llvm::MachineBasicBlock::getLastNonDebugInstr(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), I, llvm::isCondBranchOpcode(), llvm::isIndirectBranchOpcode(), llvm::isUncondBranchOpcode(), and parseCondBranch().

◆ copyPhysReg()

void SparcInstrInfo::copyPhysReg	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	I,
		const DebugLoc &	DL,
		MCRegister	DestReg,
		MCRegister	SrcReg,
		bool	KillSrc
	)		const

override

Definition at line 305 of file SparcInstrInfo.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterKilled(), assert(), llvm::BuildMI(), contains(), llvm::MachineInstrBuilder::getInstr(), llvm::getKillRegState(), getRegisterInfo(), llvm::TargetRegisterInfo::getSubReg(), llvm::SparcSubtarget::hasHardQuad(), llvm::SparcSubtarget::isV9(), llvm_unreachable, storeRegToStackSlot(), and TRI.

◆ expandPostRAPseudo()

bool SparcInstrInfo::expandPostRAPseudo ( MachineInstr & MI ) const

override

Definition at line 493 of file SparcInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), assert(), llvm::MachineInstr::getOpcode(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::SparcSubtarget::is64Bit(), llvm::SparcSubtarget::isTargetLinux(), MI, and llvm::MachineInstr::setDesc().

◆ getGlobalBaseReg()

Register SparcInstrInfo::getGlobalBaseReg ( MachineFunction * MF ) const

Definition at line 471 of file SparcInstrInfo.cpp.

References llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineFunction::front(), llvm::SparcMachineFunctionInfo::getGlobalBaseReg(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getRegInfo(), llvm::PPCISD::GlobalBaseReg, llvm::SparcSubtarget::is64Bit(), MBBI, and llvm::SparcMachineFunctionInfo::setGlobalBaseReg().

◆ getRegisterInfo()

const SparcRegisterInfo& llvm::SparcInstrInfo::getRegisterInfo ( ) const

inline

getRegisterInfo - TargetInstrInfo is a superset of MRegister info.

As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).

Definition at line 49 of file SparcInstrInfo.h.

References Cond, DL, llvm::ISD::FrameIndex, I, MBB, MBBI, MI, and TRI.

Referenced by copyPhysReg(), and llvm::SparcSubtarget::getRegisterInfo().

◆ insertBranch()

unsigned SparcInstrInfo::insertBranch	(	MachineBasicBlock &	MBB,
		MachineBasicBlock *	TBB,
		MachineBasicBlock *	FBB,
		ArrayRef< MachineOperand >	Cond,
		const DebugLoc &	DL,
		int *	BytesAdded = `nullptr`
	)		const

override

Definition at line 242 of file SparcInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), assert(), llvm::BuildMI(), llvm::ArrayRef< T >::empty(), IsIntegerCC(), and llvm::ArrayRef< T >::size().

◆ isLoadFromStackSlot()

unsigned SparcInstrInfo::isLoadFromStackSlot	(	const MachineInstr &	MI,
		int &	FrameIndex
	)		const

override

isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.

If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.

Definition at line 43 of file SparcInstrInfo.cpp.

References llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), and llvm::MachineOperand::isImm().

◆ isStoreToStackSlot()

unsigned SparcInstrInfo::isStoreToStackSlot	(	const MachineInstr &	MI,
		int &	FrameIndex
	)		const

override

isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.

If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.

Definition at line 62 of file SparcInstrInfo.cpp.

References llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), and llvm::MachineOperand::isImm().

◆ loadRegFromStackSlot()

void SparcInstrInfo::loadRegFromStackSlot	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	MBBI,
		Register	DestReg,
		int	FrameIndex,
		const TargetRegisterClass *	RC,
		const TargetRegisterInfo *	TRI
	)		const

override

Definition at line 434 of file SparcInstrInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::BuildMI(), DL, llvm::MachineBasicBlock::end(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlign(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineBasicBlock::getParent(), llvm_unreachable, and llvm::MachineMemOperand::MOLoad.

Referenced by storeRegToStackSlot().

◆ removeBranch()

unsigned SparcInstrInfo::removeBranch	(	MachineBasicBlock &	MBB,
		int *	BytesRemoved = `nullptr`
	)		const

override

Definition at line 273 of file SparcInstrInfo.cpp.

References assert(), llvm::MachineBasicBlock::begin(), llvm::MachineBasicBlock::end(), and I.

◆ reverseBranchCondition()

bool SparcInstrInfo::reverseBranchCondition ( SmallVectorImpl< MachineOperand > & Cond ) const

override

Definition at line 297 of file SparcInstrInfo.cpp.

References assert(), GetOppositeBranchCondition(), and llvm::SmallVectorBase< SmallVectorSizeType< T > >::size().

◆ storeRegToStackSlot()

void SparcInstrInfo::storeRegToStackSlot	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	MBBI,
		Register	SrcReg,
		bool	isKill,
		int	FrameIndex,
		const TargetRegisterClass *	RC,
		const TargetRegisterInfo *	TRI
	)		const

override

The documentation for this class was generated from the following files:

lib/Target/Sparc/SparcInstrInfo.h
lib/Target/Sparc/SparcInstrInfo.cpp

Public Member Functions

Detailed Description

Constructor & Destructor Documentation

◆ SparcInstrInfo()

Member Function Documentation

◆ analyzeBranch()

◆ copyPhysReg()

◆ expandPostRAPseudo()

◆ getGlobalBaseReg()

◆ getRegisterInfo()

◆ insertBranch()

◆ isLoadFromStackSlot()

◆ isStoreToStackSlot()

◆ loadRegFromStackSlot()

◆ removeBranch()

◆ reverseBranchCondition()

◆ storeRegToStackSlot()