LLVM 17.0.0git
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#include "SparcInstrInfo.h"
#include "Sparc.h"
#include "SparcMachineFunctionInfo.h"
#include "SparcSubtarget.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/ErrorHandling.h"
#include "SparcGenInstrInfo.inc"
Go to the source code of this file.
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#define | GET_INSTRINFO_CTOR_DTOR |
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static bool | IsIntegerCC (unsigned CC) |
static SPCC::CondCodes | GetOppositeBranchCondition (SPCC::CondCodes CC) |
static bool | isUncondBranchOpcode (int Opc) |
static bool | isI32CondBranchOpcode (int Opc) |
static bool | isI64CondBranchOpcode (int Opc) |
static bool | isFCondBranchOpcode (int Opc) |
static bool | isCondBranchOpcode (int Opc) |
static bool | isIndirectBranchOpcode (int Opc) |
static void | parseCondBranch (MachineInstr *LastInst, MachineBasicBlock *&Target, SmallVectorImpl< MachineOperand > &Cond) |
#define GET_INSTRINFO_CTOR_DTOR |
Definition at line 28 of file SparcInstrInfo.cpp.
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Definition at line 81 of file SparcInstrInfo.cpp.
References CC, llvm::SPCC::CPCC_0, llvm::SPCC::CPCC_01, llvm::SPCC::CPCC_012, llvm::SPCC::CPCC_013, llvm::SPCC::CPCC_02, llvm::SPCC::CPCC_023, llvm::SPCC::CPCC_03, llvm::SPCC::CPCC_1, llvm::SPCC::CPCC_12, llvm::SPCC::CPCC_123, llvm::SPCC::CPCC_13, llvm::SPCC::CPCC_2, llvm::SPCC::CPCC_23, llvm::SPCC::CPCC_3, llvm::SPCC::CPCC_A, llvm::SPCC::CPCC_N, llvm::SPCC::FCC_A, llvm::SPCC::FCC_E, llvm::SPCC::FCC_G, llvm::SPCC::FCC_GE, llvm::SPCC::FCC_L, llvm::SPCC::FCC_LE, llvm::SPCC::FCC_LG, llvm::SPCC::FCC_N, llvm::SPCC::FCC_NE, llvm::SPCC::FCC_O, llvm::SPCC::FCC_U, llvm::SPCC::FCC_UE, llvm::SPCC::FCC_UG, llvm::SPCC::FCC_UGE, llvm::SPCC::FCC_UL, llvm::SPCC::FCC_ULE, llvm::SPCC::ICC_A, llvm::SPCC::ICC_CC, llvm::SPCC::ICC_CS, llvm::SPCC::ICC_E, llvm::SPCC::ICC_G, llvm::SPCC::ICC_GE, llvm::SPCC::ICC_GU, llvm::SPCC::ICC_L, llvm::SPCC::ICC_LE, llvm::SPCC::ICC_LEU, llvm::SPCC::ICC_N, llvm::SPCC::ICC_NE, llvm::SPCC::ICC_NEG, llvm::SPCC::ICC_POS, llvm::SPCC::ICC_VC, llvm::SPCC::ICC_VS, llvm_unreachable, llvm::SPCC::REG_BEGIN, llvm::SPCC::REG_GEZ, llvm::SPCC::REG_GZ, llvm::SPCC::REG_LEZ, llvm::SPCC::REG_LZ, llvm::SPCC::REG_NZ, and llvm::SPCC::REG_Z.
Referenced by llvm::M68kInstrInfo::AnalyzeBranchImpl(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::SparcInstrInfo::reverseBranchCondition(), llvm::VEInstrInfo::reverseBranchCondition(), llvm::X86InstrInfo::reverseBranchCondition(), and llvm::XCoreInstrInfo::reverseBranchCondition().
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Definition at line 174 of file SparcInstrInfo.cpp.
References isFCondBranchOpcode(), isI32CondBranchOpcode(), and isI64CondBranchOpcode().
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Definition at line 172 of file SparcInstrInfo.cpp.
Referenced by isCondBranchOpcode().
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Definition at line 162 of file SparcInstrInfo.cpp.
Referenced by isCondBranchOpcode().
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Definition at line 167 of file SparcInstrInfo.cpp.
Referenced by isCondBranchOpcode().
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Definition at line 179 of file SparcInstrInfo.cpp.
Definition at line 76 of file SparcInstrInfo.cpp.
References CC, and llvm::SPCC::ICC_VC.
Referenced by llvm::SparcInstrInfo::insertBranch(), and llvm::VEInstrInfo::insertBranch().
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Definition at line 158 of file SparcInstrInfo.cpp.
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Definition at line 183 of file SparcInstrInfo.cpp.
References CC, Cond, llvm::MachineOperand::CreateImm(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), and llvm::MachineInstr::getOperand().