llvm::jitlink::riscv Namespace Reference

Enumerations
enum	EdgeKind_riscv : Edge::Kind {   R_RISCV_32 = Edge::FirstRelocation , R_RISCV_64 , R_RISCV_BRANCH , R_RISCV_JAL ,   R_RISCV_CALL , R_RISCV_CALL_PLT , R_RISCV_GOT_HI20 , R_RISCV_PCREL_HI20 ,   R_RISCV_PCREL_LO12_I , R_RISCV_PCREL_LO12_S , R_RISCV_HI20 , R_RISCV_LO12_I ,   R_RISCV_LO12_S , R_RISCV_ADD8 , R_RISCV_ADD16 , R_RISCV_ADD32 ,   R_RISCV_ADD64 , R_RISCV_SUB8 , R_RISCV_SUB16 , R_RISCV_SUB32 ,   R_RISCV_SUB64 , R_RISCV_RVC_BRANCH , R_RISCV_RVC_JUMP , R_RISCV_SUB6 ,   R_RISCV_SET6 , R_RISCV_SET8 , R_RISCV_SET16 , R_RISCV_SET32 ,   R_RISCV_32_PCREL , CallRelaxable , AlignRelaxable , NegDelta32 }
	Represents riscv fixups. More...

Functions
const char *	getEdgeKindName (Edge::Kind K)
	Returns a string name for the given riscv edge.

Enumeration Type Documentation

EdgeKind_riscv

enum llvm::jitlink::riscv::EdgeKind_riscv : Edge::Kind

Represents riscv fixups.

Ordered in the same way as the relocations in include/llvm/BinaryFormat/ELFRelocs/RISCV.def.

Enumerator
R_RISCV_32	A plain 32-bit pointer value relocation. Fixup expression: Fixup <= Target + Addend : uint32
R_RISCV_64	A plain 64-bit pointer value relocation. Fixup expression: Fixup <- Target + Addend : uint32
R_RISCV_BRANCH	PC-relative branch pointer value relocation. Fixup expression: Fixup <- (Target - Fixup + Addend)
R_RISCV_JAL	High 20 bits of PC-relative jump pointer value relocation. Fixup expression: Fixup <- Target - Fixup + Addend
R_RISCV_CALL	PC relative call. Fixup expression: Fixup <- (Target - Fixup + Addend)
R_RISCV_CALL_PLT	PC relative call by PLT. Fixup expression: Fixup <- (Target - Fixup + Addend)
R_RISCV_GOT_HI20	PC relative GOT offset. Fixup expression: Fixup <- (GOT - Fixup + Addend) >> 12
R_RISCV_PCREL_HI20	High 20 bits of PC relative relocation. Fixup expression: Fixup <- (Target - Fixup + Addend + 0x800) >> 12
R_RISCV_PCREL_LO12_I	Low 12 bits of PC relative relocation, used by I type instruction format. Fixup expression: Fixup <- (Target - Fixup + Addend) & 0xFFF
R_RISCV_PCREL_LO12_S	Low 12 bits of PC relative relocation, used by S type instruction format. Fixup expression: Fixup <- (Target - Fixup + Addend) & 0xFFF
R_RISCV_HI20	High 20 bits of 32-bit pointer value relocation. Fixup expression Fixup <- (Target + Addend + 0x800) >> 12
R_RISCV_LO12_I	Low 12 bits of 32-bit pointer value relocation. Fixup expression Fixup <- (Target + Addend) & 0xFFF
R_RISCV_LO12_S	Low 12 bits of 32-bit pointer value relocation, used by S type instruction format. Fixup expression Fixup <- (Target + Addend) & 0xFFF
R_RISCV_ADD8	8 bits label addition Fixup expression Fixup <- (Target + *{1}Fixup + Addend)
R_RISCV_ADD16	16 bits label addition Fixup expression Fixup <- (Target + *{2}Fixup + Addend)
R_RISCV_ADD32	32 bits label addition Fixup expression: Fixup <- (Target + *{4}Fixup + Addend)
R_RISCV_ADD64	64 bits label addition Fixup expression: Fixup <- (Target + *{8}Fixup + Addend)
R_RISCV_SUB8	8 bits label subtraction Fixup expression Fixup <- (Target - *{1}Fixup - Addend)
R_RISCV_SUB16	16 bits label subtraction Fixup expression Fixup <- (Target - *{2}Fixup - Addend)
R_RISCV_SUB32	32 bits label subtraction Fixup expression Fixup <- (Target - *{4}Fixup - Addend)
R_RISCV_SUB64	64 bits label subtraction Fixup expression Fixup <- (Target - *{8}Fixup - Addend)
R_RISCV_RVC_BRANCH	8-bit PC-relative branch offset Fixup expression: Fixup <- (Target - Fixup + Addend)
R_RISCV_RVC_JUMP	11-bit PC-relative jump offset Fixup expression: Fixup <- (Target - Fixup + Addend)
R_RISCV_SUB6	6 bits label subtraction Fixup expression Fixup <- (Target - *{1}Fixup - Addend)
R_RISCV_SET6	Local label assignment. Fixup expression: Fixup <- (Target + Addend)
R_RISCV_SET8	Local label assignment. Fixup expression: Fixup <- (Target + Addend)
R_RISCV_SET16	Local label assignment. Fixup expression: Fixup <- (Target + Addend)
R_RISCV_SET32	Local label assignment. Fixup expression: Fixup <- (Target + Addend)
R_RISCV_32_PCREL	32 bits PC relative relocation Fixup expression: Fixup <- (Target - Fixup + Addend)
CallRelaxable	An auipc/jalr pair eligible for linker relaxation. Linker relaxation will replace this with R_RISCV_RVC_JUMP or R_RISCV_JAL if it succeeds, or with R_RISCV_CALL_PLT if it fails.
AlignRelaxable	Alignment requirement used by linker relaxation. Linker relaxation will use this to ensure all code sequences are properly aligned and then remove these edges from the graph.
NegDelta32	32-bit negative delta. Fixup expression: Fixup <- Fixup - Target + Addend

Definition at line 24 of file riscv.h.

Function Documentation

getEdgeKindName()

const char * llvm::jitlink::riscv::getEdgeKindName

(

Edge::Kind

K

)

Returns a string name for the given riscv edge.

For debugging purposes only

Definition at line 21 of file riscv.cpp.

References AlignRelaxable, CallRelaxable, llvm::jitlink::getGenericEdgeKindName(), NegDelta32, R_RISCV_32, R_RISCV_32_PCREL, R_RISCV_64, R_RISCV_ADD16, R_RISCV_ADD32, R_RISCV_ADD64, R_RISCV_ADD8, R_RISCV_BRANCH, R_RISCV_CALL, R_RISCV_CALL_PLT, R_RISCV_GOT_HI20, R_RISCV_HI20, R_RISCV_JAL, R_RISCV_LO12_I, R_RISCV_LO12_S, R_RISCV_PCREL_HI20, R_RISCV_PCREL_LO12_I, R_RISCV_PCREL_LO12_S, R_RISCV_RVC_BRANCH, R_RISCV_RVC_JUMP, R_RISCV_SET16, R_RISCV_SET32, R_RISCV_SET6, R_RISCV_SET8, R_RISCV_SUB16, R_RISCV_SUB32, R_RISCV_SUB6, R_RISCV_SUB64, and R_RISCV_SUB8.