LLVM 19.0.0git
Macros | Functions | Variables
RISCVInsertVSETVLI.cpp File Reference
#include "RISCV.h"
#include "RISCVSubtarget.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/LiveDebugVariables.h"
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/LiveStacks.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include <queue>

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "riscv-insert-vsetvli"
 
#define RISCV_INSERT_VSETVLI_NAME   "RISC-V Insert VSETVLI pass"
 
#define RISCV_COALESCE_VSETVLI_NAME   "RISC-V Coalesce VSETVLI pass"
 

Functions

 STATISTIC (NumInsertedVSETVL, "Number of VSETVL inst inserted")
 
 STATISTIC (NumCoalescedVSETVL, "Number of VSETVL inst coalesced")
 
INITIALIZE_PASS(RISCVInsertVSETVLI, DEBUG_TYPE, RISCV_INSERT_VSETVLI_NAME, false, false) char RISCVCoalesceVSETVLI INITIALIZE_PASS (RISCVCoalesceVSETVLI, "riscv-coalesce-vsetvli", RISCV_COALESCE_VSETVLI_NAME, false, false) static VSETVLIInfo getInfoForVSETVLI(const MachineInstr &MI
 
 if (MI.getOpcode()==RISCV::PseudoVSETIVLI)
 
 assert ((AVLReg !=RISCV::X0||MI.getOperand(0).getReg() !=RISCV::X0) &&"Can't handle X0, X0 vsetvli yet")
 
 if (AVLReg==RISCV::X0) NewInfo.setAVLVLMAX()
 
else NewInfo setAVLRegDef (getVNInfoFromReg(AVLReg, MI, LIS), AVLReg)
 
NewInfo setVTYPE (MI.getOperand(2).getImm())
 
static unsigned computeVLMAX (unsigned VLEN, unsigned SEW, RISCVII::VLMUL VLMul)
 
static VSETVLIInfo computeInfoForInstr (const MachineInstr &MI, uint64_t TSFlags, const RISCVSubtarget &ST, const LiveIntervals *LIS)
 
static bool isLMUL1OrSmaller (RISCVII::VLMUL LMUL)
 
static VSETVLIInfo adjustIncoming (VSETVLIInfo PrevInfo, VSETVLIInfo NewInfo, DemandedFields &Demanded)
 
static bool canMutatePriorConfig (const MachineInstr &PrevMI, const MachineInstr &MI, const DemandedFields &Used, const MachineRegisterInfo &MRI, const LiveIntervals *LIS)
 

Variables

static cl::opt< bool > DisableInsertVSETVLPHIOpt ("riscv-disable-insert-vsetvl-phi-opt", cl::init(false), cl::Hidden, cl::desc("Disable looking through phis when inserting vsetvlis."))
 
INITIALIZE_PASS(RISCVInsertVSETVLI, DEBUG_TYPE, RISCV_INSERT_VSETVLI_NAME, false, false) char RISCVCoalesceVSETVLI const LiveIntervals * LIS
 
 else
 
Register AVLReg = MI.getOperand(1).getReg()
 
return NewInfo
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "riscv-insert-vsetvli"

Definition at line 37 of file RISCVInsertVSETVLI.cpp.

◆ RISCV_COALESCE_VSETVLI_NAME

#define RISCV_COALESCE_VSETVLI_NAME   "RISC-V Coalesce VSETVLI pass"

Definition at line 39 of file RISCVInsertVSETVLI.cpp.

◆ RISCV_INSERT_VSETVLI_NAME

#define RISCV_INSERT_VSETVLI_NAME   "RISC-V Insert VSETVLI pass"

Definition at line 38 of file RISCVInsertVSETVLI.cpp.

Function Documentation

◆ adjustIncoming()

static VSETVLIInfo adjustIncoming ( VSETVLIInfo  PrevInfo,
VSETVLIInfo  NewInfo,
DemandedFields &  Demanded 
)
static

Definition at line 1178 of file RISCVInsertVSETVLI.cpp.

References llvm::RISCVVType::getSameRatioLMUL(), Info, and NewInfo.

◆ assert()

assert ( (AVLReg !=RISCV::X0||MI.getOperand(0).getReg() !=RISCV::X0) &&"Can't handle  X0,
X0 vsetvli yet"   
)

Referenced by canMutatePriorConfig(), and computeInfoForInstr().

◆ canMutatePriorConfig()

static bool canMutatePriorConfig ( const MachineInstr &  PrevMI,
const MachineInstr &  MI,
const DemandedFields &  Used,
const MachineRegisterInfo &  MRI,
const LiveIntervals *  LIS 
)
static

Definition at line 1586 of file RISCVInsertVSETVLI.cpp.

References assert(), llvm::MachineOperand::getImm(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::isImm(), LIS, MI, and MRI.

◆ computeInfoForInstr()

static VSETVLIInfo computeInfoForInstr ( const MachineInstr &  MI,
uint64_t  TSFlags,
const RISCVSubtarget &  ST,
const LiveIntervals *  LIS 
)
static

Definition at line 915 of file RISCVInsertVSETVLI.cpp.

References assert(), computeVLMAX(), DefMI, llvm::RISCVII::doesForceTailAgnostic(), llvm::MachineOperand::getImm(), llvm::RISCVII::getLMul(), llvm::MachineOperand::getReg(), llvm::RISCVII::hasVecPolicyOp(), llvm::RISCVII::hasVLOp(), llvm::MachineOperand::isImm(), llvm::RISCVVType::isValidSEW(), LIS, llvm::RISCVII::MASK_AGNOSTIC, MI, llvm::RISCVII::TAIL_AGNOSTIC, llvm::RISCVII::usesMaskPolicy(), and llvm::RISCV::VLMaxSentinel.

◆ computeVLMAX()

static unsigned computeVLMAX ( unsigned  VLEN,
unsigned  SEW,
RISCVII::VLMUL  VLMul 
)
static

Definition at line 905 of file RISCVInsertVSETVLI.cpp.

References llvm::RISCVVType::decodeVLMUL().

Referenced by computeInfoForInstr().

◆ if() [1/2]

if ( AVLReg  = =RISCV::X0)

◆ if() [2/2]

if ( MI.  getOpcode() = = RISCV::PseudoVSETIVLI)

Definition at line 887 of file RISCVInsertVSETVLI.cpp.

References MI, and NewInfo.

◆ INITIALIZE_PASS()

INITIALIZE_PASS(RISCVInsertVSETVLI, DEBUG_TYPE, RISCV_INSERT_VSETVLI_NAME, false, false) char RISCVCoalesceVSETVLI INITIALIZE_PASS ( RISCVCoalesceVSETVLI  ,
"riscv-coalesce-vsetvli"  ,
RISCV_COALESCE_VSETVLI_NAME  ,
false  ,
false   
) const &

◆ isLMUL1OrSmaller()

static bool isLMUL1OrSmaller ( RISCVII::VLMUL  LMUL)
static

Definition at line 1105 of file RISCVInsertVSETVLI.cpp.

References llvm::RISCVVType::decodeVLMUL().

◆ setAVLRegDef()

else NewInfo setAVLRegDef ( getVNInfoFromReg(AVLReg, MI, LIS)  ,
AVLReg   
)

◆ setVTYPE()

NewInfo setVTYPE ( MI.  getOperand2).getImm()

◆ STATISTIC() [1/2]

STATISTIC ( NumCoalescedVSETVL  ,
"Number of VSETVL inst coalesced"   
)

◆ STATISTIC() [2/2]

STATISTIC ( NumInsertedVSETVL  ,
"Number of VSETVL inst inserted"   
)

Variable Documentation

◆ AVLReg

Register AVLReg = MI.getOperand(1).getReg()

Definition at line 892 of file RISCVInsertVSETVLI.cpp.

◆ DisableInsertVSETVLPHIOpt

cl::opt< bool > DisableInsertVSETVLPHIOpt("riscv-disable-insert-vsetvl-phi-opt", cl::init(false), cl::Hidden, cl::desc("Disable looking through phis when inserting vsetvlis.")) ( "riscv-disable-insert-vsetvl-phi-opt"  ,
cl::init(false)  ,
cl::Hidden  ,
cl::desc("Disable looking through phis when inserting vsetvlis.")   
)
static

◆ else

else
Initial value:
{
assert(MI.getOpcode() == RISCV::PseudoVSETVLI ||
MI.getOpcode() == RISCV::PseudoVSETVLIX0)
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:113
assert
assert((AVLReg !=RISCV::X0||MI.getOperand(0).getReg() !=RISCV::X0) &&"Can't handle X0, X0 vsetvli yet")

Definition at line 889 of file RISCVInsertVSETVLI.cpp.

◆ LIS

INITIALIZE_PASS(RISCVInsertVSETVLI, DEBUG_TYPE, RISCV_INSERT_VSETVLI_NAME, false, false) char RISCVCoalesceVSETVLI const LiveIntervals* LIS
Initial value:
{
VSETVLIInfo NewInfo
NewInfo
return NewInfo
Definition: RISCVInsertVSETVLI.cpp:902

Definition at line 885 of file RISCVInsertVSETVLI.cpp.

Referenced by llvm::RegisterOperands::adjustLaneLiveness(), llvm::RegPressureTracker::advance(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::RegPressureTracker::bumpDownwardPressure(), llvm::RegPressureTracker::bumpUpwardPressure(), canMutatePriorConfig(), llvm::ConnectedVNInfoEqClasses::Classify(), llvm::X86InstrInfo::classifyLEAReg(), collectVirtualRegUses(), computeInfoForInstr(), llvm::ConnectedVNInfoEqClasses::ConnectedVNInfoEqClasses(), llvm::SIInstrInfo::convertToThreeAddress(), llvm::RISCVInstrInfo::convertToThreeAddress(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::RegisterOperands::detectDeadDefs(), llvm::ConnectedVNInfoEqClasses::Distribute(), dumpMachineInstrRangeWithSlotIndex(), llvm::SIRegisterInfo::eliminateSGPRToVGPRSpillFrameIndex(), findInsertLocation(), findNextInsertLocation(), llvm::SIRegisterInfo::findReachingDef(), findUseBetween(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::InsertPointAnalysis::getFirstInsertPoint(), getLanesWithProperty(), llvm::RegPressureTracker::getLastUsedLanes(), llvm::RAGreedy::getLiveIntervals(), llvm::getLiveLaneMask(), getLiveLanesAt(), llvm::RegPressureTracker::getLiveLanesAt(), getLiveRange(), llvm::getLiveRegMap(), llvm::getLiveRegs(), llvm::getLiveRegsAfter(), llvm::getLiveRegsBefore(), llvm::RegPressureTracker::getLiveThroughAt(), getRegLiveThroughMask(), llvm::LiveIntervals::HMEditor::getRegUnitLI(), getVDefInterval(), getVRegDef(), hasOneNonDBGUse(), llvm::LiveIntervals::HMEditor::HMEditor(), insertCSRRestores(), insertCSRSaves(), isDefBetween(), isLocalCopy(), llvm::VirtRegAuxInfo::isRematerializable(), llvm::LiveRangeEdit::LiveRangeEdit(), llvm::ModuloScheduleExpander::ModuloScheduleExpander(), moveAndTeeForMultiUse(), moveForSingleUse(), oneUseDominatesOtherUses(), optimizeCall(), printLivenessInfo(), printRegion(), llvm::RegPressureTracker::recede(), llvm::RegPressureTracker::recedeSkipDebugValues(), rematerializeCheapDef(), replaceDominatedUses(), replaceRegUsesAfterLoop(), llvm::SIRegisterInfo::restoreSGPR(), llvm::GCNRegPressurePrinter::runOnMachineFunction(), llvm::PPCTargetLowering::SelectOptimalAddrMode(), llvm::AVRRegisterInfo::shouldCoalesce(), llvm::HexagonRegisterInfo::shouldCoalesce(), llvm::SystemZRegisterInfo::shouldCoalesce(), shrinkToUses(), llvm::SIRegisterInfo::spillSGPR(), llvm::MachineBasicBlock::splitAt(), llvm::MachineBasicBlock::SplitCriticalEdge(), llvm::SwingSchedulerDAG::SwingSchedulerDAG(), llvm::LiveIntervals::HMEditor::updateAllRanges(), and llvm::VirtRegAuxInfo::VirtRegAuxInfo().

◆ NewInfo

return NewInfo

Definition at line 902 of file RISCVInsertVSETVLI.cpp.

Referenced by adjustIncoming(), llvm::AMDGPU::getMaskedMIMGOp(), and if().

Generated on Wed May 15 2024 22:08:54 for LLVM by doxygen 1.9.6