LLVM  6.0.0svn
Classes | Namespaces | Enumerations | Functions | Variables
AMDGPU.h File Reference
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "llvm/Target/TargetMachine.h"
Include dependency graph for AMDGPU.h:

Go to the source code of this file.

Classes

struct  AMDGPUAS
 OpenCL uses address spaces to differentiate between various memory regions on the hardware. More...
 

Namespaces

 llvm
 Compute iterated dominance frontiers using a linear time algorithm.
 
 llvm::AMDGPU
 

Enumerations

enum  llvm::AMDGPU::TargetIndex {
  llvm::AMDGPU::TI_CONSTDATA_START, llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD0, llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD1, llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD2,
  llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD3
}
 

Functions

FunctionPassllvm::createR600VectorRegMerger ()
 
FunctionPassllvm::createR600ExpandSpecialInstrsPass ()
 
FunctionPassllvm::createR600EmitClauseMarkers ()
 
FunctionPassllvm::createR600ClauseMergePass ()
 
FunctionPassllvm::createR600Packetizer ()
 
FunctionPassllvm::createR600ControlFlowFinalizer ()
 
FunctionPassllvm::createAMDGPUCFGStructurizerPass ()
 
FunctionPassllvm::createR600ISelDag (TargetMachine *TM, CodeGenOpt::Level OptLevel)
 This pass converts a legalized DAG into a R600-specific. More...
 
FunctionPassllvm::createSIAnnotateControlFlowPass ()
 Create the annotation pass. More...
 
FunctionPassllvm::createSIFoldOperandsPass ()
 
FunctionPassllvm::createSIPeepholeSDWAPass ()
 
FunctionPassllvm::createSILowerI1CopiesPass ()
 
FunctionPass * llvm::createSIShrinkInstructionsPass ()
 
FunctionPassllvm::createSILoadStoreOptimizerPass ()
 
FunctionPassllvm::createSIWholeQuadModePass ()
 
FunctionPass * llvm::createSIFixControlFlowLiveIntervalsPass ()
 
FunctionPassllvm::createSIOptimizeExecMaskingPreRAPass ()
 
FunctionPassllvm::createSIFixSGPRCopiesPass ()
 
FunctionPassllvm::createSIMemoryLegalizerPass ()
 
FunctionPassllvm::createSIDebuggerInsertNopsPass ()
 
FunctionPassllvm::createSIInsertWaitsPass ()
 
FunctionPassllvm::createSIInsertWaitcntsPass ()
 
FunctionPassllvm::createSIFixWWMLivenessPass ()
 
FunctionPassllvm::createAMDGPUSimplifyLibCallsPass (const TargetOptions &)
 
FunctionPassllvm::createAMDGPUUseNativeCallsPass ()
 
FunctionPassllvm::createAMDGPUCodeGenPreparePass ()
 
FunctionPassllvm::createAMDGPUMachineCFGStructurizerPass ()
 
FunctionPassllvm::createAMDGPURewriteOutArgumentsPass ()
 
void llvm::initializeAMDGPUDAGToDAGISelPass (PassRegistry &)
 
void llvm::initializeAMDGPUMachineCFGStructurizerPass (PassRegistry &)
 
void llvm::initializeAMDGPUAlwaysInlinePass (PassRegistry &)
 
Passllvm::createAMDGPUAnnotateKernelFeaturesPass ()
 
void llvm::initializeAMDGPUAnnotateKernelFeaturesPass (PassRegistry &)
 
ModulePassllvm::createAMDGPULowerIntrinsicsPass ()
 
void llvm::initializeAMDGPULowerIntrinsicsPass (PassRegistry &)
 
void llvm::initializeAMDGPURewriteOutArgumentsPass (PassRegistry &)
 
void llvm::initializeR600ClauseMergePassPass (PassRegistry &)
 
void llvm::initializeR600ControlFlowFinalizerPass (PassRegistry &)
 
void llvm::initializeR600ExpandSpecialInstrsPassPass (PassRegistry &)
 
void llvm::initializeR600VectorRegMergerPass (PassRegistry &)
 
void llvm::initializeR600PacketizerPass (PassRegistry &)
 
void llvm::initializeSIFoldOperandsPass (PassRegistry &)
 
void llvm::initializeSIPeepholeSDWAPass (PassRegistry &)
 
void llvm::initializeSIShrinkInstructionsPass (PassRegistry &)
 
void llvm::initializeSIFixSGPRCopiesPass (PassRegistry &)
 
void llvm::initializeSIFixVGPRCopiesPass (PassRegistry &)
 
void llvm::initializeSILowerI1CopiesPass (PassRegistry &)
 
void llvm::initializeSILoadStoreOptimizerPass (PassRegistry &)
 
void llvm::initializeSIWholeQuadModePass (PassRegistry &)
 
void llvm::initializeSILowerControlFlowPass (PassRegistry &)
 
void llvm::initializeSIInsertSkipsPass (PassRegistry &)
 
void llvm::initializeSIOptimizeExecMaskingPass (PassRegistry &)
 
void llvm::initializeSIFixWWMLivenessPass (PassRegistry &)
 
void llvm::initializeAMDGPUSimplifyLibCallsPass (PassRegistry &)
 
void llvm::initializeAMDGPUUseNativeCallsPass (PassRegistry &)
 
FunctionPassllvm::createAMDGPUPromoteAlloca ()
 
void llvm::initializeAMDGPUPromoteAllocaPass (PassRegistry &)
 
Passllvm::createAMDGPUStructurizeCFGPass ()
 
FunctionPassllvm::createAMDGPUISelDag (TargetMachine *TM=nullptr, CodeGenOpt::Level OptLevel=CodeGenOpt::Default)
 This pass converts a legalized DAG into a AMDGPU-specific. More...
 
ModulePassllvm::createAMDGPUAlwaysInlinePass (bool GlobalOpt=true)
 
ModulePassllvm::createAMDGPUOpenCLImageTypeLoweringPass ()
 
FunctionPassllvm::createAMDGPUAnnotateUniformValues ()
 
ModulePass * llvm::createAMDGPUUnifyMetadataPass ()
 
void llvm::initializeAMDGPUUnifyMetadataPass (PassRegistry &)
 
void llvm::initializeSIOptimizeExecMaskingPreRAPass (PassRegistry &)
 
void llvm::initializeAMDGPUAnnotateUniformValuesPass (PassRegistry &)
 
void llvm::initializeAMDGPUCodeGenPreparePass (PassRegistry &)
 
void llvm::initializeSIAnnotateControlFlowPass (PassRegistry &)
 
void llvm::initializeSIMemoryLegalizerPass (PassRegistry &)
 
void llvm::initializeSIDebuggerInsertNopsPass (PassRegistry &)
 
void llvm::initializeSIInsertWaitsPass (PassRegistry &)
 
void llvm::initializeSIInsertWaitcntsPass (PassRegistry &)
 
void llvm::initializeAMDGPUUnifyDivergentExitNodesPass (PassRegistry &)
 
ImmutablePass * llvm::createAMDGPUAAWrapperPass ()
 
void llvm::initializeAMDGPUAAWrapperPassPass (PassRegistry &)
 
void llvm::initializeAMDGPUArgumentUsageInfoPass (PassRegistry &)
 
Passllvm::createAMDGPUFunctionInliningPass ()
 
void llvm::initializeAMDGPUInlinerPass (PassRegistry &)
 
ModulePass * llvm::createAMDGPUOpenCLEnqueuedBlockLoweringPass ()
 
void llvm::initializeAMDGPUOpenCLEnqueuedBlockLoweringPass (PassRegistry &)
 
Targetllvm::getTheAMDGPUTarget ()
 The target which supports all AMD GPUs. More...
 
Targetllvm::getTheGCNTarget ()
 The target for GCN GPUs. More...
 
AMDGPUAS llvm::AMDGPU::getAMDGPUAS (const Module &M)
 
AMDGPUAS llvm::AMDGPU::getAMDGPUAS (const TargetMachine &TM)
 
AMDGPUAS llvm::AMDGPU::getAMDGPUAS (Triple T)
 

Variables

charllvm::AMDGPUMachineCFGStructurizerID
 
charllvm::AMDGPUAnnotateKernelFeaturesID = AMDGPUAnnotateKernelFeatures::ID
 
charllvm::AMDGPULowerIntrinsicsID = AMDGPULowerIntrinsics::ID
 
charllvm::AMDGPURewriteOutArgumentsID
 
charllvm::R600ClauseMergePassID = R600ClauseMergePass::ID
 
charllvm::R600ControlFlowFinalizerID = R600ControlFlowFinalizer::ID
 
charllvm::R600ExpandSpecialInstrsPassID = R600ExpandSpecialInstrsPass::ID
 
charllvm::R600VectorRegMergerID = R600VectorRegMerger::ID
 
charllvm::R600PacketizerID = R600Packetizer::ID
 
charllvm::SIFoldOperandsID
 
charllvm::SIPeepholeSDWAID = SIPeepholeSDWA::ID
 
charllvm::SIShrinkInstructionsID
 
charllvm::SIFixSGPRCopiesID = SIFixSGPRCopies::ID
 
charllvm::SIFixVGPRCopiesID = SIFixVGPRCopies::ID
 
charllvm::SILowerI1CopiesID
 
charllvm::SILoadStoreOptimizerID = SILoadStoreOptimizer::ID
 
charllvm::SIWholeQuadModeID = SIWholeQuadMode::ID
 
charllvm::SILowerControlFlowID = SILowerControlFlow::ID
 
charllvm::SIInsertSkipsPassID
 
charllvm::SIOptimizeExecMaskingID = SIOptimizeExecMasking::ID
 
charllvm::SIFixWWMLivenessID
 
charllvm::AMDGPUSimplifyLibCallsID
 
charllvm::AMDGPUUseNativeCallsID
 
charllvm::AMDGPUPromoteAllocaID
 
charllvm::AMDGPUUnifyMetadataID = AMDGPUUnifyMetadata::ID
 
charllvm::SIOptimizeExecMaskingPreRAID = SIOptimizeExecMaskingPreRA::ID
 
charllvm::AMDGPUAnnotateUniformValuesPassID
 
charllvm::AMDGPUCodeGenPrepareID
 
charllvm::SIAnnotateControlFlowPassID
 
charllvm::SIMemoryLegalizerID = SIMemoryLegalizer::ID
 
charllvm::SIDebuggerInsertNopsID = SIDebuggerInsertNops::ID
 
charllvm::SIInsertWaitsID = SIInsertWaits::ID
 
charllvm::SIInsertWaitcntsID = SIInsertWaitcnts::ID
 
charllvm::AMDGPUUnifyDivergentExitNodesID = AMDGPUUnifyDivergentExitNodes::ID
 
charllvm::AMDGPUOpenCLEnqueuedBlockLoweringID