LLVM  6.0.0svn
MipsMCTargetDesc.h
Go to the documentation of this file.
1 //===-- MipsMCTargetDesc.h - Mips Target Descriptions -----------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Mips specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H
15 #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H
16 
17 #include "llvm/Support/DataTypes.h"
18 
19 #include <memory>
20 
21 namespace llvm {
22 class MCAsmBackend;
23 class MCCodeEmitter;
24 class MCContext;
25 class MCInstrInfo;
26 class MCObjectWriter;
27 class MCRegisterInfo;
28 class MCSubtargetInfo;
29 class MCTargetOptions;
30 class StringRef;
31 class Target;
32 class Triple;
33 class raw_ostream;
34 class raw_pwrite_stream;
35 
36 Target &getTheMipsTarget();
37 Target &getTheMipselTarget();
38 Target &getTheMips64Target();
39 Target &getTheMips64elTarget();
40 
41 MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
42  const MCRegisterInfo &MRI,
43  MCContext &Ctx);
44 MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
45  const MCRegisterInfo &MRI,
46  MCContext &Ctx);
47 
48 MCAsmBackend *createMipsAsmBackend(const Target &T, const MCRegisterInfo &MRI,
49  const Triple &TT, StringRef CPU,
50  const MCTargetOptions &Options);
51 
52 std::unique_ptr<MCObjectWriter>
53 createMipsELFObjectWriter(raw_pwrite_stream &OS, const Triple &TT, bool IsN32);
54 
55 namespace MIPS_MC {
56 StringRef selectMipsCPU(const Triple &TT, StringRef CPU);
57 }
58 
59 } // End llvm namespace
60 
61 // Defines symbolic names for Mips registers. This defines a mapping from
62 // register name to register number.
63 #define GET_REGINFO_ENUM
64 #include "MipsGenRegisterInfo.inc"
65 
66 // Defines symbolic names for the Mips instructions.
67 #define GET_INSTRINFO_ENUM
68 #include "MipsGenInstrInfo.inc"
69 
70 #define GET_SUBTARGETINFO_ENUM
71 #include "MipsGenSubtargetInfo.inc"
72 
73 #endif
MCAsmBackend * createMipsAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
Target & getTheMipselTarget()
std::unique_ptr< MCObjectWriter > createMipsELFObjectWriter(raw_pwrite_stream &OS, const Triple &TT, bool IsN32)
Target & getTheMips64Target()
MCCodeEmitter * createMipsMCCodeEmitterEL(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
Target & getTheMips64elTarget()
unsigned const MachineRegisterInfo * MRI
StringRef selectMipsCPU(const Triple &TT, StringRef CPU)
Select the Mips CPU for the given triple and cpu name.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
MCCodeEmitter * createMipsMCCodeEmitterEB(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
Target & getTheMipsTarget()
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49