LLVM  9.0.0svn
MipsMCTargetDesc.cpp
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1 //===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides Mips specific target descriptions.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "MipsMCTargetDesc.h"
15 #include "MipsAsmBackend.h"
16 #include "MipsELFStreamer.h"
17 #include "MipsMCAsmInfo.h"
18 #include "MipsMCNaCl.h"
19 #include "MipsTargetStreamer.h"
20 #include "llvm/ADT/Triple.h"
21 #include "llvm/MC/MCCodeEmitter.h"
22 #include "llvm/MC/MCELFStreamer.h"
24 #include "llvm/MC/MCInstrInfo.h"
25 #include "llvm/MC/MCObjectWriter.h"
26 #include "llvm/MC/MCRegisterInfo.h"
28 #include "llvm/MC/MCSymbol.h"
33 
34 using namespace llvm;
35 
36 #define GET_INSTRINFO_MC_DESC
37 #include "MipsGenInstrInfo.inc"
38 
39 #define GET_SUBTARGETINFO_MC_DESC
40 #include "MipsGenSubtargetInfo.inc"
41 
42 #define GET_REGINFO_MC_DESC
43 #include "MipsGenRegisterInfo.inc"
44 
45 /// Select the Mips CPU for the given triple and cpu name.
46 /// FIXME: Merge with the copy in MipsSubtarget.cpp
48  if (CPU.empty() || CPU == "generic") {
50  if (TT.isMIPS32())
51  CPU = "mips32r6";
52  else
53  CPU = "mips64r6";
54  } else {
55  if (TT.isMIPS32())
56  CPU = "mips32";
57  else
58  CPU = "mips64";
59  }
60  }
61  return CPU;
62 }
63 
65  MCInstrInfo *X = new MCInstrInfo();
66  InitMipsMCInstrInfo(X);
67  return X;
68 }
69 
72  InitMipsMCRegisterInfo(X, Mips::RA);
73  return X;
74 }
75 
77  StringRef CPU, StringRef FS) {
78  CPU = MIPS_MC::selectMipsCPU(TT, CPU);
79  return createMipsMCSubtargetInfoImpl(TT, CPU, FS);
80 }
81 
83  const Triple &TT) {
84  MCAsmInfo *MAI = new MipsMCAsmInfo(TT);
85 
86  unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
87  MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, SP, 0);
88  MAI->addInitialFrameState(Inst);
89 
90  return MAI;
91 }
92 
94  unsigned SyntaxVariant,
95  const MCAsmInfo &MAI,
96  const MCInstrInfo &MII,
97  const MCRegisterInfo &MRI) {
98  return new MipsInstPrinter(MAI, MII, MRI);
99 }
100 
102  std::unique_ptr<MCAsmBackend> &&MAB,
103  std::unique_ptr<MCObjectWriter> &&OW,
104  std::unique_ptr<MCCodeEmitter> &&Emitter,
105  bool RelaxAll) {
106  MCStreamer *S;
107  if (!T.isOSNaCl())
108  S = createMipsELFStreamer(Context, std::move(MAB), std::move(OW),
109  std::move(Emitter), RelaxAll);
110  else
111  S = createMipsNaClELFStreamer(Context, std::move(MAB), std::move(OW),
112  std::move(Emitter), RelaxAll);
113  return S;
114 }
115 
118  MCInstPrinter *InstPrint,
119  bool isVerboseAsm) {
120  return new MipsTargetAsmStreamer(S, OS);
121 }
122 
124  return new MipsTargetStreamer(S);
125 }
126 
127 static MCTargetStreamer *
129  return new MipsTargetELFStreamer(S, STI);
130 }
131 
132 namespace {
133 
134 class MipsMCInstrAnalysis : public MCInstrAnalysis {
135 public:
136  MipsMCInstrAnalysis(const MCInstrInfo *Info) : MCInstrAnalysis(Info) {}
137 
138  bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
139  uint64_t &Target) const override {
140  unsigned NumOps = Inst.getNumOperands();
141  if (NumOps == 0)
142  return false;
143  switch (Info->get(Inst.getOpcode()).OpInfo[NumOps - 1].OperandType) {
146  // jal, bal ...
147  Target = Inst.getOperand(NumOps - 1).getImm();
148  return true;
149  case MCOI::OPERAND_PCREL:
150  // b, j, beq ...
151  Target = Addr + Inst.getOperand(NumOps - 1).getImm();
152  return true;
153  default:
154  return false;
155  }
156  }
157 };
158 }
159 
161  return new MipsMCInstrAnalysis(Info);
162 }
163 
164 extern "C" void LLVMInitializeMipsTargetMC() {
167  // Register the MC asm info.
169 
170  // Register the MC instruction info.
172 
173  // Register the MC register info.
175 
176  // Register the elf streamer.
178 
179  // Register the asm target streamer.
181 
184 
185  // Register the MC subtarget info.
187 
188  // Register the MC instruction analyzer.
190 
191  // Register the MCInstPrinter.
193 
196 
197  // Register the asm backend.
199  }
200 
201  // Register the MC Code Emitter
202  for (Target *T : {&getTheMipsTarget(), &getTheMips64Target()})
204 
207 }
static MCInstPrinter * createMipsMCInstPrinter(const Triple &T, unsigned SyntaxVariant, const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
LLVMContext & Context
This class represents lattice values for constants.
Definition: AllocatorList.h:23
formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...
static void RegisterMCInstrAnalysis(Target &T, Target::MCInstrAnalysisCtorFnTy Fn)
RegisterMCInstrAnalysis - Register a MCInstrAnalysis implementation for the given target...
static MCTargetStreamer * createMipsNullTargetStreamer(MCStreamer &S)
Target specific streamer interface.
Definition: MCStreamer.h:83
bool isOSNaCl() const
Tests whether the OS is NaCl (Native Client)
Definition: Triple.h:570
Target & getTheMipselTarget()
static MCRegisterInfo * createMipsMCRegisterInfo(const Triple &TT)
static MCAsmInfo * createMipsMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT)
static void RegisterMCInstPrinter(Target &T, Target::MCInstPrinterCtorTy Fn)
RegisterMCInstPrinter - Register a MCInstPrinter implementation for the given target.
static void RegisterAsmTargetStreamer(Target &T, Target::AsmTargetStreamerCtorTy Fn)
SI optimize exec mask operations pre RA
static MCTargetStreamer * createMipsAsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint, bool isVerboseAsm)
void LLVMInitializeMipsTargetMC()
static MCSubtargetInfo * createMipsMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
MCELFStreamer * createMipsNaClELFStreamer(MCContext &Context, std::unique_ptr< MCAsmBackend > TAB, std::unique_ptr< MCObjectWriter > OW, std::unique_ptr< MCCodeEmitter > Emitter, bool RelaxAll)
LLVM_NODISCARD bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:126
MCAsmBackend * createMipsAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
Context object for machine code objects.
Definition: MCContext.h:62
SubArchType getSubArch() const
getSubArch - get the parsed subarchitecture type for this triple.
Definition: Triple.h:292
void addInitialFrameState(const MCCFIInstruction &Inst)
Definition: MCAsmInfo.h:600
Target & getTheMips64Target()
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:158
Analysis containing CSE Info
Definition: CSEInfo.cpp:20
MCCodeEmitter * createMipsMCCodeEmitterEL(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:55
int64_t getImm() const
Definition: MCInst.h:75
static MCTargetStreamer * createMipsObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
static void RegisterMCAsmBackend(Target &T, Target::MCAsmBackendCtorTy Fn)
RegisterMCAsmBackend - Register a MCAsmBackend implementation for the given target.
Streaming machine code generation interface.
Definition: MCStreamer.h:188
static MCInstrInfo * createMipsMCInstrInfo()
Target & getTheMips64elTarget()
unsigned const MachineRegisterInfo * MRI
static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it...
Definition: MCDwarf.h:460
static MCStreamer * createMCStreamer(const Triple &T, MCContext &Context, std::unique_ptr< MCAsmBackend > &&MAB, std::unique_ptr< MCObjectWriter > &&OW, std::unique_ptr< MCCodeEmitter > &&Emitter, bool RelaxAll)
static MCInstrAnalysis * createMipsMCInstrAnalysis(const MCInstrInfo *Info)
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:23
StringRef selectMipsCPU(const Triple &TT, StringRef CPU)
Select the Mips CPU for the given triple and cpu name.
unsigned getNumOperands() const
Definition: MCInst.h:181
static void RegisterMCSubtargetInfo(Target &T, Target::MCSubtargetInfoCtorFnTy Fn)
RegisterMCSubtargetInfo - Register a MCSubtargetInfo implementation for the given target...
static void RegisterObjectTargetStreamer(Target &T, Target::ObjectTargetStreamerCtorTy Fn)
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:43
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:179
static void RegisterMCCodeEmitter(Target &T, Target::MCCodeEmitterCtorTy Fn)
RegisterMCCodeEmitter - Register a MCCodeEmitter implementation for the given target.
static void RegisterMCRegInfo(Target &T, Target::MCRegInfoCtorFnTy Fn)
RegisterMCRegInfo - Register a MCRegisterInfo implementation for the given target.
Target - Wrapper for Target specific information.
MCCodeEmitter * createMipsMCCodeEmitterEB(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
Target & getTheMipsTarget()
bool isMIPS32() const
Tests whether the target is MIPS 32-bit (little and big endian).
Definition: Triple.h:678
OperandType
Operands are tagged with one of the values of this enum.
Definition: MCInstrDesc.h:43
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:39
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:44
static void RegisterMCInstrInfo(Target &T, Target::MCInstrInfoCtorFnTy Fn)
RegisterMCInstrInfo - Register a MCInstrInfo implementation for the given target. ...
Generic base class for all target subtargets.
uint32_t Size
Definition: Profile.cpp:46
MCELFStreamer * createMipsELFStreamer(MCContext &Context, std::unique_ptr< MCAsmBackend > MAB, std::unique_ptr< MCObjectWriter > OW, std::unique_ptr< MCCodeEmitter > Emitter, bool RelaxAll)
static void RegisterELFStreamer(Target &T, Target::ELFStreamerCtorTy Fn)
RegisterMCAsmInfoFn - Helper template for registering a target assembly info implementation.
static void RegisterNullTargetStreamer(Target &T, Target::NullTargetStreamerCtorTy Fn)
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
unsigned getOpcode() const
Definition: MCInst.h:171