LLVM  9.0.0svn
Functions
llvm::BitmaskEnumDetail Namespace Reference

Functions

template<typename E >
std::underlying_type< E >::type Mask ()
 Get a bitmask with 1s in all places up to the high-order bit of E's largest value. More...
 
template<typename E >
std::underlying_type< E >::type Underlying (E Val)
 Check that Val is in range for E, and return Val cast to E's underlying type. More...
 
template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type>
E operator~ (E Val)
 
template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type>
E operator| (E LHS, E RHS)
 
template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type>
E operator & (E LHS, E RHS)
 
template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type>
E operator^ (E LHS, E RHS)
 
template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type>
Eoperator|= (E &LHS, E RHS)
 
template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type>
Eoperator &= (E &LHS, E RHS)
 
template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type>
Eoperator^= (E &LHS, E RHS)
 

Function Documentation

◆ Mask()

template<typename E >
std::underlying_type<E>::type llvm::BitmaskEnumDetail::Mask ( )

Get a bitmask with 1s in all places up to the high-order bit of E's largest value.

Definition at line 80 of file BitmaskEnum.h.

References llvm::NextPowerOf2().

Referenced by llvm::LiveRegUnits::addRegMasked(), addSegmentsWithValNo(), adjustFixupValue(), adjustForRedundantAnd(), adjustForTestUnderMask(), adjustSubwordCmp(), llvm::MachineFunction::allocateRegMask(), llvm::analyzeArguments(), llvm::MipsAsmBackend::applyFixup(), ApplyX86MaskOn1BitsVec(), llvm::LivePhysRegs::available(), llvm::lowertypetests::BitSetBuilder::build(), buildFromShuffleMostly(), callingConvSupported(), llvm::canConstantFoldCallTo(), canEvaluateShiftedShift(), canEvaluateShuffled(), canEvaluateTruncated(), CC_Lanai32_VarArg(), llvm::ARMTargetLowering::CCAssignFnForReturn(), changeFCMPPredToAArch64CC(), llvm::GlobalObject::classof(), llvm::APInt::clearBit(), llvm::SmallBitVector::clearBitsInMask(), llvm::BitVector::clearBitsInMask(), llvm::SmallBitVector::clearBitsNotInMask(), llvm::BitVector::clearBitsNotInMask(), CollectOpsToWiden(), collectShuffleElements(), combineADDToADDZE(), combineBasicSADPattern(), combineConcatVectorOfExtracts(), combineExtractWithShuffle(), combineHorizontalMinMaxResult(), combineInsertSubvector(), combineLogicBlendIntoConditionalNegate(), combineLogicBlendIntoPBLENDV(), combineMaskedLoad(), combineMaskedStore(), combineShuffleOfConcatUndef(), combineShuffleToVectorExtend(), combineTargetShuffle(), combineTruncationShuffle(), combineX86ShuffleChain(), combineX86ShufflesRecursively(), commitFpm(), llvm::X86InstrInfo::commuteInstructionImpl(), llvm::TargetRegisterInfo::composeSubRegIndexLaneMask(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::ARMTargetLowering::computeKnownBitsForTargetNode(), llvm::X86TargetLowering::computeKnownBitsForTargetNode(), llvm::computeKnownBitsFromRangeMetadata(), llvm::slpvectorizer::BoUpSLP::computeMinimumValueSizes(), llvm::SelectionDAG::ComputeNumSignBits(), computeRecurrenceType(), concatenateTwoVectors(), llvm::ConstantFoldCastOperand(), llvm::MIRPrinter::convert(), llvm::PPCInstrInfo::convertToImmediateForm(), llvm::MachineInstr::copyIRFlags(), llvm::detail::TrailingZerosCounter< T, SizeOfT >::count(), llvm::createBitMaskForGaps(), createBSWAPShuffleMask(), llvm::LiveRangeCalc::createDeadDefs(), llvm::IRBuilderBase::CreateElementUnorderedAtomicMemMove(), llvm::IRBuilder< TargetFolder >::CreateExtractInteger(), llvm::mca::InstrBuilder::createInstruction(), llvm::createInterleaveMask(), createMaskedBitTest(), llvm::IRBuilderBase::CreateMaskedGather(), llvm::IRBuilderBase::CreateMaskedLoad(), llvm::createR600ExpandSpecialInstrsPass(), llvm::MachineOperand::CreateRegLiveOut(), llvm::MachineOperand::CreateRegMask(), llvm::IRBuilder< TargetFolder >::CreateShuffleVector(), llvm::createSIModeRegisterPass(), llvm::mca::ExecuteStage::cycleEnd(), DecodeMSRMask(), decomposeBitTestICmp(), llvm::AArch64InstrInfo::decomposeMachineOperandsTargetFlags(), llvm::ARMBaseInstrInfo::decomposeMachineOperandsTargetFlags(), llvm::PPCInstrInfo::decomposeMachineOperandsTargetFlags(), llvm::mca::DefaultResourceStrategy::DefaultResourceStrategy(), llvm::HexagonDAGToDAGISel::DetectUseSxtw(), llvm::DWARFContext::dump(), eliminateDeadStores(), llvm::SystemZRegisterInfo::eliminateFrameIndex(), llvm::X86AsmPrinter::EmitInstruction(), llvm::XCoreTargetLowering::EmitInstrWithCustomInserter(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::MipsTargetLowering::EmitInstrWithCustomInserter(), llvm::UnwindOpcodeAssembler::EmitRegSave(), encodeBitmaskPerm(), llvm::RuntimeDyldCheckerExprEval::evaluate(), evaluateInDifferentElementOrder(), llvm::VPInterleaveRecipe::execute(), llvm::VPWidenMemoryInstructionRecipe::execute(), expandf64Toi32(), llvm::AArch64_IMM::expandMOVImm(), llvm::AArch64_IMM::expandMOVImmSimple(), ExtractBitFromMaskVector(), extractVector(), llvm::SmallBitVector::find_next_unset(), foldAndOrOfEqualityCmpsWithConstants(), foldAnyOrAllBitsSet(), foldConstantInsEltIntoShuffle(), foldICmpBitCast(), foldICmpShlOne(), foldICmpWithMinMax(), foldICmpWithTruncSignExtendedVal(), foldIdentityExtractShuffle(), foldIdentityPaddedShuffles(), foldLogOpOfMaskedICmps(), foldMaskedShiftToScaledMask(), foldSelectShuffle(), foldSelectShuffleWith1Binop(), llvm::InstCombiner::FoldShiftByConstant(), foldShiftedShift(), foldShuffleWithInsert(), foldSignedTruncationCheck(), foldVecTruncToExtElt(), foreachUnit(), fp16SrcZerosHighBits(), GeneratePerfectShuffle(), GetAEABIUnwindPersonalityName(), getARClassRegisterMask(), getAVX2GatherNode(), getCmpOperandFoldingProfit(), getDemandedSrcElements(), getDwarfRegNum(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), llvm::StackMaps::getFnInfos(), GetFPLibCall(), llvm::DWARFUnitIndex::getFromHash(), getGatherNode(), llvm::ConstantExpr::getInBoundsGetElementPtr(), llvm::X86TargetLowering::getInlineAsmMemConstraint(), getInsertVecEltOpInfo(), getIntrinsicForMaskedAtomicRMWBinOp(), llvm::BasicTTIImplBase< AMDGPUTTIImpl >::getIntrinsicInstrCost(), llvm::ARMTargetLowering::getJumpTableEncoding(), llvm::SuperRegClassIterator::getMask(), llvm::SelectionDAG::getMaskedLoad(), getMopState(), getMOVL(), getNarrowIntrinsic(), getNextRegister(), llvm::SCEVNAryExpr::getNoWrapFlags(), llvm::MipsTargetLowering::getOpndList(), llvm::HvxSelector::getPairVT(), getParentPad(), getPermuteMask(), getPSHUFShuffleMask(), llvm::TargetLowering::getRecipEstimate(), getReductionSDNode(), llvm::RegScavenger::getRegsAvailable(), getScatterNode(), llvm::AArch64RegisterInfo::getSEHRegNum(), getShiftAmountTyForConstant(), llvm::ShuffleVectorInst::getShuffleMask(), getTargetConstantBitsFromNode(), llvm::ARCTargetLowering::getTargetNodeName(), llvm::rdf::PhysicalRegisterInfo::getTRI(), getUniformBase(), getUnpackh(), getUnpackl(), getUsefulBitsFromBFM(), getUsefulBitsFromOrWithShiftedReg(), getX86MaskVec(), group2Shuffle(), llvm::MCCodePadder::handleBasicBlockStart(), llvm::MCCodePadder::handleInstructionBegin(), HasConditionalBranch(), INITIALIZE_PASS(), llvm::mca::initializeUsedResources(), insertDAGNode(), insertInteger(), insertVector(), inversePermutation(), isBroadcastShuffle(), isCDisp8(), isConstantIntVector(), isCopy(), isCrossCopy(), llvm::HexagonTargetLowering::isCtlzFast(), isDefInSubRange(), llvm::ARMBaseRegisterInfo::isFrameOffsetLegal(), isIdentityValue(), llvm::ShuffleVectorInst::isIdentityWithPadding(), llvm::isKnownNonEqual(), llvm::AArch64TargetLowering::isMaskAndCmp0FoldingBeneficial(), isMemOPCandidate(), isMulPowOf2(), isOpcWithIntImmediate(), llvm::PPCInstrInfo::isProfitableToUnpredicate(), isSETCCorConvertedSETCC(), IsSingleInstrConstant(), llvm::isSplatValue(), llvm::SelectionDAG::isSplatValue(), isStackPtrRelative(), llvm::ShuffleVectorInst::isValidOperands(), llvm::SystemZVectorConstantInfo::isVectorConstantLegal(), isVectorPredicable(), LowerAsSplatVectorLoad(), llvm::HexagonTargetLowering::LowerBITCAST(), LowerBITREVERSE_XOP(), LowerBUILD_VECTORAsVariablePermute(), llvm::AArch64CallLowering::lowerCall(), llvm::HexagonTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), LowerEXTEND_VECTOR_INREG(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::AMDGPUTargetLowering::LowerFROUND64(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::AArch64TargetLowering::lowerInterleavedStore(), llvm::ARMTargetLowering::lowerInterleavedStore(), llvm::X86TargetLowering::lowerInterleavedStore(), LowerMGATHER(), LowerMLOAD(), lowerMSABitClearImm(), LowerMSCATTER(), LowerMSTORE(), lowerShuffleAsLanePermuteAndRepeatedMask(), lowerShuffleAsShift(), lowerV16I8Shuffle(), lowerV8I16GeneralSingleInputShuffle(), llvm::HexagonTargetLowering::LowerVECTOR_SHUFFLE(), LowerVectorINT_TO_FP(), llvm::SCEVWrapPredicate::maskFlags(), llvm::ScalarEvolution::maskFlags(), llvm::maskIsAllOneOrUndef(), llvm::maskIsAllZeroOrUndef(), maskMatters(), llvm::DwarfExpression::maskSubRegister(), matchLogicBlend(), matchPairwiseShuffleMask(), matchRotate(), matchVectorSplittingReduction(), mayTailCallThisCC(), mayUseP9Setb(), numVectorEltsOrZero(), llvm::ShuffleVectorInst::operator new(), llvm::BitVector::operator<<=(), llvm::BitVector::operator>>=(), llvm::BitVector::operator[](), llvm::AArch64InstrInfo::optimizeCondBranch(), optimizeLogicalImm(), performANDCombine(), PerformANDCombine(), performAtomicOp(), PerformBFICombine(), llvm::ARMTargetLowering::PerformCMOVToBFICombine(), performConcatVectorsCombine(), PerformORCombineToBFI(), performSelectCombine(), PerformSHLSimplify(), llvm::AMDGPUTargetLowering::performSrlCombine(), PrepareCall(), llvm::LiveIntervals::print(), printBitField(), llvm::ARMInstPrinter::printMSRMaskOperand(), printSwizzleBitmask(), llvm::MachineOperand::printTargetFlags(), llvm::ARMInstPrinter::printThumbITMask(), llvm::ARMInstPrinter::printVPTMask(), llvm::AArch64_AM::processLogicalImmediate(), llvm::SimpleBitstreamCursor::Read(), llvm::AArch64TargetLowering::ReconstructShuffle(), recoverFramePointer(), reduceBuildVecToShuffleWithZero(), replaceAllUsesOfWithIn(), llvm::Thumb2InstrInfo::ReplaceTailWithBranchTo(), llvm::SmallBitVector::reset(), llvm::BitVector::reset(), llvm::mca::ResourceManager::ResourceManager(), llvm::rewriteARMFrameIndex(), llvm::ThumbRegisterInfo::rewriteFrameIndex(), llvm::rewriteT2FrameIndex(), scalarizeExtractedBinop(), scalarizeMaskedCompressStore(), scalarizeMaskedExpandLoad(), scalarizeMaskedGather(), scalarizeMaskedLoad(), scalarizeMaskedScatter(), scalarizeMaskedStore(), selectI64Imm(), llvm::HvxSelector::selectShuffle(), llvm::HexagonDAGToDAGISel::SelectVAlignAddr(), llvm::SmallBitVector::set(), llvm::BitVector::set(), llvm::APInt::setBit(), llvm::SmallBitVector::setBitsInMask(), llvm::BitVector::setBitsInMask(), llvm::SmallBitVector::setBitsNotInMask(), llvm::BitVector::setBitsNotInMask(), llvm::mca::ResourceManager::setCustomStrategy(), llvm::MachineInstr::setFlags(), llvm::Function::setIsMaterializable(), llvm::DwarfExpression::setSubRegisterPiece(), setTargetShuffleZeroElements(), llvm::RISCVTargetLowering::shouldExpandShift(), shouldMergeGEPs(), ShrinkLoadReplaceStoreWithStore(), SimplifyAndInst(), llvm::TargetLowering::SimplifyDemandedBits(), simplifyDivRem(), simplifySelectWithFakeICmpEq(), simplifyShuffleOfShuffle(), simplifyX86MaskedLoad(), simplifyX86MaskedStore(), Status::Status(), stripModuloOnShift(), stripTruncAndExt(), llvm::ARMTargetLowering::targetShrinkDemandedConstant(), toString(), tryCombineCRC32(), llvm::LegalizationArtifactCombiner::tryCombineZExt(), tryFormConcatFromShuffle(), llvm::AArch64_IMM::trySequenceOfOnes(), llvm::VPRecipeBuilder::tryToInterleaveMemory(), llvm::VPRecipeBuilder::tryToWidenMemory(), TypeSizeToSizeIndex(), unpackF64OnRV32DSoftABI(), llvm::MachineInstr::untieRegOperand(), llvm::AArch64_IMM::updateImm(), upgradeMaskedCompare(), upgradeMaskedMove(), UpgradeMaskToInt(), upgradePMULDQ(), UpgradeX86AddSubSatIntrinsics(), upgradeX86ConcatShift(), upgradeX86Rotate(), llvm::mca::DefaultResourceStrategy::used(), vectorizeExtractedCast(), llvm::InnerLoopVectorizer::vectorizeInterleaveGroup(), llvm::InnerLoopVectorizer::vectorizeMemoryInstruction(), llvm::LiveInterval::verify(), verifyAddrSpace(), llvm::InstCombiner::visitAdd(), llvm::InstCombiner::visitInsertElementInst(), llvm::InstCombiner::visitLShr(), visitORCommutative(), llvm::InstCombiner::visitSDiv(), llvm::InstCombiner::visitShl(), llvm::InstCombiner::visitShuffleVectorInst(), llvm::InstCombiner::visitSRem(), llvm::LegalizerHelper::widenScalar(), and write32AArch64Addr().

◆ operator &()

template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type>
E llvm::BitmaskEnumDetail::operator& ( E  LHS,
E  RHS 
)

Definition at line 111 of file BitmaskEnum.h.

References E, and Underlying().

◆ operator &=()

template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type>
E& llvm::BitmaskEnumDetail::operator&= ( E LHS,
E  RHS 
)

Definition at line 133 of file BitmaskEnum.h.

References E.

◆ operator^()

template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type>
E llvm::BitmaskEnumDetail::operator^ ( E  LHS,
E  RHS 
)

Definition at line 117 of file BitmaskEnum.h.

References E, and Underlying().

◆ operator^=()

template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type>
E& llvm::BitmaskEnumDetail::operator^= ( E LHS,
E  RHS 
)

Definition at line 140 of file BitmaskEnum.h.

References llvm::LLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE().

◆ operator|()

template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type>
E llvm::BitmaskEnumDetail::operator| ( E  LHS,
E  RHS 
)

Definition at line 105 of file BitmaskEnum.h.

References E, and Underlying().

◆ operator|=()

template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type>
E& llvm::BitmaskEnumDetail::operator|= ( E LHS,
E  RHS 
)

Definition at line 126 of file BitmaskEnum.h.

References E.

◆ operator~()

template<typename E , typename = typename std::enable_if<is_bitmask_enum<E>::value>::type>
E llvm::BitmaskEnumDetail::operator~ ( E  Val)

Definition at line 99 of file BitmaskEnum.h.

References E, and Underlying().

◆ Underlying()

template<typename E >
std::underlying_type<E>::type llvm::BitmaskEnumDetail::Underlying ( E  Val)