LLVM 20.0.0git
ARMWinCOFFObjectWriter.cpp
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1//===-- ARMWinCOFFObjectWriter.cpp - ARM Windows COFF Object Writer -- C++ -==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
10#include "llvm/ADT/Twine.h"
13#include "llvm/MC/MCContext.h"
14#include "llvm/MC/MCExpr.h"
15#include "llvm/MC/MCFixup.h"
18#include "llvm/MC/MCValue.h"
22
23using namespace llvm;
24
25namespace {
26
27class ARMWinCOFFObjectWriter : public MCWinCOFFObjectTargetWriter {
28public:
29 ARMWinCOFFObjectWriter()
31 }
32
33 ~ARMWinCOFFObjectWriter() override = default;
34
35 unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
36 const MCFixup &Fixup, bool IsCrossSection,
37 const MCAsmBackend &MAB) const override;
38
39 bool recordRelocation(const MCFixup &) const override;
40};
41
42} // end anonymous namespace
43
44unsigned ARMWinCOFFObjectWriter::getRelocType(MCContext &Ctx,
45 const MCValue &Target,
46 const MCFixup &Fixup,
47 bool IsCrossSection,
48 const MCAsmBackend &MAB) const {
50 Target.isAbsolute() ? MCSymbolRefExpr::VK_None : Target.getSymA()->getKind();
51
52 unsigned FixupKind = Fixup.getKind();
53 if (IsCrossSection) {
54 if (FixupKind != FK_Data_4) {
55 Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression");
57 }
59 }
60
61
62 switch (FixupKind) {
63 default: {
64 Ctx.reportError(Fixup.getLoc(), "unsupported relocation type");
66 }
67 case FK_Data_4:
68 switch (Modifier) {
73 default:
75 }
76 case FK_PCRel_4:
78 case FK_SecRel_2:
80 case FK_SecRel_4:
92 }
93}
94
95bool ARMWinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const {
96 return static_cast<unsigned>(Fixup.getKind()) != ARM::fixup_t2_movt_hi16;
97}
98
99namespace llvm {
100
101std::unique_ptr<MCObjectTargetWriter>
103 return std::make_unique<ARMWinCOFFObjectWriter>();
104}
105
106} // end namespace llvm
PowerPC TLS Dynamic Call Fixup
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:42
Context object for machine code objects.
Definition: MCContext.h:83
void reportError(SMLoc L, const Twine &Msg)
Definition: MCContext.cpp:1068
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:71
This represents an "assembler immediate".
Definition: MCValue.h:36
virtual bool recordRelocation(const MCFixup &) const
virtual unsigned getRelocType(MCContext &Ctx, const MCValue &Target, const MCFixup &Fixup, bool IsCrossSection, const MCAsmBackend &MAB) const =0
Target - Wrapper for Target specific information.
@ fixup_t2_movt_hi16
Definition: ARMFixupKinds.h:99
@ fixup_arm_thumb_blx
Definition: ARMFixupKinds.h:84
@ fixup_t2_uncondbranch
Definition: ARMFixupKinds.h:57
@ fixup_t2_condbranch
Definition: ARMFixupKinds.h:54
@ fixup_arm_thumb_bl
Definition: ARMFixupKinds.h:81
@ fixup_t2_movw_lo16
@ IMAGE_FILE_MACHINE_ARMNT
Definition: COFF.h:99
@ IMAGE_REL_ARM_BRANCH20T
Definition: COFF.h:393
@ IMAGE_REL_ARM_ADDR32NB
Definition: COFF.h:382
@ IMAGE_REL_ARM_ADDR32
Definition: COFF.h:381
@ IMAGE_REL_ARM_MOV32T
Definition: COFF.h:392
@ IMAGE_REL_ARM_BRANCH24T
Definition: COFF.h:394
@ IMAGE_REL_ARM_ABSOLUTE
Definition: COFF.h:380
@ IMAGE_REL_ARM_REL32
Definition: COFF.h:388
@ IMAGE_REL_ARM_BLX23T
Definition: COFF.h:395
@ IMAGE_REL_ARM_SECREL
Definition: COFF.h:390
@ IMAGE_REL_ARM_SECTION
Definition: COFF.h:389
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ FK_PCRel_4
A four-byte pc relative fixup.
Definition: MCFixup.h:30
@ FK_SecRel_2
A two-byte section relative fixup.
Definition: MCFixup.h:41
@ FK_Data_4
A four-byte fixup.
Definition: MCFixup.h:25
@ FK_SecRel_4
A four-byte section relative fixup.
Definition: MCFixup.h:42
std::unique_ptr< MCObjectTargetWriter > createARMWinCOFFObjectWriter()
Construct an ARM PE/COFF object writer.