15#ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_R600MCTARGETDESC_H
16#define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_R600MCTARGETDESC_H
31#define GET_REGINFO_ENUM
32#include "R600GenRegisterInfo.inc"
34#define GET_INSTRINFO_ENUM
35#define GET_INSTRINFO_OPERAND_ENUM
36#define GET_INSTRINFO_SCHED_ENUM
37#define GET_INSTRINFO_MC_HELPER_DECLS
38#include "R600GenInstrInfo.inc"
40#define GET_SUBTARGETINFO_ENUM
41#include "R600GenSubtargetInfo.inc"
This is an optimization pass for GlobalISel generic memory operations.
MCCodeEmitter * createR600MCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
MCInstrInfo * createR600MCInstrInfo()