Interface to description of machine instruction set. More...
#include "llvm/MC/MCInstrInfo.h"
Public Types | |
| using | ComplexDeprecationPredicate = bool(*)(MCInst &, const MCSubtargetInfo &, std::string &) |
Public Member Functions | |
| void | InitMCInstrInfo (const MCInstrDesc *D, const unsigned *NI, const char *ND, const uint8_t *DF, const ComplexDeprecationPredicate *CDI, unsigned NO) |
| Initialize MCInstrInfo, called by TableGen auto-generated routines. | |
| unsigned | getNumOpcodes () const |
| const MCInstrDesc & | get (unsigned Opcode) const |
| Return the machine instruction descriptor that corresponds to the specified instruction opcode. | |
| StringRef | getName (unsigned Opcode) const |
| Returns the name for the instructions with the given opcode. | |
| bool | getDeprecatedInfo (MCInst &MI, const MCSubtargetInfo &STI, std::string &Info) const |
Returns true if a certain instruction is deprecated and if so returns the reason in Info. | |
Detailed Description
Interface to description of machine instruction set.
Definition at line 26 of file MCInstrInfo.h.
Member Typedef Documentation
◆ ComplexDeprecationPredicate
| using llvm::MCInstrInfo::ComplexDeprecationPredicate = bool (*)(MCInst &, const MCSubtargetInfo &, std::string &) |
Definition at line 28 of file MCInstrInfo.h.
Member Function Documentation
◆ get()
|
inline |
Return the machine instruction descriptor that corresponds to the specified instruction opcode.
Definition at line 63 of file MCInstrInfo.h.
References assert().
Referenced by llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::CombinerHelper::applyCombineMulToShl(), llvm::CombinerHelper::applyFunnelShiftToRotate(), llvm::CombinerHelper::applyNotCmp(), llvm::CombinerHelper::applyXorOfAndWithSameReg(), llvm::MachineIRBuilder::buildInstrNoInsert(), llvm::X86_MC::X86MCInstrAnalysis::clearsSuperRegisters(), llvm::MCSchedModel::computeInstrLatency(), llvm::TargetSchedModel::computeInstrLatency(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), llvm::TargetSchedModel::computeReciprocalThroughput(), llvm::FastISel::constrainOperandRegClass(), llvm::SwiftErrorValueTracking::createEntriesInEntryBlock(), llvm::mca::InstrBuilder::createInstruction(), llvm::PeelingModuloScheduleExpander::CreateLCSSAExitingBlock(), llvm::TargetInstrInfo::createPHIDestinationCopy(), llvm::TargetInstrInfo::createPHISourceCopy(), DecodePredicateOperand(), llvm::InstrEmitter::EmitDbgInstrRef(), llvm::InstrEmitter::EmitDbgLabel(), llvm::InstrEmitter::EmitDbgNoLocation(), llvm::InstrEmitter::EmitDbgValueFromSingleOp(), llvm::InstrEmitter::EmitDbgValueList(), llvm::M68kFrameLowering::emitEpilogue(), LiveDebugValues::MLocTracker::emitLoc(), TransferTracker::emitMOLoc(), llvm::M68kFrameLowering::emitPrologue(), llvm::NVPTXFrameLowering::emitPrologue(), llvm::M68kFrameLowering::emitSPUpdate(), llvm::CSKYMCCodeEmitter::encodeInstruction(), llvm::MipsMCCodeEmitter::encodeInstruction(), llvm::MSP430MCCodeEmitter::encodeInstruction(), llvm::X86_MC::X86MCInstrAnalysis::evaluateBranch(), llvm::X86_MC::X86MCInstrAnalysis::evaluateMemoryOperandAddress(), expandPseudoVFMK(), llvm::FastISel::fastEmitInst_(), llvm::FastISel::fastEmitInst_extractsubreg(), llvm::FastISel::fastEmitInst_f(), llvm::FastISel::fastEmitInst_i(), llvm::FastISel::fastEmitInst_r(), llvm::FastISel::fastEmitInst_ri(), llvm::FastISel::fastEmitInst_rii(), llvm::FastISel::fastEmitInst_rr(), llvm::FastISel::fastEmitInst_rri(), llvm::FastISel::fastEmitInst_rrr(), getCondFromBranch(), llvm::HexagonMCInstrInfo::getDesc(), llvm::LLVMDisasmContext::getInstrInfo(), llvm::TargetInstrInfo::getInstrLatency(), llvm::PPCMCCodeEmitter::getInstSizeInBytes(), getItineraryLatency(), getLatency(), llvm::PPCMCCodeEmitter::getMachineOpValue(), llvm::AMDGPUDisassembler::getMCII(), llvm::X86_MC::X86MCInstrAnalysis::getMemoryOperandRelocationOffset(), llvm::TargetInstrInfo::getOperandLatency(), llvm::SPIRVGlobalRegistry::getOrCreateSPIRVPointerType(), llvm::MCSchedModel::getReciprocalThroughput(), llvm::mca::InstrumentManager::getSchedClassID(), llvm::mca::RISCVInstrumentManager::getSchedClassID(), llvm::HexagonMCInstrInfo::getType(), llvm::AMDGPU::getVOPDInstInfo(), llvm::FastISel::handleDbgInfo(), hasType(), llvm::ResourcePriorityQueue::initNumRegDefsLeft(), llvm::ErrataWorkaround::insertNop(), llvm::MCInstrAnalysis::isBranch(), llvm::MCInstrAnalysis::isCall(), llvm::MCInstrAnalysis::isConditionalBranch(), llvm::ARM_MC::isCPSRDefined(), llvm::MCInstrAnalysis::isIndirectBranch(), llvm::PPCMCCodeEmitter::isNoTOCCallInstr(), isPCRel32Branch(), llvm::ARM_MC::isPredicated(), isPrefix(), llvm::PPCMCCodeEmitter::isPrefixedInstruction(), llvm::ResourcePriorityQueue::isResourceAvailable(), llvm::MCInstrAnalysis::isReturn(), isRIPRelative(), llvm::HexagonMCInstrInfo::isSolo(), llvm::MCInstrAnalysis::isTerminator(), llvm::MCInstrAnalysis::isUnconditionalBranch(), llvm::TargetInstrInfo::lowerCopy(), llvm::FastISel::lowerDbgDeclare(), llvm::FastISel::lowerDbgValue(), llvm::LegalizerHelper::lowerVectorReduction(), llvm::CombinerHelper::matchMulOBy2(), llvm::MCInstrAnalysis::mayAffectControlFlow(), llvm::SelectionDAGISel::mayRaiseFPException(), llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), llvm::SPIRVInstPrinter::printInst(), llvm::WebAssemblyInstPrinter::printInst(), llvm::X86InstPrinterCommon::printInstFlags(), printMasking(), llvm::SPIRVInstPrinter::printOpDecorate(), llvm::ARMInstPrinter::printOperand(), llvm::PPCInstPrinter::printOperand(), llvm::CSKYInstPrinter::printOperand(), llvm::WebAssemblyInstPrinter::printOperand(), llvm::SPIRVInstPrinter::printOpExtInst(), llvm::X86ATTInstPrinter::printVecCompareInstr(), llvm::X86IntelInstPrinter::printVecCompareInstr(), llvm::SwiftErrorValueTracking::propagateVRegs(), llvm::CombinerHelper::replaceOpcodeWith(), llvm::ResourcePriorityQueue::reserveResources(), llvm::M68kFrameLowering::restoreCalleeSavedRegisters(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::FastISel::selectCall(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::FastISel::selectFreeze(), llvm::FastISel::selectIntrinsicCall(), llvm::FastISel::selectPatchpoint(), llvm::FastISel::selectStackmap(), llvm::FastISel::selectXRayCustomEvent(), llvm::FastISel::selectXRayTypedEvent(), llvm::M68kFrameLowering::spillCalleeSavedRegisters(), llvm::ResourcePriorityQueue::SUSchedulingCost(), llvm::WebAssemblyAsmTypeCheck::typeCheck(), llvm::LegalizerInfo::verify(), and llvm::LegalizerHelper::widenScalar().
◆ getDeprecatedInfo()
| bool MCInstrInfo::getDeprecatedInfo | ( | MCInst & | MI, |
| const MCSubtargetInfo & | STI, | ||
| std::string & | Info | ||
| ) | const |
Returns true if a certain instruction is deprecated and if so returns the reason in Info.
Definition at line 15 of file MCInstrInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), Info, and MI.
◆ getName()
Returns the name for the instructions with the given opcode.
Definition at line 70 of file MCInstrInfo.h.
References assert().
Referenced by createAtomicLibcall(), llvm::createMemLibcall(), llvm::fuseInstructionPair(), getInstructionID(), llvm::HexagonMCInstrInfo::getName(), llvm::MCInstPrinter::getOpcodeName(), llvm::mca::RISCVInstrumentManager::getSchedClassID(), and llvm::LegalizerInfo::verify().
◆ getNumOpcodes()
|
inline |
Definition at line 59 of file MCInstrInfo.h.
◆ InitMCInstrInfo()
|
inline |
Initialize MCInstrInfo, called by TableGen auto-generated routines.
DO NOT USE.
Definition at line 48 of file MCInstrInfo.h.
The documentation for this class was generated from the following files:
- include/llvm/MC/MCInstrInfo.h
- lib/MC/MCInstrInfo.cpp
