38 TII(*STI.getInstrInfo()),
TRI(STI.getRegisterInfo()) {
49 TRI->hasStackRealignment(MF);
61 (
hasFP(MF) && !TRI->hasStackRealignment(MF)) ||
85 else if (TRI->hasStackRealignment(MF))
97 bool HasFP =
hasFP(MF);
101 assert(HasFP &&
"VLAs and dynamic stack realign, but no FP?!");
110 if (TRI->hasStackRealignment(MF)) {
128 if (TailCallReturnAddrDelta < 0)
129 Offset -= TailCallReturnAddrDelta;
149 switch (
MBBI->getOpcode()) {
152 case TargetOpcode::PATCHABLE_RET:
156 for (
unsigned i = 0, e =
MBBI->getNumOperands(); i != e; ++i) {
167 for (
auto CS : AvailableRegs)
179 return RegMask.PhysReg == Reg;
184M68kFrameLowering::calculateMaxStackAlign(
const MachineFunction &MF)
const {
190 MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign;
191 else if (MaxAlign < SlotSize)
202 unsigned AndOp = M68k::AND32di;
203 unsigned MovOp = M68k::MOV32rr;
208 unsigned Tmp = M68k::D0;
220 MI->getOperand(3).setIsDead();
231 unsigned Opcode =
I->getOpcode();
234 uint64_t Amount = !ReserveCallFrame ?
I->getOperand(0).getImm() : 0;
235 uint64_t InternalAmt = (IsDestroy && Amount) ?
I->getOperand(1).getImm() : 0;
238 if (!ReserveCallFrame) {
247 Amount =
alignTo(Amount, StackAlign);
260 if (HasDwarfEHHandlers && !IsDestroy &&
271 Amount -= InternalAmt;
281 int64_t StackAdjustment = IsDestroy ? Amount : -Amount;
282 int64_t CfaAdjustment = -StackAdjustment;
284 if (StackAdjustment) {
291 if (StackAdjustment) {
292 BuildStackAdjustment(
MBB,
I,
DL, StackAdjustment,
false);
316 if (IsDestroy && InternalAmt) {
325 while (CI !=
B && !std::prev(CI)->isCall())
327 BuildStackAdjustment(
MBB, CI,
DL, -InternalAmt,
false);
337 int64_t NumBytes,
bool InEpilogue)
const {
338 bool IsSub = NumBytes < 0;
356 unsigned Opc = M68k::MOV32ri;
358 Opc = IsSub ? M68k::SUB32ar : M68k::ADD32ar;
363 MI->getOperand(3).setIsDead();
372 MBB,
MBBI,
DL, IsSub ? -ThisVal : ThisVal, InEpilogue);
384 bool MergeWithPrevious)
const {
391 MergeWithPrevious ? nullptr : std::next(
MBBI);
392 unsigned Opc = PI->getOpcode();
395 if (!MergeWithPrevious && NI !=
MBB.
end() &&
396 NI->getOpcode() == TargetOpcode::CFI_INSTRUCTION) {
401 if (Opc == M68k::ADD32ai && PI->getOperand(0).getReg() == StackPtr) {
402 assert(PI->getOperand(1).getReg() == StackPtr);
403 Offset += PI->getOperand(2).getImm();
405 if (!MergeWithPrevious)
407 }
else if (Opc == M68k::SUB32ai && PI->getOperand(0).getReg() == StackPtr) {
408 assert(PI->getOperand(1).getReg() == StackPtr);
409 Offset -= PI->getOperand(2).getImm();
411 if (!MergeWithPrevious)
421 assert(
Offset != 0 &&
"zero offset stack adjustment requested");
427 unsigned Opc = IsSub ? M68k::SUB32ai : M68k::ADD32ai;
434 MI->getOperand(3).setIsDead();
448void M68kFrameLowering::emitPrologueCalleeSavedFrameMoves(
461 for (
const auto &
I : CSI) {
465 unsigned DwarfReg =
MRI->getDwarfRegNum(Reg,
true);
474 "MF used frame lowering for wrong subtarget");
479 uint64_t MaxAlign = calculateMaxStackAlign(MF);
481 bool HasFP =
hasFP(MF);
484 const unsigned MachineFramePtr =
FramePtr;
494 if (TailCallReturnAddrDelta < 0) {
496 TailCallReturnAddrDelta);
502 if (TailCallReturnAddrDelta < 0) {
503 BuildStackAdjustment(
MBB,
MBBI,
DL, TailCallReturnAddrDelta,
523 int stackGrowth = -SlotSize;
527 uint64_t FrameSize = StackSize - SlotSize;
531 FrameSize += SlotSize;
536 if (TRI->hasStackRealignment(MF))
537 NumBytes =
alignTo(NumBytes, MaxAlign);
557 int DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr,
true);
558 assert(DwarfFramePtr > 0);
567 unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr,
true);
575 EveryMBB.addLiveIn(MachineFramePtr);
581 bool PushedRegs =
false;
585 MBBI->getOpcode() == M68k::PUSH32r) {
589 if (!HasFP && NeedsDwarfCFI) {
601 if (TRI->hasStackRealignment(MF)) {
602 assert(HasFP &&
"There should be a frame pointer if stack is realigned.");
603 BuildStackAlignAND(
MBB,
MBBI,
DL, StackPtr, MaxAlign);
615 unsigned SPOrEstablisher = StackPtr;
629 unsigned Opm = M68k::MOV32ja;
638 if (((!HasFP && NumBytes) || PushedRegs) && NeedsDwarfCFI) {
640 if (!HasFP && NumBytes) {
650 emitPrologueCalleeSavedFrameMoves(
MBB,
MBBI,
DL);
663 return Opc == M68k::TCRETURNj || Opc == M68k::TCRETURNq;
671 std::optional<unsigned> RetOpcode;
673 RetOpcode =
MBBI->getOpcode();
678 unsigned MachineFramePtr =
FramePtr;
682 uint64_t MaxAlign = calculateMaxStackAlign(MF);
688 uint64_t FrameSize = StackSize - SlotSize;
689 NumBytes = FrameSize - CSSize;
693 if (TRI->hasStackRealignment(MF))
694 NumBytes =
alignTo(FrameSize, MaxAlign);
697 NumBytes = StackSize - CSSize;
703 unsigned Opc = PI->getOpcode();
706 Opc != M68k::DBG_VALUE && !PI->isTerminator())
726 if (TRI->hasStackRealignment(MF))
733 if (LEAAmount != 0) {
734 unsigned Opc = M68k::LEA32p;
745 }
else if (
hasFP(MF)) {
749 }
else if (NumBytes) {
758 assert(
Offset >= 0 &&
"TCDelta should never be positive");
779 if (TailCallReturnAddrDelta < 0) {
790 TailCallReturnAddrDelta - SlotSize,
true);
801 std::vector<CalleeSavedInfo> &CSI)
const {
809 SpillSlotOffset -= SlotSize;
816 for (
unsigned i = 0, e = CSI.size(); i < e; ++i) {
817 if (
TRI->regsOverlap(CSI[i].getReg(), FPReg)) {
818 CSI.erase(CSI.begin() + i);
836 for (
const auto &
Info : CSI) {
837 FI = std::max(FI,
Info.getFrameIdx());
839 unsigned Shift =
MRI.getSpillRegisterOrder(Reg);
851 for (
const auto &
Info : CSI) {
871 for (
const auto &
Info : CSI) {
872 FI = std::max(FI,
Info.getFrameIdx());
874 unsigned Shift =
MRI.getSpillRegisterOrder(Reg);
883 for (
const auto &
Info : CSI) {
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
Analysis containing CSE Info
Rewrite Partial Register Uses
const HexagonInstrInfo * TII
static bool isRegLiveIn(MachineBasicBlock &MBB, unsigned Reg)
static bool isTailCallOpcode(unsigned Opc)
static unsigned findDeadCallerSavedReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const M68kRegisterInfo *TRI)
Return a caller-saved register that isn't live when it reaches the "return" instruction.
This file contains the M68k declaration of TargetFrameLowering class.
This file exposes functions that may be used with BuildMI from the MachineInstrBuilder....
This file contains the M68k implementation of the TargetInstrInfo class.
This file declares the M68k specific subclass of MachineFunctionInfo.
This file declares the M68k specific subclass of TargetSubtargetInfo.
unsigned const TargetRegisterInfo * TRI
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallSet class.
static const unsigned FramePtr
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Insert epilog code into the function.
void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, int64_t NumBytes, bool InEpilogue) const
Emit a series of instructions to increment / decrement the stack pointer by a constant value.
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
Allows target to override spill slot assignment logic.
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
Issues instruction(s) to spill all callee saved registers and returns true if it isn't possible / pro...
bool hasReservedCallFrame(const MachineFunction &MF) const override
Under normal circumstances, when a frame pointer is not required, we reserve argument space for call ...
M68kFrameLowering(const M68kSubtarget &sti, Align Alignment)
int mergeSPUpdates(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, bool doMergeWithPrevious) const
Check the instruction before/after the passed instruction.
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
This method should return the base register and offset used to reference a frame index location.
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Insert prolog code into the function.
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
Issues instruction(s) to restore all callee saved registers and returns true if it isn't possible / p...
bool hasFP(const MachineFunction &MF) const override
Return true if the specified function should have a dedicated frame pointer register.
bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override
If there is a reserved call frame, the call frame pseudos can be simplified.
bool needsFrameIndexResolution(const MachineFunction &MF) const override
int getRestoreBasePointerOffset() const
unsigned getCalleeSavedFrameSize() const
bool getRestoreBasePointer() const
void setCalleeSavedFrameSize(unsigned bytes)
bool getHasPushSequences() const
int getTCReturnAddrDelta() const
Register getFrameRegister(const MachineFunction &MF) const override
unsigned getBaseRegister() const
bool hasBasePointer(const MachineFunction &MF) const
unsigned getStackRegister() const
unsigned getSlotSize() const
getSlotSize - Stack slot size in bytes.
const M68kRegisterInfo * getRegisterInfo() const override
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_def_cfa_register modifies a rule for computing CFA.
static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int64_t Size, SMLoc Loc={})
A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int64_t Offset, SMLoc Loc={})
.cfi_def_cfa_offset modifies a rule for computing CFA.
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int64_t Adjustment, SMLoc Loc={})
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
const MCRegisterInfo * getRegisterInfo() const
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode.
MCRegAliasIterator enumerates all registers aliasing Reg.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
iterator_range< livein_iterator > liveins() const
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
DebugLoc findDebugLoc(instr_iterator MBBI)
Find the next valid DebugLoc starting at MBBI, skipping any debug instructions.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
bool hasCalls() const
Return true if the current function has any function calls.
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
Align getMaxAlign() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
Align getObjectAlign(int ObjectIdx) const
Return the alignment of the specified stack object.
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
bool hasStackObjects() const
Return true if there are any stack objects in this function.
int CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset, bool IsImmutable=false)
Create a spill slot at a fixed location on the stack.
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
void setOffsetAdjustment(int64_t Adj)
Set the correction for frame offsets.
unsigned addFrameInst(const MCCFIInstruction &Inst)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
bool needsFrameMoves() const
True if this function needs frame moves for debug or exceptions.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
MCContext & getContext() const
bool callsEHReturn() const
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Function & getFunction()
Return the LLVM function that this machine code represents.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
const std::vector< LandingPadInfo > & getLandingPads() const
Return a reference to the landing pad info for the current function.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Register getReg() const
getReg - Returns the register number.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
bool isLiveIn(Register Reg) const
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Wrapper class representing virtual and physical registers.
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
StackOffset holds a fixed and a scalable offset in bytes.
int64_t getFixed() const
Returns the fixed component of the stack.
Information about stack frame layout on the target.
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
unsigned getCallFrameDestroyOpcode() const
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
static const MachineInstrBuilder & addMemOperand(const MachineInstrBuilder &MIB, int FI, int Offset=0)
static const MachineInstrBuilder & addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset=0)
addFrameReference - This function is used to add a reference to the base of an abstract object on the...
static const MachineInstrBuilder & addRegIndirectWithDisp(const MachineInstrBuilder &MIB, Register Reg, bool IsKill, int Offset)
addRegIndirectWithDisp - This function is used to add a memory reference of the form (Offset,...
@ Implicit
Not emitted register (e.g. carry, or temporary result).
@ Kill
The last use of a register.
Reg
All possible values of the reg field in the ModR/M byte.
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
@ DwarfCFI
DWARF-like instruction based exceptions.
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
This struct is a compact representation of a valid (non-zero power of two) alignment.
uint64_t value() const
This is a hole in the type system and should not be abused.
Pair of physical register and lane mask.