MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc objects that represent all of the machine registers that the target has. More...

#include "llvm/MC/MCRegisterInfo.h"

Inheritance diagram for llvm::MCRegisterInfo:

[legend]

Classes
struct	DwarfLLVMRegPair
	DwarfLLVMRegPair - Emitted by tablegen so Dwarf<->LLVM reg mappings can be performed with a binary search. More...

Public Types
using	regclass_iterator = const MCRegisterClass *

Public Member Functions
iterator_range< MCSubRegIterator >	subregs (MCRegister Reg) const
	Return an iterator range over all sub-registers of `Reg`, excluding `Reg`.

iterator_range< MCSubRegIterator >	subregs_inclusive (MCRegister Reg) const
	Return an iterator range over all sub-registers of `Reg`, including `Reg`.

iterator_range< MCSuperRegIterator >	superregs (MCRegister Reg) const
	Return an iterator range over all super-registers of `Reg`, excluding `Reg`.

iterator_range< MCSuperRegIterator >	superregs_inclusive (MCRegister Reg) const
	Return an iterator range over all super-registers of `Reg`, including `Reg`.

detail::concat_range< const MCPhysReg, iterator_range< MCSubRegIterator >, iterator_range< MCSuperRegIterator > >	sub_and_superregs_inclusive (MCRegister Reg) const
	Return an iterator range over all sub- and super-registers of `Reg`, including `Reg`.

iterator_range< MCRegUnitIterator >	regunits (MCRegister Reg) const
	Returns an iterator range over all regunits for `Reg`.

void	InitMCRegisterInfo (const MCRegisterDesc D, unsigned NR, unsigned RA, unsigned PC, const MCRegisterClass C, unsigned NC, const MCPhysReg(RURoots)[2], unsigned NRU, const int16_t DL, const LaneBitmask RUMS, const char Strings, const char ClassStrings, const uint16_t SubIndices, unsigned NumIndices, const uint16_t *RET)
	Initialize MCRegisterInfo, called by TableGen auto-generated routines.

void	mapLLVMRegsToDwarfRegs (const DwarfLLVMRegPair *Map, unsigned Size, bool isEH)
	Used to initialize LLVM register to Dwarf register number mapping.

void	mapDwarfRegsToLLVMRegs (const DwarfLLVMRegPair *Map, unsigned Size, bool isEH)
	Used to initialize Dwarf register to LLVM register number mapping.

void	mapLLVMRegToSEHReg (MCRegister LLVMReg, int SEHReg)
	mapLLVMRegToSEHReg - Used to initialize LLVM register to SEH register number mapping.

void	mapLLVMRegToCVReg (MCRegister LLVMReg, int CVReg)

MCRegister	getRARegister () const
	This method should return the register where the return address can be found.

MCRegister	getProgramCounter () const
	Return the register which is the program counter.

const MCRegisterDesc &	operator[] (MCRegister RegNo) const

const MCRegisterDesc &	get (MCRegister RegNo) const
	Provide a get method, equivalent to [], but more useful with a pointer to this object.

MCRegister	getSubReg (MCRegister Reg, unsigned Idx) const
	Returns the physical register number of sub-register "Index" for physical register RegNo.

MCRegister	getMatchingSuperReg (MCRegister Reg, unsigned SubIdx, const MCRegisterClass *RC) const
	Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg.

unsigned	getSubRegIndex (MCRegister RegNo, MCRegister SubRegNo) const
	For a given register pair, return the sub-register index if the second register is a sub-register of the first.

const char *	getName (MCRegister RegNo) const
	Return the human-readable symbolic target-specific name for the specified physical register.

bool	isConstant (MCRegister RegNo) const
	Returns true if the given register is constant.

unsigned	getNumRegs () const
	Return the number of registers this target has (useful for sizing arrays holding per register information)

unsigned	getNumSubRegIndices () const
	Return the number of sub-register indices understood by the target.

unsigned	getNumRegUnits () const
	Return the number of (native) register units in the target.

int	getDwarfRegNum (MCRegister RegNum, bool isEH) const
	Map a target register to an equivalent dwarf register number.

std::optional< unsigned >	getLLVMRegNum (unsigned RegNum, bool isEH) const
	Map a dwarf register back to a target register.

int	getDwarfRegNumFromDwarfEHRegNum (unsigned RegNum) const
	Map a target EH register number to an equivalent DWARF register number.

int	getSEHRegNum (MCRegister RegNum) const
	Map a target register to an equivalent SEH register number.

int	getCodeViewRegNum (MCRegister RegNum) const
	Map a target register to an equivalent CodeView register number.

regclass_iterator	regclass_begin () const

regclass_iterator	regclass_end () const

iterator_range< regclass_iterator >	regclasses () const

unsigned	getNumRegClasses () const

const MCRegisterClass &	getRegClass (unsigned i) const
	Returns the register class associated with the enumeration value.

const char *	getRegClassName (const MCRegisterClass *Class) const

uint16_t	getEncodingValue (MCRegister RegNo) const
	Returns the encoding for RegNo.

bool	isSubRegister (MCRegister RegA, MCRegister RegB) const
	Returns true if RegB is a sub-register of RegA.

bool	isSuperRegister (MCRegister RegA, MCRegister RegB) const
	Returns true if RegB is a super-register of RegA.

bool	isSubRegisterEq (MCRegister RegA, MCRegister RegB) const
	Returns true if RegB is a sub-register of RegA or if RegB == RegA.

bool	isSuperRegisterEq (MCRegister RegA, MCRegister RegB) const
	Returns true if RegB is a super-register of RegA or if RegB == RegA.

bool	isSuperOrSubRegisterEq (MCRegister RegA, MCRegister RegB) const
	Returns true if RegB is a super-register or sub-register of RegA or if RegB == RegA.

bool	regsOverlap (MCRegister RegA, MCRegister RegB) const
	Returns true if the two registers are equal or alias each other.

Friends
class	MCSubRegIterator

class	MCSubRegIndexIterator

class	MCSuperRegIterator

class	MCRegUnitIterator

class	MCRegUnitMaskIterator

class	MCRegUnitRootIterator

class	MCRegAliasIterator

Detailed Description

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc objects that represent all of the machine registers that the target has.

As such, we simply have to track a pointer to this array so that we can turn register number into a register descriptor.

Note this class is designed to be a base class of TargetRegisterInfo, which is the interface used by codegen. However, specific targets should never specialize this class. MCRegisterInfo should only contain getters to access TableGen generated physical register data. It must not be extended with virtual methods.

Definition at line 146 of file MCRegisterInfo.h.

Member Typedef Documentation

◆ regclass_iterator

using llvm::MCRegisterInfo::regclass_iterator = const MCRegisterClass *

Definition at line 148 of file MCRegisterInfo.h.

Member Function Documentation

◆ get()

const MCRegisterDesc & llvm::MCRegisterInfo::get ( MCRegister RegNo ) const

inline

Provide a get method, equivalent to [], but more useful with a pointer to this object.

Definition at line 369 of file MCRegisterInfo.h.

References operator[]().

Referenced by getName(), getSubReg(), getSubRegIndex(), isConstant(), llvm::MCRegUnitIterator::MCRegUnitIterator(), llvm::MCRegUnitMaskIterator::MCRegUnitMaskIterator(), llvm::MCSubRegIndexIterator::MCSubRegIndexIterator(), llvm::MCSubRegIterator::MCSubRegIterator(), and llvm::MCSuperRegIterator::MCSuperRegIterator().

◆ getCodeViewRegNum()

int MCRegisterInfo::getCodeViewRegNum ( MCRegister RegNum ) const

Map a target register to an equivalent CodeView register number.

Definition at line 196 of file MCRegisterInfo.cpp.

References getName(), getNumRegs(), I, and llvm::report_fatal_error().

◆ getDwarfRegNum()

int MCRegisterInfo::getDwarfRegNum	(	MCRegister	RegNum,
		bool	isEH
	)		const

Map a target register to an equivalent dwarf register number.

Returns -1 if there is no equivalent value. The second parameter allows targets to use different numberings for EH info and debugging info.

Definition at line 144 of file MCRegisterInfo.cpp.

References I, and Size.

Referenced by llvm::DwarfCompileUnit::addLocationAttribute(), and getDwarfRegNumFromDwarfEHRegNum().

◆ getDwarfRegNumFromDwarfEHRegNum()

int MCRegisterInfo::getDwarfRegNumFromDwarfEHRegNum ( unsigned RegNum ) const

Map a target EH register number to an equivalent DWARF register number.

Definition at line 171 of file MCRegisterInfo.cpp.

References getDwarfRegNum(), and getLLVMRegNum().

◆ getEncodingValue()

uint16_t llvm::MCRegisterInfo::getEncodingValue ( MCRegister RegNo ) const

inline

Returns the encoding for RegNo.

Definition at line 461 of file MCRegisterInfo.h.

References assert().

Referenced by llvm::AMDGPUDisassembler::convertTrue16OpSel(), llvm::AMDGPUDisassembler::decodeVOPDDstYOp(), llvm::MipsTargetELFStreamer::emitFrame(), llvm::PPCMCCodeEmitter::get_crbitm_encoding(), llvm::CSKYMCCodeEmitter::getMachineOpValue(), llvm::MipsMCCodeEmitter::getMachineOpValue(), llvm::PPCMCCodeEmitter::getMachineOpValue(), llvm::HexagonMCCodeEmitter::getMachineOpValue(), llvm::MipsMCCodeEmitter::getRegisterListOpValue(), llvm::CSKYMCCodeEmitter::getRegisterSeqOpValue(), llvm::CSKYMCCodeEmitter::getRegSeqImmOpValue(), llvm::PPCMCCodeEmitter::getTLSRegEncoding(), llvm::HexagonAsmPrinter::HexagonProcessInstruction(), llvm::PPCInstPrinter::printOperand(), llvm::ARMInstPrinter::printRegisterList(), llvm::MipsRegInfoRecord::SetPhysRegUsed(), and llvm::AArch64ExternalSymbolizer::tryAddingSymbolicOperand().

◆ getLLVMRegNum()

std::optional< unsigned > MCRegisterInfo::getLLVMRegNum	(	unsigned	RegNum,
		bool	isEH
	)		const

Map a dwarf register back to a target register.

Returns std::nullopt is there is no mapping.

Definition at line 157 of file MCRegisterInfo.cpp.

References I, and Size.

Referenced by llvm::ARMAsmBackendDarwin::generateCompactUnwindEncoding(), and getDwarfRegNumFromDwarfEHRegNum().

◆ getMatchingSuperReg()

MCRegister MCRegisterInfo::getMatchingSuperReg	(	MCRegister	Reg,
		unsigned	SubIdx,
		const MCRegisterClass *	RC
	)		const

Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg.

Definition at line 108 of file MCRegisterInfo.cpp.

References llvm::MCRegisterClass::contains(), getSubReg(), and superregs().

Referenced by llvm::AMDGPUDisassembler::convertMIMGInst(), convertVRToVRMx(), DecodeVRM2RegisterClass(), DecodeVRM4RegisterClass(), DecodeVRM8RegisterClass(), llvm::TargetRegisterInfo::getMatchingSuperReg(), llvm::ARMInstPrinter::printInst(), llvm::AArch64InstPrinter::printRangePrefetchAlias(), and llvm::AArch64InstPrinter::printVectorList().

◆ getName()

const char * llvm::MCRegisterInfo::getName ( MCRegister RegNo ) const

inline

Return the human-readable symbolic target-specific name for the specified physical register.

Definition at line 390 of file MCRegisterInfo.h.

References get(), and llvm::MCRegisterDesc::Name.

Referenced by llvm::mca::RegisterFile::addRegisterWrite(), llvm::mca::RegisterFile::collectWrites(), llvm::mca::RegisterFile::dump(), llvm::ARMAsmBackendDarwin::generateCompactUnwindEncoding(), getCodeViewRegNum(), llvm::HexagonEvaluator::getPhysRegBitWidth(), llvm::TargetRegisterInfo::getRegAsmName(), llvm::MCOperand::print(), llvm::rdf::PhysicalRegisterInfo::print(), llvm::HexagonMCChecker::reportErrorNewValue(), and llvm::HexagonMCChecker::reportErrorRegisters().

◆ getNumRegClasses()

unsigned llvm::MCRegisterInfo::getNumRegClasses ( ) const

inline

Definition at line 445 of file MCRegisterInfo.h.

References regclass_begin(), and regclass_end().

Referenced by getRegClass().

◆ getNumRegs()

unsigned llvm::MCRegisterInfo::getNumRegs ( ) const

inline

Return the number of registers this target has (useful for sizing arrays holding per register information)

Definition at line 399 of file MCRegisterInfo.h.

Referenced by llvm::MachineFunction::allocateRegMask(), llvm::AggressiveAntiDepBreaker::BreakAntiDependencies(), llvm::rdf::DataFlowGraph::build(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::CCState::CCState(), llvm::TargetRegisterInfo::checkAllSuperRegsMarked(), llvm::LiveIntervals::checkRegMaskInterference(), llvm::mca::RegisterFile::dump(), llvm::rdf::PhysicalRegisterInfo::getAliasSet(), llvm::TargetRegisterInfo::getAllocatableSet(), getCodeViewRegNum(), llvm::TargetRegisterInfo::getNumSupportedRegs(), llvm::TargetRegisterInfo::getRegisterCosts(), llvm::RegScavenger::getRegsAvailable(), getSubRegIndex(), llvm::rdf::PhysicalRegisterInfo::getUnits(), llvm::MachineRegisterInfo::MachineRegisterInfo(), LiveDebugValues::MLocTracker::MLocTracker(), llvm::AggressiveAntiDepBreaker::Observe(), llvm::CriticalAntiDepBreaker::Observe(), llvm::rdf::PhysicalRegisterInfo::PhysicalRegisterInfo(), llvm::rdf::PhysicalRegisterInfo::print(), llvm::TargetRegisterInfo::regmaskSubsetEqual(), llvm::InterferenceCache::reinitPhysRegEntries(), llvm::rdf::Liveness::resetKills(), llvm::RegisterClassInfo::runOnMachineFunction(), llvm::ExecutionDomainFix::runOnMachineFunction(), llvm::AggressiveAntiDepBreaker::StartBlock(), and llvm::CriticalAntiDepBreaker::StartBlock().

◆ getNumRegUnits()

unsigned llvm::MCRegisterInfo::getNumRegUnits ( ) const

inline

Return the number of (native) register units in the target.

Register units are numbered from 0 to getNumRegUnits() - 1. They can be accessed through MCRegUnitIterator defined below.

Definition at line 413 of file MCRegisterInfo.h.

Referenced by llvm::LiveRegUnits::addRegsInMask(), llvm::ReachingDefAnalysis::init(), llvm::rdf::PhysicalRegisterInfo::PhysicalRegisterInfo(), llvm::LiveRegUnits::removeRegsNotPreserved(), and llvm::RegisterClassInfo::runOnMachineFunction().

◆ getNumSubRegIndices()

unsigned llvm::MCRegisterInfo::getNumSubRegIndices ( ) const

inline

Return the number of sub-register indices understood by the target.

Index 0 is reserved for the no-op sub-register, while 1 to getNumSubRegIndices() - 1 represent real sub-registers.

Definition at line 406 of file MCRegisterInfo.h.

Referenced by llvm::TargetRegisterInfo::getCoveringSubRegIndexes(), llvm::AVRInstPrinter::getPrettyRegisterName(), getSubReg(), llvm::TargetRegisterInfo::getSubRegIdxOffset(), llvm::TargetRegisterInfo::getSubRegIdxSize(), llvm::TargetRegisterInfo::getSubRegIndexLaneMask(), llvm::TargetRegisterInfo::getSubRegIndexName(), and LiveDebugValues::MLocTracker::MLocTracker().

◆ getProgramCounter()

MCRegister llvm::MCRegisterInfo::getProgramCounter ( ) const

inline

Return the register which is the program counter.

Definition at line 357 of file MCRegisterInfo.h.

Referenced by llvm::MCInstrAnalysis::mayAffectControlFlow(), and llvm::MCInstrDesc::mayAffectControlFlow().

◆ getRARegister()

MCRegister llvm::MCRegisterInfo::getRARegister ( ) const

inline

This method should return the register where the return address can be found.

Definition at line 352 of file MCRegisterInfo.h.

Referenced by llvm::MipsAsmPrinter::emitFrameDirective().

◆ getRegClass()

const MCRegisterClass & llvm::MCRegisterInfo::getRegClass ( unsigned i ) const

inline

Returns the register class associated with the enumeration value.

See class MCOperandInfo.

Definition at line 451 of file MCRegisterInfo.h.

References assert(), and getNumRegClasses().

Referenced by llvm::AMDGPUDisassembler::convertMIMGInst(), llvm::AMDGPUDisassembler::convertTrue16OpSel(), llvm::ARMInstPrinter::printInst(), llvm::AArch64InstPrinter::printRangePrefetchAlias(), llvm::VEInstPrinter::printRegName(), and llvm::AArch64InstPrinter::printVectorList().

◆ getRegClassName()

const char * llvm::MCRegisterInfo::getRegClassName ( const MCRegisterClass * Class ) const

inline

Definition at line 456 of file MCRegisterInfo.h.

Referenced by llvm::TargetRegisterInfo::getRegClassName().

◆ getSEHRegNum()

int MCRegisterInfo::getSEHRegNum ( MCRegister RegNum ) const

Map a target register to an equivalent SEH register number.

Returns LLVM register number if there is no equivalent value.

Definition at line 190 of file MCRegisterInfo.cpp.

References I.

Referenced by encodeSEHRegNum().

◆ getSubReg()

MCRegister MCRegisterInfo::getSubReg	(	MCRegister	Reg,
		unsigned	Idx
	)		const

Returns the physical register number of sub-register "Index" for physical register RegNo.

Return zero if the sub-register does not exist.

Definition at line 116 of file MCRegisterInfo.cpp.

References assert(), get(), getNumSubRegIndices(), Idx, llvm::MCRegisterDesc::SubRegIndices, and subregs().

Referenced by llvm::AMDGPUDisassembler::convertMIMGInst(), getMatchingSuperReg(), getPairedGPR(), llvm::AVRInstPrinter::getPrettyRegisterName(), llvm::HexagonAsmPrinter::HexagonProcessInstruction(), llvm::AArch64InstPrinter::printGPR64x8(), llvm::ARMInstPrinter::printGPRPairOperand(), llvm::AArch64InstPrinter::printGPRSeqPairsClassOperand(), llvm::ARMInstPrinter::printMVEVectorList(), llvm::AArch64InstPrinter::printVectorList(), llvm::ARMInstPrinter::printVectorListTwo(), llvm::ARMInstPrinter::printVectorListTwoAllLanes(), llvm::ARMInstPrinter::printVectorListTwoSpaced(), and llvm::ARMInstPrinter::printVectorListTwoSpacedAllLanes().

◆ getSubRegIndex()

unsigned MCRegisterInfo::getSubRegIndex	(	MCRegister	RegNo,
		MCRegister	SubRegNo
	)		const

For a given register pair, return the sub-register index if the second register is a sub-register of the first.

Return zero otherwise.

Definition at line 130 of file MCRegisterInfo.cpp.

References assert(), get(), getNumRegs(), SubReg, llvm::MCRegisterDesc::SubRegIndices, and subregs().

Referenced by llvm::rdf::PhysicalRegisterInfo::mapTo().

◆ InitMCRegisterInfo()

void llvm::MCRegisterInfo::InitMCRegisterInfo	(	const MCRegisterDesc *	D,
		unsigned	NR,
		unsigned	RA,
		unsigned	PC,
		const MCRegisterClass *	C,
		unsigned	NC,
		const MCPhysReg(*)	RURoots[2],
		unsigned	NRU,
		const int16_t *	DL,
		const LaneBitmask *	RUMS,
		const char *	Strings,
		const char *	ClassStrings,
		const uint16_t *	SubIndices,
		unsigned	NumIndices,
		const uint16_t *	RET
	)

inline

Initialize MCRegisterInfo, called by TableGen auto-generated routines.

DO NOT USE.

Definition at line 273 of file MCRegisterInfo.h.

References llvm::CallingConv::C, D, DL, NC, and RA.

◆ isConstant()

bool llvm::MCRegisterInfo::isConstant ( MCRegister RegNo ) const

inline

Returns true if the given register is constant.

Definition at line 395 of file MCRegisterInfo.h.

References get(), and llvm::MCRegisterDesc::IsConstant.

Referenced by llvm::mca::InstrBuilder::createInstruction().

◆ isSubRegister()

bool llvm::MCRegisterInfo::isSubRegister	(	MCRegister	RegA,
		MCRegister	RegB
	)		const

inline

Returns true if RegB is a sub-register of RegA.

Definition at line 468 of file MCRegisterInfo.h.

References isSuperRegister().

Referenced by llvm::MachineInstr::addRegisterDead(), and llvm::MachineInstr::addRegisterKilled().

◆ isSubRegisterEq()

bool llvm::MCRegisterInfo::isSubRegisterEq	(	MCRegister	RegA,
		MCRegister	RegB
	)		const

inline

Returns true if RegB is a sub-register of RegA or if RegB == RegA.

Definition at line 476 of file MCRegisterInfo.h.

References isSuperRegisterEq().

Referenced by llvm::MCInstrDesc::hasDefOfPhysReg(), and isSuperOrSubRegisterEq().

◆ isSuperOrSubRegisterEq()

bool llvm::MCRegisterInfo::isSuperOrSubRegisterEq	(	MCRegister	RegA,
		MCRegister	RegB
	)		const

inline

Returns true if RegB is a super-register or sub-register of RegA or if RegB == RegA.

Definition at line 488 of file MCRegisterInfo.h.

References isSubRegisterEq(), and isSuperRegister().

◆ isSuperRegister()

bool llvm::MCRegisterInfo::isSuperRegister	(	MCRegister	RegA,
		MCRegister	RegB
	)		const

inline

Returns true if RegB is a super-register of RegA.

Definition at line 610 of file MCRegisterInfo.h.

References llvm::is_contained(), and superregs().

Referenced by llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterKilled(), isSubRegister(), isSuperOrSubRegisterEq(), and isSuperRegisterEq().

◆ isSuperRegisterEq()

bool llvm::MCRegisterInfo::isSuperRegisterEq	(	MCRegister	RegA,
		MCRegister	RegB
	)		const

inline

Returns true if RegB is a super-register of RegA or if RegB == RegA.

Definition at line 482 of file MCRegisterInfo.h.

References isSuperRegister().

Referenced by isSubRegisterEq().

◆ mapDwarfRegsToLLVMRegs()

void llvm::MCRegisterInfo::mapDwarfRegsToLLVMRegs	(	const DwarfLLVMRegPair *	Map,
		unsigned	Size,
		bool	isEH
	)

inline

Used to initialize Dwarf register to LLVM register number mapping.

Called by TableGen auto-generated routines. DO NOT USE.

Definition at line 326 of file MCRegisterInfo.h.

References Size.

◆ mapLLVMRegsToDwarfRegs()

void llvm::MCRegisterInfo::mapLLVMRegsToDwarfRegs	(	const DwarfLLVMRegPair *	Map,
		unsigned	Size,
		bool	isEH
	)

inline

Used to initialize LLVM register to Dwarf register number mapping.

Called by TableGen auto-generated routines. DO NOT USE.

Definition at line 312 of file MCRegisterInfo.h.

References Size.

◆ mapLLVMRegToCVReg()

void llvm::MCRegisterInfo::mapLLVMRegToCVReg	(	MCRegister	LLVMReg,
		int	CVReg
	)

inline

Definition at line 346 of file MCRegisterInfo.h.

◆ mapLLVMRegToSEHReg()

void llvm::MCRegisterInfo::mapLLVMRegToSEHReg	(	MCRegister	LLVMReg,
		int	SEHReg
	)

inline

mapLLVMRegToSEHReg - Used to initialize LLVM register to SEH register number mapping.

By default the SEH register number is just the same as the LLVM register number. FIXME: TableGen these numbers. Currently this requires target specific initialization code.

Definition at line 342 of file MCRegisterInfo.h.

◆ operator[]()

const MCRegisterDesc & llvm::MCRegisterInfo::operator[] ( MCRegister RegNo ) const

inline

Definition at line 361 of file MCRegisterInfo.h.

References assert().

Referenced by get().

◆ regclass_begin()

regclass_iterator llvm::MCRegisterInfo::regclass_begin ( ) const

inline

Definition at line 439 of file MCRegisterInfo.h.

Referenced by getNumRegClasses(), and regclasses().

◆ regclass_end()

regclass_iterator llvm::MCRegisterInfo::regclass_end ( ) const

inline

Definition at line 440 of file MCRegisterInfo.h.

Referenced by getNumRegClasses(), and regclasses().

◆ regclasses()

iterator_range< regclass_iterator > llvm::MCRegisterInfo::regclasses ( ) const

inline

Definition at line 441 of file MCRegisterInfo.h.

References llvm::make_range(), regclass_begin(), and regclass_end().

◆ regsOverlap()

bool MCRegisterInfo::regsOverlap	(	MCRegister	RegA,
		MCRegister	RegB
	)		const

Returns true if the two registers are equal or alias each other.

Definition at line 207 of file MCRegisterInfo.cpp.

References regunits().

Referenced by llvm::AArch64RegisterInfo::explainReservedReg(), llvm::AArch64RegisterInfo::isAsmClobberable(), and llvm::TargetRegisterInfo::regsOverlap().

◆ regunits()

iterator_range< MCRegUnitIterator > llvm::MCRegisterInfo::regunits ( MCRegister Reg ) const

inline

Returns an iterator range over all regunits for Reg.

Definition at line 787 of file MCRegisterInfo.h.

References llvm::make_range(), MCRegUnitIterator, and Reg.

Referenced by llvm::LiveIntervals::addKillFlags(), llvm::ScheduleDAGInstrs::addPhysRegDataDeps(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::ScheduleDAGInstrs::addSchedBarrierDeps(), llvm::RegAllocEvictionAdvisor::canReassign(), llvm::LiveRegMatrix::checkInterference(), llvm::LiveRegMatrix::getOneVReg(), llvm::ReachingDefAnalysis::getReachingDef(), llvm::rdf::PhysicalRegisterInfo::getUnits(), llvm::TargetRegisterInfo::hasRegUnit(), llvm::LiveRegMatrix::isPhysRegUsed(), llvm::rdf::PhysicalRegisterInfo::PhysicalRegisterInfo(), regsOverlap(), and llvm::RegisterClassInfo::runOnMachineFunction().

◆ sub_and_superregs_inclusive()

detail::concat_range< const MCPhysReg, iterator_range< MCSubRegIterator >, iterator_range< MCSuperRegIterator > > llvm::MCRegisterInfo::sub_and_superregs_inclusive ( MCRegister Reg ) const