MachineRegisterInfo.h File Reference

#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/IndexedMap.h"
#include "llvm/ADT/PointerUnion.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBundle.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/RegisterBank.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/MC/LaneBitmask.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <iterator>
#include <memory>
#include <utility>
#include <vector>

Go to the source code of this file.

Classes
class	llvm::MachineRegisterInfo
	MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc. More...
class	llvm::MachineRegisterInfo::Delegate
struct	llvm::MachineRegisterInfo::VRegAttrs
	All attributes(register class or bank and low-level type) a virtual register can have. More...
class	llvm::MachineRegisterInfo::defusechain_iterator< ReturnUses, ReturnDefs, SkipDebug, ByOperand, ByInstr, ByBundle >
	reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register within the MachineFunction that corresponds to this MachineRegisterInfo object. More...
class	llvm::MachineRegisterInfo::defusechain_instr_iterator< ReturnUses, ReturnDefs, SkipDebug, ByOperand, ByInstr, ByBundle >
	defusechain_iterator - This class provides iterator support for machine operands in the function that use or define a specific register. More...
class	llvm::PSetIterator
	Iterate over the pressure sets affected by the given physical or virtual register. More...

Namespaces
namespace	llvm
	This is an optimization pass for GlobalISel generic memory operations.

Typedefs
using	llvm::RegClassOrRegBank = PointerUnion< const TargetRegisterClass *, const RegisterBank * >
	Convenient type to represent either a register class or a register bank.