LLVM 23.0.0git
RegisterBank.h
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1//==-- llvm/CodeGen/RegisterBank.h - Register Bank ---------------*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file This file declares the API of register banks.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_CODEGEN_REGISTERBANK_H
14#define LLVM_CODEGEN_REGISTERBANK_H
15
17#include <cstdint>
18
19namespace llvm {
20// Forward declarations.
22class raw_ostream;
23class MCRegisterClass;
26
27/// This class implements the register bank concept.
28/// Two instances of RegisterBank must have different ID.
29/// This property is enforced by the RegisterBankInfo class.
31private:
32 unsigned ID;
33 unsigned NumRegClasses;
34 const char *Name;
35 const uint32_t *CoveredClasses;
36
37 /// Only the RegisterBankInfo can initialize RegisterBank properly.
38 friend RegisterBankInfo;
39
40public:
41 constexpr RegisterBank(unsigned ID, const char *Name,
42 const uint32_t *CoveredClasses, unsigned NumRegClasses)
43 : ID(ID), NumRegClasses(NumRegClasses), Name(Name),
44 CoveredClasses(CoveredClasses) {}
45
46 /// Get the identifier of this register bank.
47 unsigned getID() const { return ID; }
48
49 /// Get a user friendly name of this register bank.
50 /// Should be used only for debugging purposes.
51 const char *getName() const { return Name; }
52
53 /// Check if this register bank is valid. In other words,
54 /// if it has been properly constructed.
55 ///
56 /// \note This method does not check anything when assertions are disabled.
57 ///
58 /// \return True is the check was successful.
59 LLVM_ABI bool verify(const RegisterBankInfo &RBI,
60 const TargetRegisterInfo &TRI) const;
61
62 /// Check whether this register bank covers \p RC.
63 /// In other words, check if this register bank fully covers
64 /// the registers that \p RC contains.
65 LLVM_ABI bool covers(const TargetRegisterClass &RC) const;
66
67 /// Check whether \p OtherRB is the same as this.
68 LLVM_ABI bool operator==(const RegisterBank &OtherRB) const;
69 bool operator!=(const RegisterBank &OtherRB) const {
70 return !this->operator==(OtherRB);
71 }
72
73 /// Dump the register mask on dbgs() stream.
74 /// The dump is verbose.
75 LLVM_ABI void dump(const TargetRegisterInfo *TRI = nullptr) const;
76
77 /// Print the register mask on OS.
78 /// If IsForDebug is false, then only the name of the register bank
79 /// is printed. Otherwise, all the fields are printing.
80 /// TRI is then used to print the name of the register classes that
81 /// this register bank covers.
82 LLVM_ABI void print(raw_ostream &OS, bool IsForDebug = false,
83 const TargetRegisterInfo *TRI = nullptr) const;
84};
85
86inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
87 RegBank.print(OS);
88 return OS;
89}
90} // End namespace llvm.
91
92#endif
#define LLVM_ABI
Definition Compiler.h:215
Register const TargetRegisterInfo * TRI
ppc ctr loops verify
MCRegisterClass - Base class of TargetRegisterClass.
Holds all the information related to register banks.
This class implements the register bank concept.
constexpr RegisterBank(unsigned ID, const char *Name, const uint32_t *CoveredClasses, unsigned NumRegClasses)
LLVM_ABI void print(raw_ostream &OS, bool IsForDebug=false, const TargetRegisterInfo *TRI=nullptr) const
Print the register mask on OS.
LLVM_ABI void dump(const TargetRegisterInfo *TRI=nullptr) const
Dump the register mask on dbgs() stream.
LLVM_ABI bool covers(const TargetRegisterClass &RC) const
Check whether this register bank covers RC.
const char * getName() const
Get a user friendly name of this register bank.
unsigned getID() const
Get the identifier of this register bank.
bool operator!=(const RegisterBank &OtherRB) const
LLVM_ABI bool operator==(const RegisterBank &OtherRB) const
Check whether OtherRB is the same as this.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition raw_ostream.h:53
This is an optimization pass for GlobalISel generic memory operations.
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
MCRegisterClass TargetRegisterClass
Definition FastISel.h:58