13#ifndef LLVM_CODEGEN_REGISTERBANK_H
14#define LLVM_CODEGEN_REGISTERBANK_H
32 unsigned NumRegClasses;
37 friend RegisterBankInfo;
41 const uint32_t *CoveredClasses,
unsigned NumRegClasses)
42 : ID(ID), NumRegClasses(NumRegClasses), Name(Name),
43 CoveredClasses(CoveredClasses) {}
46 unsigned getID()
const {
return ID; }
50 const char *
getName()
const {
return Name; }
Register const TargetRegisterInfo * TRI
Holds all the information related to register banks.
This class implements the register bank concept.
constexpr RegisterBank(unsigned ID, const char *Name, const uint32_t *CoveredClasses, unsigned NumRegClasses)
LLVM_ABI void print(raw_ostream &OS, bool IsForDebug=false, const TargetRegisterInfo *TRI=nullptr) const
Print the register mask on OS.
LLVM_ABI void dump(const TargetRegisterInfo *TRI=nullptr) const
Dump the register mask on dbgs() stream.
LLVM_ABI bool covers(const TargetRegisterClass &RC) const
Check whether this register bank covers RC.
const char * getName() const
Get a user friendly name of this register bank.
unsigned getID() const
Get the identifier of this register bank.
bool operator!=(const RegisterBank &OtherRB) const
LLVM_ABI bool operator==(const RegisterBank &OtherRB) const
Check whether OtherRB is the same as this.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This class implements an extremely fast bulk output stream that can only output to a stream.
This is an optimization pass for GlobalISel generic memory operations.
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)