LLVM 20.0.0git
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Holds all the information related to register banks. More...
#include "llvm/CodeGen/RegisterBankInfo.h"
Classes | |
class | InstructionMapping |
Helper class that represents how the value of an instruction may be mapped and what is the related cost of such mapping. More... | |
class | OperandsMapper |
Helper class used to get/create the virtual registers that will be used to replace the MachineOperand when applying a mapping. More... | |
struct | PartialMapping |
Helper struct that represents how a value is partially mapped into a register. More... | |
struct | ValueMapping |
Helper struct that represents how a value is mapped through different register banks. More... | |
Public Types | |
using | InstructionMappings = SmallVector< const InstructionMapping *, 4 > |
Convenient type to represent the alternatives for mapping an instruction. | |
Public Member Functions | |
const RegisterBank * | getRegBankFromConstraints (const MachineInstr &MI, unsigned OpIdx, const TargetInstrInfo &TII, const MachineRegisterInfo &MRI) const |
Get the register bank for the OpIdx-th operand of MI form the encoding constraints, if any. | |
virtual void | applyMappingImpl (MachineIRBuilder &Builder, const OperandsMapper &OpdMapper) const |
See applyMapping. | |
virtual | ~RegisterBankInfo ()=default |
const RegisterBank & | getRegBank (unsigned ID) const |
Get the register bank identified by ID . | |
unsigned | getMaximumSize (unsigned RegBankID) const |
Get the maximum size in bits that fits in the given register bank. | |
const RegisterBank * | getRegBank (Register Reg, const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI) const |
Get the register bank of Reg . | |
unsigned | getNumRegBanks () const |
Get the total number of register banks. | |
virtual bool | isDivergentRegBank (const RegisterBank *RB) const |
Returns true if the register bank is considered divergent. | |
virtual const RegisterBank & | getRegBankFromRegClass (const TargetRegisterClass &RC, LLT Ty) const |
Get a register bank that covers RC . | |
virtual unsigned | copyCost (const RegisterBank &A, const RegisterBank &B, TypeSize Size) const |
Get the cost of a copy from B to A , or put differently, get the cost of A = COPY B. | |
bool | cannotCopy (const RegisterBank &Dst, const RegisterBank &Src, TypeSize Size) const |
virtual unsigned | getBreakDownCost (const ValueMapping &ValMapping, const RegisterBank *CurBank=nullptr) const |
Get the cost of using ValMapping to decompose a register. | |
virtual const InstructionMapping & | getInstrMapping (const MachineInstr &MI) const |
Get the mapping of the different operands of MI on the register bank. | |
virtual InstructionMappings | getInstrAlternativeMappings (const MachineInstr &MI) const |
Get the alternative mappings for MI . | |
InstructionMappings | getInstrPossibleMappings (const MachineInstr &MI) const |
Get the possible mapping for MI . | |
void | applyMapping (MachineIRBuilder &Builder, const OperandsMapper &OpdMapper) const |
Apply OpdMapper.getInstrMapping() to OpdMapper.getMI() . | |
TypeSize | getSizeInBits (Register Reg, const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI) const |
Get the size in bits of Reg . | |
bool | verify (const TargetRegisterInfo &TRI) const |
Check that information hold by this instance make sense for the given TRI . | |
Static Public Member Functions | |
static void | applyDefaultMapping (const OperandsMapper &OpdMapper) |
Helper method to apply something that is like the default mapping. | |
static const TargetRegisterClass * | constrainGenericRegister (Register Reg, const TargetRegisterClass &RC, MachineRegisterInfo &MRI) |
Constrain the (possibly generic) virtual register Reg to RC . | |
Static Public Attributes | |
static const unsigned | DefaultMappingID = UINT_MAX |
Identifier used when the related instruction mapping instance is generated by target independent code. | |
static const unsigned | InvalidMappingID = UINT_MAX - 1 |
Identifier used when the related instruction mapping instance is generated by the default constructor. | |
Protected Member Functions | |
RegisterBankInfo (const RegisterBank **RegBanks, unsigned NumRegBanks, const unsigned *Sizes, unsigned HwMode) | |
Create a RegisterBankInfo that can accommodate up to NumRegBanks RegisterBank instances. | |
RegisterBankInfo () | |
This constructor is meaningless. | |
const RegisterBank & | getRegBank (unsigned ID) |
Get the register bank identified by ID . | |
const TargetRegisterClass * | getMinimalPhysRegClass (Register Reg, const TargetRegisterInfo &TRI) const |
Get the MinimalPhysRegClass for Reg. | |
const InstructionMapping & | getInstrMappingImpl (const MachineInstr &MI) const |
Try to get the mapping of MI . | |
const PartialMapping & | getPartialMapping (unsigned StartIdx, unsigned Length, const RegisterBank &RegBank) const |
Get the uniquely generated PartialMapping for the given arguments. | |
Methods to get a uniquely generated ValueMapping. | |
const ValueMapping & | getValueMapping (unsigned StartIdx, unsigned Length, const RegisterBank &RegBank) const |
The most common ValueMapping consists of a single PartialMapping. | |
const ValueMapping & | getValueMapping (const PartialMapping *BreakDown, unsigned NumBreakDowns) const |
Get the ValueMapping for the given arguments. | |
Methods to get a uniquely generated array of ValueMapping. | |
template<typename Iterator > | |
const ValueMapping * | getOperandsMapping (Iterator Begin, Iterator End) const |
Get the uniquely generated array of ValueMapping for the elements of between Begin and End . | |
const ValueMapping * | getOperandsMapping (const SmallVectorImpl< const ValueMapping * > &OpdsMapping) const |
Get the uniquely generated array of ValueMapping for the elements of OpdsMapping . | |
const ValueMapping * | getOperandsMapping (std::initializer_list< const ValueMapping * > OpdsMapping) const |
Get the uniquely generated array of ValueMapping for the given arguments. | |
Protected Attributes | |
const RegisterBank ** | RegBanks |
Hold the set of supported register banks. | |
unsigned | NumRegBanks |
Total number of register banks. | |
const unsigned * | Sizes |
Hold the sizes of the register banks for all HwModes. | |
unsigned | HwMode |
Current HwMode for the target. | |
DenseMap< hash_code, std::unique_ptr< const PartialMapping > > | MapOfPartialMappings |
Keep dynamically allocated PartialMapping in a separate map. | |
DenseMap< hash_code, std::unique_ptr< const ValueMapping > > | MapOfValueMappings |
Keep dynamically allocated ValueMapping in a separate map. | |
DenseMap< hash_code, std::unique_ptr< ValueMapping[]> > | MapOfOperandsMappings |
Keep dynamically allocated array of ValueMapping in a separate map. | |
DenseMap< hash_code, std::unique_ptr< const InstructionMapping > > | MapOfInstructionMappings |
Keep dynamically allocated InstructionMapping in a separate map. | |
DenseMap< unsigned, const TargetRegisterClass * > | PhysRegMinimalRCs |
Getting the minimal register class of a physreg is expensive. | |
Methods to get a uniquely generated InstructionMapping. | |
const InstructionMapping & | getInstructionMapping (unsigned ID, unsigned Cost, const ValueMapping *OperandsMapping, unsigned NumOperands) const |
Method to get a uniquely generated InstructionMapping. | |
const InstructionMapping & | getInvalidInstructionMapping () const |
Method to get a uniquely generated invalid InstructionMapping. | |
Holds all the information related to register banks.
Definition at line 40 of file RegisterBankInfo.h.
Convenient type to represent the alternatives for mapping an instruction.
Definition at line 277 of file RegisterBankInfo.h.
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Create a RegisterBankInfo that can accommodate up to NumRegBanks
RegisterBank instances.
Definition at line 56 of file RegisterBankInfo.cpp.
References assert(), End, getNumRegBanks(), Idx, and RegBanks.
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This constructor is meaningless.
It just provides a default constructor that can be used at link time when GlobalISel is not built. That way, targets can still inherit from this class without doing crazy gymnastic to avoid link time failures.
Definition at line 435 of file RegisterBankInfo.h.
References llvm_unreachable.
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virtualdefault |
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Helper method to apply something that is like the default mapping.
Basically, that means that OpdMapper.getMI()
is left untouched aside from the reassignment of the register operand that have been remapped.
The type of all the new registers that have been created by the mapper are properly remapped to the type of the original registers they replace. In other words, the semantic of the instruction does not change, only the register banks.
If the mapping of one of the operand spans several registers, this method will abort as this is not like a default mapping anymore.
OpdMapper.getMI()
.getNumOperands()) the range OpdMapper.getVRegs(OpIdx) is empty or of size 1. Definition at line 441 of file RegisterBankInfo.cpp.
References assert(), llvm::iterator_range< IteratorT >::begin(), llvm::dbgs(), llvm::iterator_range< IteratorT >::empty(), llvm::RegisterBankInfo::OperandsMapper::getInstrMapping(), llvm::RegisterBankInfo::OperandsMapper::getMI(), llvm::RegisterBankInfo::OperandsMapper::getMRI(), llvm::RegisterBankInfo::InstructionMapping::getNumOperands(), llvm::MachineOperand::getReg(), llvm::LLT::getSizeInBits(), llvm::RegisterBankInfo::OperandsMapper::getVRegs(), llvm::details::FixedOrScalableQuantity< TypeSize, uint64_t >::isKnownLE(), llvm::MachineOperand::isReg(), llvm::LLT::isValid(), LLVM_DEBUG, MI, MRI, llvm::RegisterBankInfo::ValueMapping::NumBreakDowns, llvm::printReg(), and llvm::MachineOperand::setReg().
Referenced by applyMapping(), llvm::AMDGPURegisterBankInfo::applyMappingBFE(), llvm::AMDGPURegisterBankInfo::applyMappingImage(), llvm::AMDGPURegisterBankInfo::applyMappingImpl(), llvm::MipsRegisterBankInfo::applyMappingImpl(), llvm::X86RegisterBankInfo::applyMappingImpl(), llvm::AMDGPURegisterBankInfo::applyMappingMAD_64_32(), and llvm::AMDGPURegisterBankInfo::applyMappingSMULU64().
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Apply OpdMapper.getInstrMapping()
to OpdMapper.getMI()
.
After this call OpdMapper.getMI()
may not be valid anymore. OpdMapper.getInstrMapping()
.getID() carries the information of what has been chosen to map OpdMapper.getMI()
. This ID is set by the various getInstrXXXMapping method.
Therefore, getting the mapping and applying it should be kept in sync.
Definition at line 735 of file RegisterBankInfo.h.
References applyDefaultMapping(), applyMappingImpl(), DefaultMappingID, llvm::RegisterBankInfo::InstructionMapping::getID(), and llvm::RegisterBankInfo::OperandsMapper::getInstrMapping().
Referenced by llvm::RegBankSelect::applyMapping().
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See applyMapping.
Reimplemented in llvm::AMDGPURegisterBankInfo, llvm::MipsRegisterBankInfo, and llvm::X86RegisterBankInfo.
Definition at line 576 of file RegisterBankInfo.h.
References llvm_unreachable.
Referenced by applyMapping().
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Src
to Dst
is impossible. Definition at line 643 of file RegisterBankInfo.h.
References copyCost(), and Size.
Referenced by llvm::AMDGPURegisterBankInfo::getInstrMapping(), and getInstrMappingImpl().
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static |
Constrain the (possibly generic) virtual register Reg
to RC
.
Reg
is a virtual register that either has a bank or a class. Definition at line 134 of file RegisterBankInfo.cpp.
References llvm::RegisterBank::covers(), and MRI.
Referenced by llvm::AMDGPURegisterBankInfo::buildReadFirstLane(), llvm::AMDGPURegisterBankInfo::buildVCopy(), llvm::constrainRegToClass(), copySubReg(), selectCopy(), and selectDebugInstr().
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Get the cost of a copy from B
to A
, or put differently, get the cost of A = COPY B.
Since register banks may cover different size, Size
specifies what will be the size in bits that will be copied around.
Reimplemented in llvm::AArch64RegisterBankInfo, and llvm::AMDGPURegisterBankInfo.
Definition at line 633 of file RegisterBankInfo.h.
Referenced by cannotCopy(), llvm::AArch64RegisterBankInfo::copyCost(), llvm::AMDGPURegisterBankInfo::copyCost(), and llvm::RegBankSelect::getRepairCost().
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Get the cost of using ValMapping
to decompose a register.
This is similar to copyCost, except for cases where multiple copy-like operations need to be inserted. If the register is used as a source operand and already has a bank assigned, CurBank
is non-null.
Reimplemented in llvm::AMDGPURegisterBankInfo.
Definition at line 653 of file RegisterBankInfo.h.
Referenced by llvm::RegBankSelect::getRepairCost().
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Get the alternative mappings for MI
.
Alternative in the sense different from getInstrMapping.
Reimplemented in llvm::AArch64RegisterBankInfo, llvm::AMDGPURegisterBankInfo, llvm::PPCRegisterBankInfo, and llvm::X86RegisterBankInfo.
Definition at line 436 of file RegisterBankInfo.cpp.
Referenced by llvm::AArch64RegisterBankInfo::getInstrAlternativeMappings(), llvm::AMDGPURegisterBankInfo::getInstrAlternativeMappings(), llvm::PPCRegisterBankInfo::getInstrAlternativeMappings(), llvm::X86RegisterBankInfo::getInstrAlternativeMappings(), llvm::AMDGPURegisterBankInfo::getInstrAlternativeMappingsIntrinsic(), llvm::AMDGPURegisterBankInfo::getInstrAlternativeMappingsIntrinsicWSideEffects(), and getInstrPossibleMappings().
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virtual |
Get the mapping of the different operands of MI
on the register bank.
This mapping should be the direct translation of MI
. In other words, when MI
is mapped with the returned mapping, only the register banks of the operands of MI
need to be updated. In particular, neither the opcode nor the type of MI
needs to be updated for this direct mapping.
The target independent implementation gives a mapping based on the register classes for the target specific opcode. It uses the ID RegisterBankInfo::DefaultMappingID for that mapping. Make sure you do not use that ID for the alternative mapping for MI. See getInstrAlternativeMappings for the alternative mappings.
For instance, if MI
is a vector add, the mapping should not be a scalarization of the add.
Reimplemented in llvm::AArch64RegisterBankInfo, llvm::AMDGPURegisterBankInfo, llvm::ARMRegisterBankInfo, llvm::M68kRegisterBankInfo, llvm::MipsRegisterBankInfo, llvm::PPCRegisterBankInfo, llvm::RISCVRegisterBankInfo, and llvm::X86RegisterBankInfo.
Definition at line 409 of file RegisterBankInfo.cpp.
References getInstrMappingImpl(), llvm::RegisterBankInfo::InstructionMapping::isValid(), llvm_unreachable, and MI.
Referenced by llvm::RegBankSelect::assignInstr(), llvm::RegisterBankInfo::OperandsMapper::createVRegs(), getInstrPossibleMappings(), llvm::RegisterBankInfo::OperandsMapper::getVRegs(), llvm::RegisterBankInfo::OperandsMapper::print(), and llvm::RegisterBankInfo::OperandsMapper::setVRegs().
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Try to get the mapping of MI
.
See getInstrMapping for more details on what a mapping represents.
Unlike getInstrMapping the returned InstructionMapping may be invalid (isValid() == false). This means that the target independent code is not smart enough to get the mapping of MI
and thus, the target has to provide the information for MI
.
This implementation is able to get the mapping of:
Definition at line 164 of file RegisterBankInfo.cpp.
References assert(), cannotCopy(), DefaultMappingID, llvm::TargetSubtargetInfo::getInstrInfo(), getInstructionMapping(), getInvalidInstructionMapping(), getOperandsMapping(), llvm::MachineOperand::getReg(), getRegBank(), getRegBankFromConstraints(), llvm::MachineFunction::getRegInfo(), llvm::TargetSubtargetInfo::getRegisterInfo(), getSizeInBits(), llvm::MachineFunction::getSubtarget(), getValueMapping(), isCopyLike(), llvm::MachineOperand::isReg(), MI, MRI, Size, TII, and TRI.
Referenced by getInstrMapping(), llvm::AArch64RegisterBankInfo::getInstrMapping(), llvm::AMDGPURegisterBankInfo::getInstrMapping(), llvm::ARMRegisterBankInfo::getInstrMapping(), llvm::M68kRegisterBankInfo::getInstrMapping(), llvm::MipsRegisterBankInfo::getInstrMapping(), llvm::PPCRegisterBankInfo::getInstrMapping(), llvm::RISCVRegisterBankInfo::getInstrMapping(), and llvm::X86RegisterBankInfo::getInstrMapping().
RegisterBankInfo::InstructionMappings RegisterBankInfo::getInstrPossibleMappings | ( | const MachineInstr & | MI | ) | const |
Get the possible mapping for MI
.
A mapping defines where the different operands may live and at what cost. For instance, let us consider: v0(16) = G_ADD <2 x i8> v1, v2 The possible mapping could be:
{/*ID*/VectorAdd, /*Cost*/1, /*v0*/{(0xFFFF, VPR)}, /*v1*/{(0xFFFF, VPR)}, /*v2*/{(0xFFFF, VPR)}} {/*ID*/ScalarAddx2, /*Cost*/2, /*v0*/{(0x00FF, GPR),(0xFF00, GPR)}, /*v1*/{(0x00FF, GPR),(0xFF00, GPR)}, /*v2*/{(0x00FF, GPR),(0xFF00, GPR)}}
MI
current form.Definition at line 417 of file RegisterBankInfo.cpp.
References llvm::append_range(), assert(), getInstrAlternativeMappings(), getInstrMapping(), MI, and llvm::SmallVectorTemplateBase< T, bool >::push_back().
Referenced by llvm::RegBankSelect::assignInstr().
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Method to get a uniquely generated InstructionMapping.
Definition at line 534 of file RegisterBankInfo.h.
Referenced by llvm::AMDGPURegisterBankInfo::addMappingFromTable(), llvm::AMDGPURegisterBankInfo::getDefaultMappingAllVGPR(), llvm::AMDGPURegisterBankInfo::getDefaultMappingSOP(), llvm::AMDGPURegisterBankInfo::getDefaultMappingVOP(), llvm::AMDGPURegisterBankInfo::getImageMapping(), llvm::AArch64RegisterBankInfo::getInstrAlternativeMappings(), llvm::AMDGPURegisterBankInfo::getInstrAlternativeMappings(), llvm::X86RegisterBankInfo::getInstrAlternativeMappings(), llvm::AArch64RegisterBankInfo::getInstrMapping(), llvm::AMDGPURegisterBankInfo::getInstrMapping(), llvm::ARMRegisterBankInfo::getInstrMapping(), llvm::M68kRegisterBankInfo::getInstrMapping(), llvm::MipsRegisterBankInfo::getInstrMapping(), llvm::PPCRegisterBankInfo::getInstrMapping(), llvm::RISCVRegisterBankInfo::getInstrMapping(), llvm::X86RegisterBankInfo::getInstrMapping(), llvm::AMDGPURegisterBankInfo::getInstrMappingForLoad(), and getInstrMappingImpl().
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Method to get a uniquely generated invalid InstructionMapping.
Definition at line 542 of file RegisterBankInfo.h.
Referenced by llvm::AArch64RegisterBankInfo::getInstrMapping(), llvm::AMDGPURegisterBankInfo::getInstrMapping(), llvm::ARMRegisterBankInfo::getInstrMapping(), llvm::M68kRegisterBankInfo::getInstrMapping(), llvm::MipsRegisterBankInfo::getInstrMapping(), llvm::PPCRegisterBankInfo::getInstrMapping(), llvm::X86RegisterBankInfo::getInstrMapping(), and getInstrMappingImpl().
Get the maximum size in bits that fits in the given register bank.
Definition at line 590 of file RegisterBankInfo.h.
References HwMode, NumRegBanks, and Sizes.
Referenced by llvm::AArch64RegisterBankInfo::AArch64RegisterBankInfo(), llvm::ARMRegisterBankInfo::ARMRegisterBankInfo(), llvm::RISCVRegisterBankInfo::getInstrMapping(), llvm::RegisterBankInfo::PartialMapping::verify(), llvm::RegisterBank::verify(), and llvm::X86RegisterBankInfo::X86RegisterBankInfo().
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Get the MinimalPhysRegClass for Reg.
Definition at line 103 of file RegisterBankInfo.cpp.
References assert(), PhysRegMinimalRCs, and TRI.
Referenced by getRegBank(), and getSizeInBits().
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Get the total number of register banks.
Definition at line 603 of file RegisterBankInfo.h.
References NumRegBanks.
Referenced by getRegBank(), RegisterBankInfo(), and verify().
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Get the uniquely generated array of ValueMapping for the elements of OpdsMapping
.
Elements of OpdsMapping
that are nullptr will be replaced by invalid ValueMapping (ValueMapping::isValid == false).
Definition at line 364 of file RegisterBankInfo.cpp.
References llvm::SmallVectorTemplateCommon< T, typename >::begin(), llvm::SmallVectorTemplateCommon< T, typename >::end(), and getOperandsMapping().
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Get the uniquely generated array of ValueMapping for the elements of between Begin
and End
.
Elements that are nullptr will be replaced by invalid ValueMapping (ValueMapping::isValid == false).
Begin
and End
must uniquely identify a ValueMapping. Otherwise, there is no guarantee that the return instance will be unique, i.e., another OperandsMapping could have the same content. Definition at line 335 of file RegisterBankInfo.cpp.
References End, llvm::hash_combine_range(), Idx, and MapOfOperandsMappings.
Referenced by llvm::AMDGPURegisterBankInfo::addMappingFromTable(), llvm::AMDGPURegisterBankInfo::getDefaultMappingAllVGPR(), llvm::AMDGPURegisterBankInfo::getDefaultMappingSOP(), llvm::AMDGPURegisterBankInfo::getDefaultMappingVOP(), llvm::AMDGPURegisterBankInfo::getImageMapping(), llvm::AArch64RegisterBankInfo::getInstrAlternativeMappings(), llvm::AMDGPURegisterBankInfo::getInstrAlternativeMappings(), llvm::X86RegisterBankInfo::getInstrAlternativeMappings(), llvm::AArch64RegisterBankInfo::getInstrMapping(), llvm::AMDGPURegisterBankInfo::getInstrMapping(), llvm::ARMRegisterBankInfo::getInstrMapping(), llvm::M68kRegisterBankInfo::getInstrMapping(), llvm::MipsRegisterBankInfo::getInstrMapping(), llvm::PPCRegisterBankInfo::getInstrMapping(), llvm::RISCVRegisterBankInfo::getInstrMapping(), llvm::X86RegisterBankInfo::getInstrMapping(), llvm::AMDGPURegisterBankInfo::getInstrMappingForLoad(), getInstrMappingImpl(), and getOperandsMapping().
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Get the uniquely generated array of ValueMapping for the given arguments.
Arguments that are nullptr will be replaced by invalid ValueMapping (ValueMapping::isValid == false).
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Get the uniquely generated PartialMapping for the given arguments.
Definition at line 283 of file RegisterBankInfo.cpp.
References hashPartialMapping(), llvm::Length, and MapOfPartialMappings.
Referenced by getValueMapping().
const RegisterBank * RegisterBankInfo::getRegBank | ( | Register | Reg, |
const MachineRegisterInfo & | MRI, | ||
const TargetRegisterInfo & | TRI | ||
) | const |
Get the register bank of Reg
.
If Reg has not been assigned a register, a register class, or a register bank, then this returns nullptr.
Definition at line 84 of file RegisterBankInfo.cpp.
References getMinimalPhysRegClass(), getRegBankFromRegClass(), MRI, and TRI.
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Get the register bank identified by ID
.
Definition at line 440 of file RegisterBankInfo.h.
References assert(), getNumRegBanks(), and RegBanks.
Referenced by llvm::AArch64RegisterBankInfo::AArch64RegisterBankInfo(), llvm::AMDGPURegisterBankInfo::AMDGPURegisterBankInfo(), llvm::AMDGPURegisterBankInfo::applyMappingDynStackAlloc(), llvm::AMDGPURegisterBankInfo::applyMappingImpl(), llvm::ARMRegisterBankInfo::ARMRegisterBankInfo(), llvm::RegBankSelect::assignInstr(), llvm::RegBankSelect::assignmentMatch(), llvm::AMDGPURegisterBankInfo::buildReadFirstLane(), llvm::AMDGPURegisterBankInfo::collectWaterfallOperands(), llvm::AMDGPURegisterBankInfo::constrainOpWithReadfirstlane(), llvm::AMDGPURegisterBankInfo::executeInWaterfallLoop(), llvm::GIMatchTableExecutor::executeMatchTable(), llvm::AArch64RegisterBankInfo::getInstrMapping(), llvm::AMDGPURegisterBankInfo::getInstrMapping(), llvm::RISCVRegisterBankInfo::getInstrMapping(), llvm::AMDGPURegisterBankInfo::getInstrMappingForLoad(), getInstrMappingImpl(), llvm::SIInstrInfo::getInstructionUniformity(), llvm::AMDGPURegisterBankInfo::getMappingType(), llvm::CombinerHelper::getRegBank(), getRegBank(), llvm::AArch64RegisterBankInfo::getRegBankFromRegClass(), llvm::PPCRegisterBankInfo::getRegBankFromRegClass(), llvm::AMDGPURegisterBankInfo::getRegBankID(), getRegClassesForCopy(), llvm::RegBankSelect::getRepairCost(), llvm::AMDGPURegisterBankInfo::getValueMappingForPtr(), llvm::AMDGPURegisterBankInfo::isSALUMapping(), llvm::SIRegisterInfo::isUniformReg(), selectCopy(), selectMergeValues(), selectUnmergeValues(), llvm::AMDGPURegisterBankInfo::setBufferOffsets(), llvm::MipsRegisterBankInfo::setRegBank(), llvm::AMDGPURegisterBankInfo::split64BitValueForMapping(), unsupportedBinOp(), verify(), and llvm::X86RegisterBankInfo::X86RegisterBankInfo().
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Get the register bank identified by ID
.
Definition at line 585 of file RegisterBankInfo.h.
References getRegBank().
const RegisterBank * RegisterBankInfo::getRegBankFromConstraints | ( | const MachineInstr & | MI, |
unsigned | OpIdx, | ||
const TargetInstrInfo & | TII, | ||
const MachineRegisterInfo & | MRI | ||
) | const |
Get the register bank for the OpIdx-th
operand of MI
form the encoding constraints, if any.
MI
did not provide enough information to deduce it. Definition at line 114 of file RegisterBankInfo.cpp.
References assert(), llvm::RegisterBank::covers(), getRegBankFromRegClass(), MI, MRI, TII, and TRI.
Referenced by getInstrMappingImpl().
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Get a register bank that covers RC
.
RC
is a user-defined register class (as opposed as one generated by TableGen).Reimplemented in llvm::AArch64RegisterBankInfo, llvm::PPCRegisterBankInfo, llvm::SPIRVRegisterBankInfo, and llvm::AMDGPURegisterBankInfo.
Definition at line 623 of file RegisterBankInfo.h.
References llvm_unreachable.
Referenced by llvm::GIMatchTableExecutor::executeMatchTable(), getRegBank(), getRegBankFromConstraints(), llvm::AArch64RegisterBankInfo::getRegBankFromRegClass(), and llvm::PPCRegisterBankInfo::getRegBankFromRegClass().
TypeSize RegisterBankInfo::getSizeInBits | ( | Register | Reg, |
const MachineRegisterInfo & | MRI, | ||
const TargetRegisterInfo & | TRI | ||
) | const |
Get the size in bits of Reg
.
Utility method to get the size of any registers. Unlike MachineRegisterInfo::getSize, the register does not need to be a virtual register.
Reg
!= 0 (NoRegister). Definition at line 500 of file RegisterBankInfo.cpp.
References assert(), getMinimalPhysRegClass(), MRI, and TRI.
Referenced by llvm::AMDGPURegisterBankInfo::addMappingFromTable(), llvm::AMDGPURegisterBankInfo::getAGPROpMapping(), llvm::AMDGPURegisterBankInfo::getDefaultMappingAllVGPR(), llvm::AMDGPURegisterBankInfo::getDefaultMappingSOP(), llvm::AMDGPURegisterBankInfo::getDefaultMappingVOP(), llvm::AMDGPURegisterBankInfo::getImageMapping(), llvm::AArch64RegisterBankInfo::getInstrAlternativeMappings(), llvm::AMDGPURegisterBankInfo::getInstrAlternativeMappings(), llvm::X86RegisterBankInfo::getInstrAlternativeMappings(), llvm::AArch64RegisterBankInfo::getInstrMapping(), llvm::AMDGPURegisterBankInfo::getInstrMapping(), llvm::MipsRegisterBankInfo::getInstrMapping(), llvm::PPCRegisterBankInfo::getInstrMapping(), llvm::AMDGPURegisterBankInfo::getInstrMappingForLoad(), getInstrMappingImpl(), getRegClassesForCopy(), llvm::RegBankSelect::getRepairCost(), llvm::AMDGPURegisterBankInfo::getSGPROpMapping(), llvm::AMDGPURegisterBankInfo::getVGPROpMapping(), selectCopy(), and llvm::RegisterBankInfo::InstructionMapping::verify().
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Get the ValueMapping for the given arguments.
Definition at line 317 of file RegisterBankInfo.cpp.
References hashValueMapping(), and MapOfValueMappings.
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The most common ValueMapping consists of a single PartialMapping.
Feature a method for that.
Definition at line 300 of file RegisterBankInfo.cpp.
References getPartialMapping(), getValueMapping(), and llvm::Length.
Referenced by llvm::AMDGPURegisterBankInfo::getInstrMapping(), getInstrMappingImpl(), and getValueMapping().
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Returns true if the register bank is considered divergent.
Reimplemented in llvm::AMDGPURegisterBankInfo.
Definition at line 606 of file RegisterBankInfo.h.
Referenced by llvm::SIRegisterInfo::isUniformReg().
bool RegisterBankInfo::verify | ( | const TargetRegisterInfo & | TRI | ) | const |
Check that information hold by this instance make sense for the given TRI
.
Definition at line 70 of file RegisterBankInfo.cpp.
References assert(), llvm::dbgs(), End, llvm::RegisterBank::getID(), getNumRegBanks(), getRegBank(), Idx, LLVM_DEBUG, TRI, and llvm::RegisterBank::verify().
Identifier used when the related instruction mapping instance is generated by target independent code.
Make sure not to use that identifier to avoid possible collision.
Definition at line 672 of file RegisterBankInfo.h.
Referenced by applyMapping(), llvm::AArch64RegisterBankInfo::getInstrMapping(), llvm::ARMRegisterBankInfo::getInstrMapping(), llvm::M68kRegisterBankInfo::getInstrMapping(), llvm::MipsRegisterBankInfo::getInstrMapping(), llvm::PPCRegisterBankInfo::getInstrMapping(), llvm::RISCVRegisterBankInfo::getInstrMapping(), llvm::X86RegisterBankInfo::getInstrMapping(), and getInstrMappingImpl().
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Current HwMode for the target.
Definition at line 398 of file RegisterBankInfo.h.
Referenced by getMaximumSize().
Identifier used when the related instruction mapping instance is generated by the default constructor.
Make sure not to use that identifier.
Definition at line 677 of file RegisterBankInfo.h.
Referenced by llvm::RegisterBankInfo::InstructionMapping::isValid().
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Keep dynamically allocated InstructionMapping in a separate map.
This shouldn't be needed when everything gets TableGen'ed.
Definition at line 418 of file RegisterBankInfo.h.
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Keep dynamically allocated array of ValueMapping in a separate map.
This shouldn't be needed when everything gets TableGen'ed.
Definition at line 413 of file RegisterBankInfo.h.
Referenced by getOperandsMapping().
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mutableprotected |
Keep dynamically allocated PartialMapping in a separate map.
This shouldn't be needed when everything gets TableGen'ed.
Definition at line 403 of file RegisterBankInfo.h.
Referenced by getPartialMapping().
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mutableprotected |
Keep dynamically allocated ValueMapping in a separate map.
This shouldn't be needed when everything gets TableGen'ed.
Definition at line 408 of file RegisterBankInfo.h.
Referenced by getValueMapping().
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protected |
Total number of register banks.
Definition at line 392 of file RegisterBankInfo.h.
Referenced by getMaximumSize(), and getNumRegBanks().
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mutableprotected |
Getting the minimal register class of a physreg is expensive.
Cache this information as we get it.
Definition at line 422 of file RegisterBankInfo.h.
Referenced by getMinimalPhysRegClass().
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protected |
Hold the set of supported register banks.
Definition at line 389 of file RegisterBankInfo.h.
Referenced by getRegBank(), and RegisterBankInfo().
Hold the sizes of the register banks for all HwModes.
Definition at line 395 of file RegisterBankInfo.h.
Referenced by llvm::AMDGPURegisterBankInfo::addMappingFromTable(), and getMaximumSize().