16#define DEBUG_TYPE "cseinfo" 
   25                      "Analysis containing CSE Info", 
false, 
true)
 
   41  case TargetOpcode::G_ADD:
 
   42  case TargetOpcode::G_AND:
 
   43  case TargetOpcode::G_ASHR:
 
   44  case TargetOpcode::G_LSHR:
 
   45  case TargetOpcode::G_MUL:
 
   46  case TargetOpcode::G_OR:
 
   47  case TargetOpcode::G_SHL:
 
   48  case TargetOpcode::G_SUB:
 
   49  case TargetOpcode::G_XOR:
 
   50  case TargetOpcode::G_UDIV:
 
   51  case TargetOpcode::G_SDIV:
 
   52  case TargetOpcode::G_UREM:
 
   53  case TargetOpcode::G_SREM:
 
   54  case TargetOpcode::G_CONSTANT:
 
   55  case TargetOpcode::G_FCONSTANT:
 
   56  case TargetOpcode::G_IMPLICIT_DEF:
 
   57  case TargetOpcode::G_ZEXT:
 
   58  case TargetOpcode::G_SEXT:
 
   59  case TargetOpcode::G_ANYEXT:
 
   60  case TargetOpcode::G_UNMERGE_VALUES:
 
   61  case TargetOpcode::G_TRUNC:
 
   62  case TargetOpcode::G_PTR_ADD:
 
   63  case TargetOpcode::G_EXTRACT:
 
   64  case TargetOpcode::G_SELECT:
 
   65  case TargetOpcode::G_BUILD_VECTOR:
 
   66  case TargetOpcode::G_BUILD_VECTOR_TRUNC:
 
   67  case TargetOpcode::G_SEXT_INREG:
 
   68  case TargetOpcode::G_FADD:
 
   69  case TargetOpcode::G_FSUB:
 
   70  case TargetOpcode::G_FMUL:
 
   71  case TargetOpcode::G_FDIV:
 
   72  case TargetOpcode::G_FABS:
 
   74  case TargetOpcode::G_FMAXNUM:
 
   75  case TargetOpcode::G_FMINNUM:
 
   76  case TargetOpcode::G_FMAXNUM_IEEE:
 
   77  case TargetOpcode::G_FMINNUM_IEEE:
 
 
   84  return Opc == TargetOpcode::G_CONSTANT || 
Opc == TargetOpcode::G_FCONSTANT ||
 
   85         Opc == TargetOpcode::G_IMPLICIT_DEF;
 
 
   88std::unique_ptr<CSEConfigBase>
 
   90  std::unique_ptr<CSEConfigBase> Config;
 
   92    Config = std::make_unique<CSEConfigConstantOnly>();
 
   94    Config = std::make_unique<CSEConfigFull>();
 
 
  108bool GISelCSEInfo::isUniqueMachineInstValid(
 
  118  bool Removed = CSEMap.RemoveNode(UMI);
 
  120  assert(Removed && 
"Invalidation called on invalid UMI");
 
  127  auto *
Node = CSEMap.FindNodeOrInsertPos(
ID, InsertPos);
 
  129    if (!isUniqueMachineInstValid(*Node)) {
 
  130      invalidateUniqueMachineInstr(Node);
 
  134    if (
Node->MI->getParent() != 
MBB)
 
  143  UniqueMachineInstr *MaybeNewNode = UMI;
 
  145    CSEMap.InsertNode(UMI, InsertPos);
 
  147    MaybeNewNode = CSEMap.GetOrInsertNode(UMI);
 
  148  if (MaybeNewNode != UMI) {
 
  152  assert(InstrMapping.count(UMI->MI) == 0 &&
 
  153         "This instruction should not be in the map");
 
  154  InstrMapping[UMI->MI] = MaybeNewNode;
 
  159  auto *
Node = 
new (UniqueInstrAllocator) UniqueMachineInstr(
MI);
 
  163void GISelCSEInfo::insertInstr(
MachineInstr *
MI, 
void *InsertPos) {
 
  166  TemporaryInsts.remove(
MI);
 
  167  auto *
Node = getUniqueInstrForMI(
MI);
 
  168  insertNode(Node, InsertPos);
 
  175  if (
auto *Inst = getNodeIfExists(
ID, 
MBB, InsertPos)) {
 
  177    return const_cast<MachineInstr *
>(Inst->MI);
 
  184  ++OpcodeHitTable[
Opc];
 
 
  191    TemporaryInsts.insert(
MI);
 
 
  198  auto *UMI = InstrMapping.lookup(
MI);
 
  202    invalidateUniqueMachineInstr(UMI);
 
  203    InstrMapping.erase(
MI);
 
  210    insertNode(UMI, 
nullptr);
 
 
  219  if (
auto *UMI = InstrMapping.lookup(
MI)) {
 
  220    invalidateUniqueMachineInstr(UMI);
 
  221    InstrMapping.erase(
MI);
 
  223  TemporaryInsts.remove(
MI);
 
 
  227  if (HandlingRecordedInstrs)
 
  229  HandlingRecordedInstrs = 
true;
 
  230  while (!TemporaryInsts.empty()) {
 
  231    auto *
MI = TemporaryInsts.pop_back_val();
 
  234  HandlingRecordedInstrs = 
false;
 
 
  238  assert(CSEOpt.get() && 
"CSEConfig not set");
 
  239  return CSEOpt->shouldCSEOpc(
Opc);
 
 
  253  for (
auto &
MBB : MF) {
 
 
  266  InstrMapping.clear();
 
  267  UniqueInstrAllocator.Reset();
 
  268  TemporaryInsts.clear();
 
  273  OpcodeHitTable.clear();
 
 
  281  return OS.
str().c_str();
 
 
  291  for (
auto &It : InstrMapping) {
 
  296        CSEMap.FindNodeOrInsertPos(TmpID, InsertPos);
 
  297    if (FoundNode != It.second)
 
  299                               "CSEMap mismatch, InstrMapping has MIs without " 
  300                               "corresponding Nodes in CSEMap:\n%s",
 
  307    if (!InstrMapping.count(UMI.MI))
 
  309                               "Node in CSE without InstrMapping:\n%s",
 
  312    if (InstrMapping[UMI.MI] != &UMI)
 
  314                               "Mismatch in CSE mapping:\n%s\n%s",
 
 
  324    for (
auto &It : OpcodeHitTable)
 
  325      dbgs() << 
"CSEInfo::CSE Hit for Opc " << It.first << 
" : " << It.second
 
 
  335  for (
const auto &
Op : 
MI->operands())
 
 
  349  uint64_t Val = Ty.getUniqueRAWLLTData();
 
 
  388  ID.AddInteger(Reg.id());
 
 
  427  } 
else if (MO.
isImm())
 
  428    ID.AddInteger(MO.
getImm());
 
 
  444  if (!AlreadyComputed || Recompute) {
 
  445    Info.releaseMemory();
 
  446    Info.setCSEConfig(std::move(CSEOpt));
 
  448    AlreadyComputed = 
true;
 
 
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
static const char * stringify(const MachineInstr *MI, std::string &S)
Provides analysis for continuously CSEing during GISel passes.
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Represent the analysis usage information of a pass.
void setPreservesAll()
Set by analyses that do not transform their input at all.
bool shouldCSEOpc(unsigned Opc) override
bool shouldCSEOpc(unsigned Opc) override
------— CSEConfigFull -------— ///
Lightweight error class with error context and mandatory checking.
static ErrorSuccess success()
Create a success value.
FoldingSetNodeID - This class is used to gather all the unique data bits of a node.
The actual analysis pass wrapper.
void releaseMemory() override
releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memo...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
GISelCSEAnalysisWrapperPass()
LLVM_ABI GISelCSEInfo & get(std::unique_ptr< CSEConfigBase > CSEOpt, bool ReCompute=false)
Takes a CSEConfigBase object that defines what opcodes get CSEd.
bool shouldCSE(unsigned Opc) const
void changingInstr(MachineInstr &MI) override
This instruction is about to be mutated in some way.
void analyze(MachineFunction &MF)
void changedInstr(MachineInstr &MI) override
This instruction was mutated in some way.
void recordNewInstruction(MachineInstr *MI)
Records a newly created inst in a list and lazily insert it to the CSEMap.
void setMF(MachineFunction &MF)
-----— GISelCSEInfo ----------—//
void erasingInstr(MachineInstr &MI) override
An instruction is about to be erased.
void countOpcodeHit(unsigned Opc)
void handleRecordedInsts()
Use this callback to insert all the recorded instructions.
void handleRecordedInst(MachineInstr *MI)
Use this callback to inform CSE about a newly fully created instruction.
void handleRemoveInst(MachineInstr *MI)
Remove this inst from the CSE map.
void createdInstr(MachineInstr &MI) override
An instruction has been created and inserted into the function.
LLVM_ABI const GISelInstProfileBuilder & addNodeIDOpcode(unsigned Opc) const
LLVM_ABI const GISelInstProfileBuilder & addNodeIDRegNum(Register Reg) const
LLVM_ABI const GISelInstProfileBuilder & addNodeIDFlag(unsigned Flag) const
LLVM_ABI const GISelInstProfileBuilder & addNodeIDImmediate(int64_t Imm) const
LLVM_ABI const GISelInstProfileBuilder & addNodeIDReg(Register Reg) const
LLVM_ABI const GISelInstProfileBuilder & addNodeID(const MachineInstr *MI) const
LLVM_ABI const GISelInstProfileBuilder & addNodeIDMBB(const MachineBasicBlock *MBB) const
GISelInstProfileBuilder(FoldingSetNodeID &ID, const MachineRegisterInfo &MRI)
LLVM_ABI const GISelInstProfileBuilder & addNodeIDRegType(const LLT Ty) const
LLVM_ABI const GISelInstProfileBuilder & addNodeIDMachineOperand(const MachineOperand &MO) const
MachineFunctionPass(char &ID)
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
const ConstantInt * getCImm() const
bool isCImm() const
isCImm - Test if this is a MO_CImmediate operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
Register getReg() const
getReg - Returns the register number.
const ConstantFP * getFPImm() const
unsigned getPredicate() const
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
bool isFPImm() const
isFPImm - Tests if this is a MO_FPImmediate operand.
static LLVM_ABI PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
This class implements the register bank concept.
Wrapper class representing virtual and physical registers.
A class that wraps MachineInstrs and derives from FoldingSetNode in order to be uniqued in a CSEMap.
LLVM_ABI void Profile(FoldingSetNodeID &ID)
-----— UniqueMachineInstr ----------—//
A raw_ostream that writes to an std::string.
std::string & str()
Returns the string's reference.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
NodeAddr< NodeBase * > Node
This is an optimization pass for GlobalISel generic memory operations.
PointerUnion< const TargetRegisterClass *, const RegisterBank * > RegClassOrRegBank
Convenient type to represent either a register class or a register bank.
auto dyn_cast_if_present(const Y &Val)
dyn_cast_if_present<X> - Functionally identical to dyn_cast, except that a null (or none in the case ...
Error createStringError(std::error_code EC, char const *Fmt, const Ts &... Vals)
Create formatted StringError object.
LLVM_ABI std::unique_ptr< CSEConfigBase > getStandardCSEConfigForOpt(CodeGenOptLevel Level)
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
CodeGenOptLevel
Code generation optimization level.
DWARFExpression::Operation Op
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
LLVM_ABI void initializeGISelCSEAnalysisWrapperPassPass(PassRegistry &)
All attributes(register class or bank and low-level type) a virtual register can have.