LLVM 22.0.0git
RISCVFrameLowering.cpp File Reference

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "riscv-frame"

Functions

static Align getABIStackAlignment (RISCVABI::ABI ABI)
static bool needsDwarfCFI (const MachineFunction &MF)
 Returns true if DWARF CFI instructions ("frame moves") should be emitted.
static void emitSCSPrologue (MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL)
static void emitSCSEpilogue (MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL)
static void emitSiFiveCLICStackSwap (MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL)
static void createSiFivePreemptibleInterruptFrameEntries (MachineFunction &MF, RISCVMachineFunctionInfo &RVFI)
static void emitSiFiveCLICPreemptibleSaves (MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL)
static void emitSiFiveCLICPreemptibleRestores (MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL)
static int getLibCallID (const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
static const chargetSpillLibCallName (const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
static const chargetRestoreLibCallName (const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
static unsigned getNumPushPopRegs (const std::vector< CalleeSavedInfo > &CSI)
static SmallVector< CalleeSavedInfo, 8 > getUnmanagedCSI (const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
static SmallVector< CalleeSavedInfo, 8 > getRVVCalleeSavedInfo (const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
static SmallVector< CalleeSavedInfo, 8 > getPushOrLibCallsSavedInfo (const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
static SmallVector< CalleeSavedInfo, 8 > getQCISavedInfo (const MachineFunction &MF, const std::vector< CalleeSavedInfo > &CSI)
static void appendScalableVectorExpression (const TargetRegisterInfo &TRI, SmallVectorImpl< char > &Expr, int FixedOffset, int ScalableOffset, llvm::raw_string_ostream &Comment)
static MCCFIInstruction createDefCFAExpression (const TargetRegisterInfo &TRI, Register Reg, uint64_t FixedOffset, uint64_t ScalableOffset)
static MCCFIInstruction createDefCFAOffset (const TargetRegisterInfo &TRI, Register Reg, uint64_t FixedOffset, uint64_t ScalableOffset)
static bool isPush (unsigned Opcode)
static bool isPop (unsigned Opcode)
static unsigned getPushOpcode (RISCVMachineFunctionInfo::PushPopKind Kind, bool UpdateFP)
static unsigned getPopOpcode (RISCVMachineFunctionInfo::PushPopKind Kind)
static MCRegister getRVVBaseRegister (const RISCVRegisterInfo &TRI, const Register &Reg)
static unsigned getScavSlotsNumForRVV (MachineFunction &MF)
static bool hasRVVFrameObject (const MachineFunction &MF)
static unsigned estimateFunctionSizeInBytes (const MachineFunction &MF, const RISCVInstrInfo &TII)
static unsigned getCalleeSavedRVVNumRegs (const Register &BaseReg)
static void emitStackProbeInline (MachineBasicBlock::iterator MBBI, DebugLoc DL, Register TargetReg, bool IsRVV)

Variables

static constexpr MCPhysReg FPReg = RISCV::X8
static constexpr MCPhysReg SPReg = RISCV::X2
static constexpr MCPhysReg RAReg = RISCV::X1
static const MCPhysReg FixedCSRFIMap []
static constexpr uint64_t QCIInterruptPushAmount = 96
static const std::pair< MCPhysReg, int8_t > FixedCSRFIQCIInterruptMap []

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "riscv-frame"

Definition at line 31 of file RISCVFrameLowering.cpp.

Function Documentation

◆ appendScalableVectorExpression()

void appendScalableVectorExpression ( const TargetRegisterInfo & TRI,
SmallVectorImpl< char > & Expr,
int FixedOffset,
int ScalableOffset,
llvm::raw_string_ostream & Comment )
static

◆ createDefCFAExpression()

◆ createDefCFAOffset()

◆ createSiFivePreemptibleInterruptFrameEntries()

◆ emitSCSEpilogue()

◆ emitSCSPrologue()

◆ emitSiFiveCLICPreemptibleRestores()

◆ emitSiFiveCLICPreemptibleSaves()

◆ emitSiFiveCLICStackSwap()

◆ emitStackProbeInline()

◆ estimateFunctionSizeInBytes()

unsigned estimateFunctionSizeInBytes ( const MachineFunction & MF,
const RISCVInstrInfo & TII )
static

Definition at line 1761 of file RISCVFrameLowering.cpp.

References llvm::MachineFunction::getSubtarget(), MBB, MI, and TII.

◆ getABIStackAlignment()

Align getABIStackAlignment ( RISCVABI::ABI ABI)
static

◆ getCalleeSavedRVVNumRegs()

unsigned getCalleeSavedRVVNumRegs ( const Register & BaseReg)
static

Definition at line 2188 of file RISCVFrameLowering.cpp.

◆ getLibCallID()

◆ getNumPushPopRegs()

unsigned getNumPushPopRegs ( const std::vector< CalleeSavedInfo > & CSI)
static

◆ getPopOpcode()

◆ getPushOpcode()

◆ getPushOrLibCallsSavedInfo()

◆ getQCISavedInfo()

◆ getRestoreLibCallName()

const char * getRestoreLibCallName ( const MachineFunction & MF,
const std::vector< CalleeSavedInfo > & CSI )
static

◆ getRVVBaseRegister()

MCRegister getRVVBaseRegister ( const RISCVRegisterInfo & TRI,
const Register & Reg )
static

Definition at line 1558 of file RISCVFrameLowering.cpp.

References Reg, and TRI.

Referenced by llvm::RISCVFrameLowering::determineCalleeSaves().

◆ getRVVCalleeSavedInfo()

◆ getScavSlotsNumForRVV()

◆ getSpillLibCallName()

const char * getSpillLibCallName ( const MachineFunction & MF,
const std::vector< CalleeSavedInfo > & CSI )
static

◆ getUnmanagedCSI()

◆ hasRVVFrameObject()

◆ isPop()

bool isPop ( unsigned Opcode)
static

◆ isPush()

bool isPush ( unsigned Opcode)
static

Definition at line 867 of file RISCVFrameLowering.cpp.

Referenced by llvm::RISCVFrameLowering::emitPrologue().

◆ needsDwarfCFI()

bool needsDwarfCFI ( const MachineFunction & MF)
static

Variable Documentation

◆ FixedCSRFIMap

const MCPhysReg FixedCSRFIMap[]
static
Initial value:
= {
RAReg, FPReg, RISCV::X9,
RISCV::X18, RISCV::X19, RISCV::X20,
RISCV::X21, RISCV::X22, RISCV::X23,
RISCV::X24, RISCV::X25, RISCV::X26,
RISCV::X27}
static constexpr MCPhysReg FPReg
static constexpr MCPhysReg RAReg

Definition at line 63 of file RISCVFrameLowering.cpp.

Referenced by llvm::RISCVFrameLowering::assignCalleeSavedSpillSlots(), getNumPushPopRegs(), getPushOrLibCallsSavedInfo(), llvm::RISCVFrameLowering::restoreCalleeSavedRegisters(), and llvm::RISCVFrameLowering::spillCalleeSavedRegisters().

◆ FixedCSRFIQCIInterruptMap

const std::pair<MCPhysReg, int8_t> FixedCSRFIQCIInterruptMap[]
static
Initial value:
= {
{ FPReg, -2},
{ RAReg, -4},
{ RISCV::X5, -6},
{ RISCV::X6, -7},
{ RISCV::X7, -8},
{ RISCV::X10, -9},
{ RISCV::X11, -10},
{ RISCV::X12, -11},
{ RISCV::X13, -12},
{ RISCV::X14, -13},
{ RISCV::X15, -14},
{ RISCV::X16, -15},
{ RISCV::X17, -16},
{ RISCV::X28, -17},
{ RISCV::X29, -18},
{ RISCV::X30, -19},
{ RISCV::X31, -20},
}

Definition at line 74 of file RISCVFrameLowering.cpp.

Referenced by llvm::RISCVFrameLowering::assignCalleeSavedSpillSlots(), getPushOrLibCallsSavedInfo(), getQCISavedInfo(), and llvm::RISCVFrameLowering::spillCalleeSavedRegisters().

◆ FPReg

◆ QCIInterruptPushAmount

uint64_t QCIInterruptPushAmount = 96
staticconstexpr

◆ RAReg

MCPhysReg RAReg = RISCV::X1
staticconstexpr

◆ SPReg

MCPhysReg SPReg = RISCV::X2
staticconstexpr

Definition at line 54 of file RISCVFrameLowering.cpp.

Referenced by llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::RISCVFrameLowering::allocateStack(), llvm::AMDGPURegisterBankInfo::applyMappingDynStackAlloc(), createDefCFAExpression(), llvm::CSKYFrameLowering::eliminateCallFramePseudoInstr(), llvm::LoongArchFrameLowering::eliminateCallFramePseudoInstr(), llvm::RISCVFrameLowering::eliminateCallFramePseudoInstr(), llvm::SIFrameLowering::eliminateCallFramePseudoInstr(), llvm::RISCVTargetLowering::emitDynamicProbedAlloc(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), llvm::CSKYFrameLowering::emitEpilogue(), llvm::LoongArchFrameLowering::emitEpilogue(), llvm::PPCFrameLowering::emitEpilogue(), llvm::RISCVFrameLowering::emitEpilogue(), llvm::SystemZXPLINKFrameLowering::emitEpilogue(), llvm::WebAssemblyFrameLowering::emitEpilogue(), llvm::PPCTargetLowering::emitProbedAlloca(), llvm::CSKYFrameLowering::emitPrologue(), llvm::LoongArchFrameLowering::emitPrologue(), llvm::PPCFrameLowering::emitPrologue(), llvm::RISCVFrameLowering::emitPrologue(), llvm::WebAssemblyFrameLowering::emitPrologue(), emitSiFiveCLICStackSwap(), emitStackProbeInline(), llvm::LegalizerHelper::getDynStackAllocTargetPtr(), llvm::RISCVFrameLowering::getFrameIndexReference(), M68kOutgoingArgHandler::getStackAddress(), llvm::PPCFrameLowering::inlineStackProbe(), llvm::PPCInstrInfo::isTOCSaveMI(), llvm::LanaiTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::SITargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), and llvm::LegalizerHelper::lowerDynStackAlloc().