40#define DEBUG_TYPE "x86-fl"
42STATISTIC(NumFrameLoopProbe,
"Number of loop stack probes used in prologue");
44 "Number of extra stack probes generated in prologue");
45STATISTIC(NumFunctionUsingPush2Pop2,
"Number of functions using push2/pop2");
78 (
hasFP(MF) && !
TRI->hasStackRealignment(MF)) ||
79 TRI->hasBasePointer(MF);
111 return IsLP64 ? X86::SUB64ri32 : X86::SUB32ri;
115 return IsLP64 ? X86::ADD64ri32 : X86::ADD32ri;
119 return IsLP64 ? X86::SUB64rr : X86::SUB32rr;
123 return IsLP64 ? X86::ADD64rr : X86::ADD32rr;
127 return IsLP64 ? X86::AND64ri32 : X86::AND32ri;
131 return IsLP64 ? X86::LEA64r : X86::LEA32r;
137 return X86::MOV32ri64;
139 return X86::MOV64ri32;
163 return ST.is64Bit() ? (ST.hasPPX() ? X86::PUSHP64r : X86::PUSH64r)
167 return ST.is64Bit() ? (ST.hasPPX() ? X86::POPP64r : X86::POP64r)
171 return ST.hasPPX() ? X86::PUSH2P : X86::PUSH2;
174 return ST.hasPPX() ? X86::POP2P : X86::POP2;
181 if (
Reg == X86::RAX ||
Reg == X86::EAX ||
Reg == X86::AX ||
182 Reg == X86::AH ||
Reg == X86::AL)
196 bool BreakNext =
false;
201 if (
Reg != X86::EFLAGS)
222 if (Succ->isLiveIn(X86::EFLAGS))
235 bool InEpilogue)
const {
236 bool isSub = NumBytes < 0;
252 const bool EmitInlineStackProbe = TLI.hasInlineStackProbe(MF);
256 if (EmitInlineStackProbe && !InEpilogue) {
284 MI->getOperand(3).setIsDead();
311 MI->getOperand(3).setIsDead();
330 unsigned Opc = isSub ? (
Is64Bit ? X86::PUSH64r : X86::PUSH32r)
331 : (
Is64Bit ? X86::POP64r : X86::POP32r);
341 BuildStackAdjustment(
MBB,
MBBI,
DL, isSub ? -ThisVal : ThisVal, InEpilogue)
351 assert(
Offset != 0 &&
"zero offset stack adjustment requested");
361 UseLEA =
STI.useLeaForSP() ||
MBB.isLiveIn(X86::EFLAGS);
369 if (UseLEA && !
STI.useLeaForSP())
374 "We shouldn't have allowed this insertion point");
377 MachineInstrBuilder
MI;
391 MI->getOperand(3).setIsDead();
396template <
typename FoundT,
typename CalcT>
399 FoundT FoundStackAdjust,
401 bool doMergeWithPrevious)
const {
404 return CalcNewOffset(0);
420 if (doMergeWithPrevious && PI !=
MBB.
begin() && PI->isCFIInstruction())
425 unsigned Opc = PI->getOpcode();
427 if ((
Opc == X86::ADD64ri32 ||
Opc == X86::ADD32ri) &&
428 PI->getOperand(0).getReg() ==
StackPtr) {
430 Offset = PI->getOperand(2).getImm();
431 }
else if ((
Opc == X86::LEA32r ||
Opc == X86::LEA64_32r) &&
432 PI->getOperand(0).getReg() ==
StackPtr &&
433 PI->getOperand(1).getReg() ==
StackPtr &&
434 PI->getOperand(2).getImm() == 1 &&
435 PI->getOperand(3).getReg() == X86::NoRegister &&
436 PI->getOperand(5).getReg() == X86::NoRegister) {
438 Offset = PI->getOperand(4).getImm();
439 }
else if ((
Opc == X86::SUB64ri32 ||
Opc == X86::SUB32ri) &&
440 PI->getOperand(0).getReg() ==
StackPtr) {
442 Offset = -PI->getOperand(2).getImm();
444 return CalcNewOffset(0);
446 FoundStackAdjust(PI,
Offset);
450 if (doMergeWithPrevious ? (PI ==
MBB.
begin()) : (PI ==
MBB.
end()))
451 return CalcNewOffset(0);
453 PI = doMergeWithPrevious ? std::prev(PI) : std::next(PI);
457 if (PI !=
MBB.
end() && PI->isCFIInstruction()) {
459 MCCFIInstruction CI = CIs[PI->getOperand(0).getCFIIndex()];
464 if (!doMergeWithPrevious)
467 return CalcNewOffset(
Offset);
473 bool doMergeWithPrevious)
const {
474 return mergeSPUpdates(
476 doMergeWithPrevious);
509 unsigned DwarfReg =
MRI->getDwarfRegNum(MachineFramePtr,
true);
532 unsigned DwarfReg =
MRI->getDwarfRegNum(Reg,
true);
543 CfaExpr.
push_back(dwarf::DW_CFA_expression);
549 STI.isTarget64BitILP32()
552 unsigned DwarfFramePtr =
MRI->getDwarfRegNum(MachineFramePtr,
true);
568 int FI =
MI->getOperand(1).getIndex();
573 STI.isTarget64BitILP32()
576 unsigned DwarfFramePtr =
MRI->getDwarfRegNum(MachineFramePtr,
true);
583 DefCfaExpr.
push_back(dwarf::DW_CFA_def_cfa_expression);
593void X86FrameLowering::emitZeroCallUsedRegs(
BitVector RegsToZero,
609 if (!X86::RFP80RegClass.
contains(Reg))
612 unsigned NumFPRegs = ST.is64Bit() ? 8 : 7;
613 for (
unsigned i = 0; i != NumFPRegs; ++i)
616 for (
unsigned i = 0; i != NumFPRegs; ++i)
624 if (
TRI->isGeneralPurposeRegister(MF,
Reg)) {
630 for (MCRegister
Reg : GPRsToZero.set_bits())
641 std::optional<MachineFunction::DebugInstrOperandPair> InstrNum)
const {
643 if (
STI.isTargetWindowsCoreCLR()) {
648 emitStackProbeInline(MF,
MBB,
MBBI,
DL,
false);
651 emitStackProbeCall(MF,
MBB,
MBBI,
DL, InProlog, InstrNum);
656 return STI.isOSWindows() && !
STI.isTargetWin64();
662 return MI.getOpcode() == X86::STACKALLOC_W_PROBING;
664 if (Where != PrologMBB.
end()) {
666 emitStackProbeInline(MF, PrologMBB, Where,
DL,
true);
667 Where->eraseFromParent();
675 bool InProlog)
const {
678 emitStackProbeInlineWindowsCoreCLR64(MF,
MBB,
MBBI,
DL, InProlog);
680 emitStackProbeInlineGeneric(MF,
MBB,
MBBI,
DL, InProlog);
683void X86FrameLowering::emitStackProbeInlineGeneric(
692 "different expansion expected for CoreCLR 64 bit");
694 const uint64_t StackProbeSize = TLI.getStackProbeSize(MF);
695 uint64_t ProbeChunk = StackProbeSize * 8;
698 TRI->hasStackRealignment(MF) ? calculateMaxStackAlign(MF) : 0;
703 if (
Offset > ProbeChunk) {
705 MaxAlign % StackProbeSize);
708 MaxAlign % StackProbeSize);
712void X86FrameLowering::emitStackProbeInlineGenericBlock(
715 uint64_t AlignOffset)
const {
717 const bool NeedsDwarfCFI = needsDwarfCFI(MF);
720 const X86TargetLowering &TLI = *
STI.getTargetLowering();
721 const unsigned MovMIOpc =
Is64Bit ? X86::MOV64mi32 : X86::MOV32mi;
722 const uint64_t StackProbeSize = TLI.getStackProbeSize(MF);
724 uint64_t CurrentOffset = 0;
726 assert(AlignOffset < StackProbeSize);
729 if (StackProbeSize <
Offset + AlignOffset) {
732 BuildStackAdjustment(
MBB,
MBBI,
DL, -StackAdjustment,
false)
734 if (!HasFP && NeedsDwarfCFI) {
745 NumFrameExtraProbe++;
746 CurrentOffset = StackProbeSize - AlignOffset;
752 while (CurrentOffset + StackProbeSize <
Offset) {
753 BuildStackAdjustment(
MBB,
MBBI,
DL, -StackProbeSize,
false)
756 if (!HasFP && NeedsDwarfCFI) {
766 NumFrameExtraProbe++;
767 CurrentOffset += StackProbeSize;
771 uint64_t ChunkSize =
Offset - CurrentOffset;
776 unsigned Opc =
Is64Bit ? X86::PUSH64r : X86::PUSH32r;
781 BuildStackAdjustment(
MBB,
MBBI,
DL, -ChunkSize,
false)
788void X86FrameLowering::emitStackProbeInlineGenericLoop(
791 uint64_t AlignOffset)
const {
796 "Inline stack probe loop will clobber live EFLAGS.");
798 const bool NeedsDwarfCFI = needsDwarfCFI(MF);
801 const X86TargetLowering &TLI = *
STI.getTargetLowering();
802 const unsigned MovMIOpc =
Is64Bit ? X86::MOV64mi32 : X86::MOV32mi;
803 const uint64_t StackProbeSize = TLI.getStackProbeSize(MF);
806 if (AlignOffset < StackProbeSize) {
808 BuildStackAdjustment(
MBB,
MBBI,
DL, -AlignOffset,
false)
816 NumFrameExtraProbe++;
829 MF.
insert(MBBIter, testMBB);
830 MF.
insert(MBBIter, tailMBB);
870 if (!HasFP && NeedsDwarfCFI) {
873 const Register DwarfFinalStackProbed =
874 STI.isTarget64BitILP32()
880 nullptr,
TRI->getDwarfRegNum(DwarfFinalStackProbed,
true)));
887 BuildStackAdjustment(*testMBB, testMBB->
end(),
DL, -StackProbeSize,
918 const uint64_t TailOffset =
Offset % StackProbeSize;
921 BuildStackAdjustment(*tailMBB, TailMBBIter,
DL, -TailOffset,
927 if (!HasFP && NeedsDwarfCFI) {
931 STI.isTarget64BitILP32()
937 nullptr,
TRI->getDwarfRegNum(DwarfStackPtr,
true)));
944void X86FrameLowering::emitStackProbeInlineWindowsCoreCLR64(
948 assert(
STI.is64Bit() &&
"different expansion needed for 32 bit");
949 assert(
STI.isTargetWindowsCoreCLR() &&
"custom expansion expects CoreCLR");
950 const TargetInstrInfo &
TII = *
STI.getInstrInfo();
955 "Inline stack probe loop will clobber live EFLAGS.");
990 MF.
insert(MBBIter, RoundMBB);
991 MF.
insert(MBBIter, LoopMBB);
992 MF.
insert(MBBIter, ContinueMBB);
1000 const int64_t ThreadEnvironmentStackLimit = 0x10;
1002 const int64_t PageMask = ~(
PageSize - 1);
1007 const TargetRegisterClass *RegClass = &X86::GR64RegClass;
1009 SizeReg = InProlog ? X86::RAX :
MRI.createVirtualRegister(RegClass),
1010 ZeroReg = InProlog ? X86::RCX :
MRI.createVirtualRegister(RegClass),
1011 CopyReg = InProlog ? X86::RDX :
MRI.createVirtualRegister(RegClass),
1012 TestReg = InProlog ? X86::RDX :
MRI.createVirtualRegister(RegClass),
1013 FinalReg = InProlog ? X86::RDX :
MRI.createVirtualRegister(RegClass),
1014 RoundedReg = InProlog ? X86::RDX :
MRI.createVirtualRegister(RegClass),
1015 LimitReg = InProlog ? X86::RCX :
MRI.createVirtualRegister(RegClass),
1016 JoinReg = InProlog ? X86::RCX :
MRI.createVirtualRegister(RegClass),
1017 ProbeReg = InProlog ? X86::RCX :
MRI.createVirtualRegister(RegClass);
1020 int64_t RCXShadowSlot = 0;
1021 int64_t RDXShadowSlot = 0;
1028 X86MachineFunctionInfo *X86FI = MF.
getInfo<X86MachineFunctionInfo>();
1037 int64_t InitSlot = 8 + CalleeSaveSize + (
HasFP ? 8 : 0);
1041 RCXShadowSlot = InitSlot;
1043 RDXShadowSlot = InitSlot;
1044 if (IsRDXLiveIn && IsRCXLiveIn)
1085 .
addImm(ThreadEnvironmentStackLimit)
1096 BuildMI(RoundMBB,
DL,
TII.get(X86::AND64ri32), RoundedReg)
1141 TII.get(X86::MOV64rm), X86::RCX),
1142 X86::RSP,
false, RCXShadowSlot);
1145 TII.get(X86::MOV64rm), X86::RDX),
1146 X86::RSP,
false, RDXShadowSlot);
1151 BuildMI(*ContinueMBB, ContinueMBBI,
DL,
TII.get(X86::SUB64rr), X86::RSP)
1163 LivePhysRegs LiveRegs;
1169 for (++BeforeMBBI; BeforeMBBI !=
MBB.
end(); ++BeforeMBBI) {
1172 for (MachineInstr &
MI : *RoundMBB) {
1175 for (MachineInstr &
MI : *LoopMBB) {
1178 for (MachineInstr &
MI :
1185void X86FrameLowering::emitStackProbeCall(
1188 std::optional<MachineFunction::DebugInstrOperandPair> InstrNum)
const {
1192 if (
Is64Bit && IsLargeCodeModel &&
STI.useIndirectThunkCalls())
1194 "code model and indirect thunks not yet implemented.");
1198 "Stack probe calls will clobber live EFLAGS.");
1202 CallOp = IsLargeCodeModel ? X86::CALL64r : X86::CALL64pcrel32;
1204 CallOp = X86::CALLpcrel32;
1206 StringRef
Symbol =
STI.getTargetLowering()->getStackProbeSymbolName(MF);
1208 MachineInstrBuilder CI;
1232 MachineInstr *ModInst = CI;
1233 if (
STI.isTargetWin64() || !
STI.isOSWindows()) {
1250 if (
STI.isTargetWin64() || !
STI.isOSWindows()) {
1265 for (++ExpansionMBBI; ExpansionMBBI !=
MBBI; ++ExpansionMBBI)
1273 const uint64_t Win64MaxSEHOffset = 128;
1274 uint64_t SEHFrameOffset = std::min(SPAdjust, Win64MaxSEHOffset);
1276 return SEHFrameOffset & -16;
1284X86FrameLowering::calculateMaxStackAlign(
const MachineFunction &MF)
const {
1291 MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign;
1298 MaxAlign = (MaxAlign > 16) ? MaxAlign :
Align(16);
1300 MaxAlign =
Align(16);
1302 return MaxAlign.
value();
1308 uint64_t MaxAlign)
const {
1309 uint64_t Val = -MaxAlign;
1314 const X86TargetLowering &TLI = *
STI.getTargetLowering();
1315 const uint64_t StackProbeSize = TLI.getStackProbeSize(MF);
1316 const bool EmitInlineStackProbe = TLI.hasInlineStackProbe(MF);
1321 if (
Reg ==
StackPtr && EmitInlineStackProbe && MaxAlign >= StackProbeSize) {
1323 NumFrameLoopProbe++;
1324 MachineBasicBlock *entryMBB =
1326 MachineBasicBlock *headMBB =
1328 MachineBasicBlock *bodyMBB =
1330 MachineBasicBlock *footMBB =
1334 MF.
insert(MBBIter, entryMBB);
1335 MF.
insert(MBBIter, headMBB);
1336 MF.
insert(MBBIter, bodyMBB);
1337 MF.
insert(MBBIter, footMBB);
1338 const unsigned MovMIOpc =
Is64Bit ? X86::MOV64mi32 : X86::MOV32mi;
1347 BuildMI(entryMBB,
DL,
TII.get(TargetOpcode::COPY), FinalStackProbed)
1351 BuildMI(entryMBB,
DL,
TII.get(AndOp), FinalStackProbed)
1352 .
addReg(FinalStackProbed)
1357 MI->getOperand(3).setIsDead();
1361 .
addReg(FinalStackProbed)
1384 .
addReg(FinalStackProbed)
1414 .
addReg(FinalStackProbed)
1430 .
addReg(FinalStackProbed)
1449 MI->getOperand(3).setIsDead();
1457 "MF used frame lowering for wrong subtarget");
1466bool X86FrameLowering::isWin64Prologue(
const MachineFunction &MF)
const {
1470bool X86FrameLowering::needsDwarfCFI(
const MachineFunction &MF)
const {
1477 case X86::REPNE_PREFIX:
1478 case X86::REP_MOVSB_32:
1479 case X86::REP_MOVSB_64:
1480 case X86::REP_MOVSD_32:
1481 case X86::REP_MOVSD_64:
1482 case X86::REP_MOVSQ_32:
1483 case X86::REP_MOVSQ_64:
1484 case X86::REP_MOVSW_32:
1485 case X86::REP_MOVSW_64:
1486 case X86::REP_PREFIX:
1487 case X86::REP_STOSB_32:
1488 case X86::REP_STOSB_64:
1489 case X86::REP_STOSD_32:
1490 case X86::REP_STOSD_64:
1491 case X86::REP_STOSQ_32:
1492 case X86::REP_STOSQ_64:
1493 case X86::REP_STOSW_32:
1494 case X86::REP_STOSW_64:
1590 "MF used frame lowering for wrong subtarget");
1595 uint64_t MaxAlign = calculateMaxStackAlign(MF);
1597 bool IsFunclet =
MBB.isEHFuncletEntry();
1601 bool FnHasClrFunclet =
1603 bool IsClrFunclet = IsFunclet && FnHasClrFunclet;
1604 bool HasFP =
hasFP(MF);
1605 bool IsWin64Prologue = isWin64Prologue(MF);
1608 bool NeedsWinFPO = !IsFunclet &&
STI.isTargetWin32() &&
1610 bool NeedsWinCFI = NeedsWin64CFI || NeedsWinFPO;
1611 bool NeedsDwarfCFI = needsDwarfCFI(MF);
1617 bool HasWinCFI =
false;
1628 ArgBaseReg =
MI->getOperand(0).getReg();
1641 if (NeedsDwarfCFI) {
1643 unsigned DwarfStackPtr =
TRI->getDwarfRegNum(ArgBaseReg,
true);
1662 if (TailCallArgReserveSize && IsWin64Prologue)
1665 const bool EmitStackProbeCall =
1666 STI.getTargetLowering()->hasStackProbeSymbol(MF);
1667 unsigned StackProbeSize =
STI.getTargetLowering()->getStackProbeSize(MF);
1672 if (
STI.swiftAsyncContextIsDynamicallySet()) {
1682 .
addUse(X86::NoRegister);
1690 "win64 prologue does not set the bit 60 in the saved frame pointer");
1732 !EmitStackProbeCall &&
1740 StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0);
1747 if (TailCallArgReserveSize != 0) {
1748 BuildStackAdjustment(
MBB,
MBBI,
DL, -(
int)TailCallArgReserveSize,
1777 if (IsWin64Prologue && IsFunclet && !IsClrFunclet) {
1785 MBB.addLiveIn(Establisher);
1797 if (
TRI->hasStackRealignment(MF) && !IsWin64Prologue)
1798 NumBytes =
alignTo(NumBytes, MaxAlign);
1806 if (NeedsDwarfCFI && !ArgBaseReg.
isValid()) {
1812 nullptr, -2 * stackGrowth + (
int)TailCallArgReserveSize),
1816 unsigned DwarfFramePtr =
TRI->getDwarfRegNum(MachineFramePtr,
true);
1820 (
int)TailCallArgReserveSize),
1833 assert(!IsWin64Prologue &&
1834 "win64 prologue does not store async context right below rbp");
1840 if (Attrs.hasAttrSomewhere(Attribute::SwiftAsync)) {
1843 MBB.addLiveIn(X86::R14);
1875 if (!IsWin64Prologue && !IsFunclet) {
1884 if (NeedsDwarfCFI) {
1887 CfaExpr.
push_back(dwarf::DW_CFA_expression);
1889 unsigned DwarfReg =
TRI->getDwarfRegNum(MachineFramePtr,
true);
1901 unsigned DwarfFramePtr =
TRI->getDwarfRegNum(MachineFramePtr,
true);
1920 assert(!IsFunclet &&
"funclets without FPs not yet implemented");
1928 if (HasFP &&
TRI->hasStackRealignment(MF))
1936 unsigned ParentFrameNumBytes = NumBytes;
1938 NumBytes = getWinEHFuncletFrameSize(MF);
1941 bool PushedRegs =
false;
1947 unsigned Opc =
MBBI->getOpcode();
1948 return Opc == X86::PUSH32r ||
Opc == X86::PUSH64r ||
Opc == X86::PUSHP64r ||
1949 Opc == X86::PUSH2 ||
Opc == X86::PUSH2P;
1952 while (IsCSPush(
MBBI)) {
1957 unsigned Opc = LastCSPush->getOpcode();
1959 if (!HasFP && NeedsDwarfCFI) {
1965 if (
Opc == X86::PUSH2 ||
Opc == X86::PUSH2P)
1978 if (
Opc == X86::PUSH2 ||
Opc == X86::PUSH2P)
1980 .
addImm(LastCSPush->getOperand(1).getReg())
1988 if (!IsWin64Prologue && !IsFunclet &&
TRI->hasStackRealignment(MF) &&
1990 assert(HasFP &&
"There should be a frame pointer if stack is realigned.");
2004 NumBytes = mergeSPUpdates(
2018 uint64_t AlignedNumBytes = NumBytes;
2019 if (IsWin64Prologue && !IsFunclet &&
TRI->hasStackRealignment(MF))
2020 AlignedNumBytes =
alignTo(AlignedNumBytes, MaxAlign);
2021 if (AlignedNumBytes >= StackProbeSize && EmitStackProbeCall) {
2023 "The Red Zone is not accounted for in stack probes");
2045 int64_t
Alloc = isEAXAlive ? NumBytes - 8 : NumBytes;
2053 .
addImm(isEAXAlive ? NumBytes - 4 : NumBytes)
2072 }
else if (NumBytes) {
2076 if (NeedsWinCFI && NumBytes) {
2083 int SEHFrameOffset = 0;
2091 unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
2093 MBB.addLiveIn(Establisher);
2095 Establisher,
false, PSPSlotOffset)
2102 false, PSPSlotOffset)
2109 SPOrEstablisher = Establisher;
2114 if (IsWin64Prologue && HasFP) {
2121 SPOrEstablisher,
false, SEHFrameOffset);
2124 .
addReg(SPOrEstablisher);
2127 if (NeedsWinCFI && !IsFunclet) {
2128 assert(!NeedsWinFPO &&
"this setframe incompatible with FPO data");
2137 }
else if (IsFunclet &&
STI.is32Bit()) {
2142 if (!
MBB.isCleanupFuncletEntry()) {
2160 if (
Register Reg =
TII.isStoreToStackSlot(FrameInstr, FI)) {
2161 if (X86::FR64RegClass.
contains(Reg)) {
2164 if (IsWin64Prologue && IsFunclet)
2172 assert(!NeedsWinFPO &&
"SEH_SaveXMM incompatible with FPO data");
2182 if (NeedsWinCFI && HasWinCFI)
2186 if (FnHasClrFunclet && !IsFunclet) {
2190 unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
2204 if (IsWin64Prologue &&
TRI->hasStackRealignment(MF)) {
2205 assert(HasFP &&
"There should be a frame pointer if stack is realigned.");
2206 BuildStackAlignAND(
MBB,
MBBI,
DL, SPOrEstablisher, MaxAlign);
2210 if (IsFunclet &&
STI.is32Bit())
2217 if (
TRI->hasBasePointer(MF)) {
2243 assert(UsedReg == BasePtr);
2252 int FI =
MI->getOperand(1).getIndex();
2253 unsigned MOVmr =
Is64Bit ? X86::MOV64mr : X86::MOV32mr;
2260 if (((!HasFP && NumBytes) || PushedRegs) && NeedsDwarfCFI) {
2262 if (!HasFP && NumBytes) {
2288 bool NeedsCLD =
false;
2302 if (
MI.isInlineAsm()) {
2334 switch (
MI.getOpcode()) {
2336 case X86::CLEANUPRET:
2358X86FrameLowering::getPSPSlotOffsetFromSP(
const MachineFunction &MF)
const {
2365 return static_cast<unsigned>(
Offset);
2369X86FrameLowering::getWinEHFuncletFrameSize(
const MachineFunction &MF)
const {
2370 const X86MachineFunctionInfo *X86FI = MF.
getInfo<X86MachineFunctionInfo>();
2376 WinEHXMMSlotInfo.
size() *
TRI->getSpillSize(X86::VR128RegClass);
2385 UsedSize = getPSPSlotOffsetFromSP(MF) +
SlotSize;
2396 return FrameSizeMinusRBP + XMMSize - CSSize;
2400 return Opc == X86::TCRETURNri ||
Opc == X86::TCRETURN_WIN64ri ||
2401 Opc == X86::TCRETURN_HIPE32ri ||
Opc == X86::TCRETURNdi ||
2402 Opc == X86::TCRETURNmi ||
Opc == X86::TCRETURNri64 ||
2403 Opc == X86::TCRETURNri64_ImpCall ||
Opc == X86::TCRETURNdi64 ||
2404 Opc == X86::TCRETURNmi64 ||
Opc == X86::TCRETURN_WINmi64;
2415 DL =
MBBI->getDebugLoc();
2417 const bool Is64BitILP32 =
STI.isTarget64BitILP32();
2423 bool NeedsWin64CFI =
2429 uint64_t MaxAlign = calculateMaxStackAlign(MF);
2432 bool HasFP =
hasFP(MF);
2435 bool NeedsDwarfCFI = (!MF.
getTarget().getTargetTriple().isOSDarwin() &&
2442 unsigned Opc = X86::LEA32r;
2444 ArgBaseReg =
MI->getOperand(0).getReg();
2445 if (
STI.is64Bit()) {
2447 StackReg = X86::RSP;
2458 if (NeedsDwarfCFI) {
2459 unsigned DwarfStackPtr =
TRI->getDwarfRegNum(StackReg,
true);
2469 assert(HasFP &&
"EH funclets without FP not yet implemented");
2470 NumBytes = getWinEHFuncletFrameSize(MF);
2474 NumBytes = FrameSize - CSSize - TailCallArgReserveSize;
2478 if (
TRI->hasStackRealignment(MF) && !IsWin64Prologue)
2479 NumBytes =
alignTo(FrameSize, MaxAlign);
2481 NumBytes = StackSize - CSSize - TailCallArgReserveSize;
2483 uint64_t SEHStackAllocAmt = NumBytes;
2508 if (NeedsDwarfCFI) {
2510 unsigned DwarfStackPtr =
2511 TRI->getDwarfRegNum(
Is64Bit ? X86::RSP : X86::ESP,
true);
2516 if (!
MBB.succ_empty() && !
MBB.isReturnBlock()) {
2517 unsigned DwarfFramePtr =
TRI->getDwarfRegNum(MachineFramePtr,
true);
2532 unsigned Opc = PI->getOpcode();
2534 if (
Opc != X86::DBG_VALUE && !PI->isTerminator()) {
2536 (
Opc != X86::POP32r &&
Opc != X86::POP64r &&
Opc != X86::BTR64ri8 &&
2537 Opc != X86::ADD64ri32 &&
Opc != X86::POPP64r &&
Opc != X86::POP2 &&
2538 Opc != X86::POP2P &&
Opc != X86::LEA64r))
2548 int FI =
MI->getOperand(1).getIndex();
2549 unsigned MOVrm =
Is64Bit ? X86::MOV64rm : X86::MOV32rm;
2556 if (IsFunclet && Terminator->getOpcode() == X86::CATCHRET)
2557 emitCatchRetReturnValue(
MBB, FirstCSPop, &*Terminator);
2560 DL =
MBBI->getDebugLoc();
2572 if (
TRI->hasStackRealignment(MF))
2576 IsWin64Prologue ? SEHStackAllocAmt - SEHFrameOffset : -CSSize;
2588 if (LEAAmount != 0) {
2598 }
else if (NumBytes) {
2601 if (!HasFP && NeedsDwarfCFI) {
2605 nullptr, CSSize + TailCallArgReserveSize +
SlotSize),
2614 if (!HasFP && NeedsDwarfCFI) {
2621 unsigned Opc = PI->getOpcode();
2623 if (
Opc == X86::POP32r ||
Opc == X86::POP64r ||
Opc == X86::POPP64r ||
2624 Opc == X86::POP2 ||
Opc == X86::POP2P) {
2628 if (
Opc == X86::POP2 ||
Opc == X86::POP2P)
2640 if (NeedsDwarfCFI && !
MBB.succ_empty())
2646 assert(Delta <= 0 &&
"TCDelta should never be positive");
2671 if (
TRI->hasBasePointer(MF))
2672 FrameReg = IsFixed ?
TRI->getFramePtr() :
TRI->getBaseRegister();
2673 else if (
TRI->hasStackRealignment(MF))
2674 FrameReg = IsFixed ?
TRI->getFramePtr() :
TRI->getStackRegister();
2676 FrameReg =
TRI->getFrameRegister(MF);
2687 int64_t FPDelta = 0;
2698 if (IsWin64Prologue) {
2707 uint64_t NumBytes = FrameSize - CSSize;
2717 FPDelta = FrameSize - SEHFrameOffset;
2719 "FPDelta isn't aligned per the Win64 ABI!");
2722 if (FrameReg ==
TRI->getFramePtr()) {
2731 if (TailCallReturnAddrDelta < 0)
2732 Offset -= TailCallReturnAddrDelta;
2740 if (
TRI->hasStackRealignment(MF) ||
TRI->hasBasePointer(MF))
2750 const auto it = WinEHXMMSlotInfo.find(FI);
2752 if (it == WinEHXMMSlotInfo.end())
2755 FrameReg =
TRI->getStackRegister();
2763 int Adjustment)
const {
2765 FrameReg =
TRI->getStackRegister();
2773 bool IgnoreSPUpdates)
const {
2812 !
STI.isTargetWin64())
2823 "we don't handle this case!");
2855 std::vector<CalleeSavedInfo> &CSI)
const {
2859 unsigned CalleeSavedFrameSize = 0;
2860 unsigned XMMCalleeSavedFrameSize = 0;
2866 if (TailCallReturnAddrDelta < 0) {
2877 TailCallReturnAddrDelta -
SlotSize,
true);
2881 if (this->TRI->hasBasePointer(MF)) {
2907 for (
unsigned i = 0; i < CSI.size(); ++i) {
2908 if (
TRI->regsOverlap(CSI[i].getReg(),
FPReg)) {
2909 CSI.erase(CSI.begin() + i);
2925 unsigned NumRegsForPush2 = 0;
2928 return X86::GR64RegClass.contains(
I.getReg());
2930 bool NeedPadding = (SpillSlotOffset % 16 != 0) && (NumCSGPR % 2 == 0);
2931 bool UsePush2Pop2 = NeedPadding ? NumCSGPR > 2 : NumCSGPR > 1;
2933 NumRegsForPush2 = UsePush2Pop2 ?
alignDown(NumCSGPR, 2) : 0;
2950 (SpillSlotOffset % 16 == 0 ||
2972 "Expect even candidates for push2/pop2");
2974 ++NumFunctionUsingPush2Pop2;
2985 MVT VT = MVT::Other;
2986 if (X86::VK16RegClass.
contains(Reg))
2987 VT =
STI.hasBWI() ? MVT::v64i1 : MVT::v16i1;
2990 unsigned Size =
TRI->getSpillSize(*RC);
2991 Align Alignment =
TRI->getSpillAlign(*RC);
2993 assert(SpillSlotOffset < 0 &&
"SpillSlotOffset should always < 0 on X86");
2994 SpillSlotOffset = -
alignTo(-SpillSlotOffset, Alignment);
2997 SpillSlotOffset -=
Size;
3003 if (X86::VR128RegClass.
contains(Reg)) {
3004 WinEHXMMSlotInfo[
SlotIndex] = XMMCalleeSavedFrameSize;
3005 XMMCalleeSavedFrameSize +=
Size;
3019 if (
MBB.isEHFuncletEntry() &&
STI.is32Bit() &&
STI.isOSWindows())
3034 auto UpdateLiveInCheckCanKill = [&](
Register Reg) {
3041 if (
MRI.isLiveIn(Reg))
3046 if (
MRI.isLiveIn(*AReg))
3050 auto UpdateLiveInGetKillRegState = [&](
Register Reg) {
3054 for (
auto RI = CSI.
rbegin(), RE = CSI.
rend(); RI != RE; ++RI) {
3062 .
addReg(Reg, UpdateLiveInGetKillRegState(Reg))
3063 .
addReg(Reg2, UpdateLiveInGetKillRegState(Reg2))
3067 .
addReg(Reg, UpdateLiveInGetKillRegState(Reg))
3073 unsigned Opc =
STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r;
3074 Register BaseReg = this->TRI->getBaseRegister();
3088 MVT VT = MVT::Other;
3089 if (X86::VK16RegClass.
contains(Reg))
3090 VT =
STI.hasBWI() ? MVT::v64i1 : MVT::v16i1;
3096 TII.storeRegToStackSlot(
MBB,
MI, Reg,
true,
I.getFrameIdx(), RC,
TRI,
3108 MBB.getParent()->getFunction().getPersonalityFn())) &&
3109 "SEH should not use CATCHRET");
3114 if (
STI.is64Bit()) {
3146 if (
MI->getOpcode() == X86::CATCHRET) {
3164 MVT VT = MVT::Other;
3165 if (X86::VK16RegClass.
contains(Reg))
3166 VT =
STI.hasBWI() ? MVT::v64i1 : MVT::v16i1;
3169 TII.loadRegFromStackSlot(
MBB,
MI, Reg,
I.getFrameIdx(), RC,
TRI,
3177 unsigned Opc =
STI.is64Bit() ? X86::POP64r : X86::POP32r;
3178 Register BaseReg = this->TRI->getBaseRegister();
3184 for (
auto I = CSI.
begin(), E = CSI.
end();
I != E; ++
I) {
3209 if (
TRI->hasBasePointer(MF)) {
3211 if (
STI.isTarget64BitILP32())
3213 SavedRegs.
set(BasePtr);
3221 if (
I->hasNestAttr() && !
I->use_empty())
3238 return Primary ? X86::R14 : X86::R13;
3240 return Primary ? X86::EBX : X86::EDI;
3245 return Primary ? X86::R11 : X86::R12;
3247 return Primary ? X86::R11D : X86::R12D;
3257 "nested function.");
3258 return Primary ? X86::EAX : X86::ECX;
3261 return Primary ? X86::EDX : X86::EAX;
3262 return Primary ? X86::ECX : X86::EAX;
3273 unsigned TlsReg, TlsOffset;
3278 assert(&(*MF.
begin()) == &PrologueMBB &&
"Shrink-wrapping not supported yet");
3282 "Scratch register is live-in");
3286 if (!
STI.isTargetLinux() && !
STI.isTargetDarwin() && !
STI.isTargetWin32() &&
3287 !
STI.isTargetWin64() && !
STI.isTargetFreeBSD() &&
3288 !
STI.isTargetDragonFly())
3302 bool IsNested =
false;
3311 for (
const auto &LI : PrologueMBB.
liveins()) {
3328 if (
STI.isTargetLinux()) {
3330 TlsOffset =
IsLP64 ? 0x70 : 0x40;
3331 }
else if (
STI.isTargetDarwin()) {
3333 TlsOffset = 0x60 + 90 * 8;
3334 }
else if (
STI.isTargetWin64()) {
3337 }
else if (
STI.isTargetFreeBSD()) {
3340 }
else if (
STI.isTargetDragonFly()) {
3347 if (CompareStackPointer)
3348 ScratchReg =
IsLP64 ? X86::RSP : X86::ESP;
3366 if (
STI.isTargetLinux()) {
3369 }
else if (
STI.isTargetDarwin()) {
3371 TlsOffset = 0x48 + 90 * 4;
3372 }
else if (
STI.isTargetWin32()) {
3375 }
else if (
STI.isTargetDragonFly()) {
3378 }
else if (
STI.isTargetFreeBSD()) {
3384 if (CompareStackPointer)
3385 ScratchReg = X86::ESP;
3387 BuildMI(checkMBB,
DL,
TII.get(X86::LEA32r), ScratchReg)
3394 if (
STI.isTargetLinux() ||
STI.isTargetWin32() ||
STI.isTargetWin64() ||
3395 STI.isTargetDragonFly()) {
3403 }
else if (
STI.isTargetDarwin()) {
3406 unsigned ScratchReg2;
3408 if (CompareStackPointer) {
3411 SaveScratch2 =
false;
3423 "Scratch register is live-in and not saved");
3429 BuildMI(checkMBB,
DL,
TII.get(X86::MOV32ri), ScratchReg2)
3440 BuildMI(checkMBB,
DL,
TII.get(X86::POP32r), ScratchReg2);
3456 const unsigned RegAX =
IsLP64 ? X86::RAX : X86::EAX;
3457 const unsigned Reg10 =
IsLP64 ? X86::R10 : X86::R10D;
3458 const unsigned Reg11 =
IsLP64 ? X86::R11 : X86::R11D;
3459 const unsigned MOVrr =
IsLP64 ? X86::MOV64rr : X86::MOV32rr;
3493 if (
STI.useIndirectThunkCalls())
3495 "code model and thunks not yet implemented.");
3512 BuildMI(allocMBB,
DL,
TII.get(X86::MORESTACK_RET_RESTORE_R10));
3521#ifdef EXPENSIVE_CHECKS
3532 for (
int i = 0, e = HiPELiteralsMD->
getNumOperands(); i != e; ++i) {
3534 if (
Node->getNumOperands() != 2)
3538 if (!NodeName || !NodeVal)
3541 if (ValConst && NodeName->
getString() == LiteralName) {
3547 " required but not provided");
3558 return MI.isMetaInstruction();
3584 assert(&(*MF.
begin()) == &PrologueMBB &&
"Shrink-wrapping not supported yet");
3589 if (!HiPELiteralsMD)
3591 "Can't generate HiPE prologue without runtime parameters");
3593 HiPELiteralsMD,
Is64Bit ?
"AMD64_LEAF_WORDS" :
"X86_LEAF_WORDS");
3594 const unsigned CCRegisteredArgs =
Is64Bit ? 6 : 5;
3595 const unsigned Guaranteed = HipeLeafWords *
SlotSize;
3602 "HiPE prologue is only supported on Linux operating systems.");
3612 unsigned MoreStackForCalls = 0;
3614 for (
auto &
MBB : MF) {
3615 for (
auto &
MI :
MBB) {
3635 if (
F->getName().contains(
"erlang.") ||
F->getName().contains(
"bif_") ||
3639 unsigned CalleeStkArity =
F->arg_size() > CCRegisteredArgs
3640 ?
F->arg_size() - CCRegisteredArgs
3642 if (HipeLeafWords - 1 > CalleeStkArity)
3644 std::max(MoreStackForCalls,
3645 (HipeLeafWords - 1 - CalleeStkArity) *
SlotSize);
3648 MaxStack += MoreStackForCalls;
3653 if (MaxStack > Guaranteed) {
3657 for (
const auto &LI : PrologueMBB.
liveins()) {
3665 unsigned ScratchReg,
SPReg, PReg, SPLimitOffset;
3666 unsigned LEAop, CMPop, CALLop;
3671 LEAop = X86::LEA64r;
3672 CMPop = X86::CMP64rm;
3673 CALLop = X86::CALL64pcrel32;
3677 LEAop = X86::LEA32r;
3678 CMPop = X86::CMP32rm;
3679 CALLop = X86::CALLpcrel32;
3684 "HiPE prologue scratch register is live-in");
3691 PReg,
false, SPLimitOffset);
3701 PReg,
false, SPLimitOffset);
3711#ifdef EXPENSIVE_CHECKS
3728 if (NumPops != 1 && NumPops != 2)
3736 if (!Prev->isCall() || !Prev->getOperand(1).isRegMask())
3740 unsigned FoundRegs = 0;
3746 Is64Bit ? X86::GR64_NOREX_NOSPRegClass : X86::GR32_NOREX_NOSPRegClass;
3748 for (
auto Candidate : RegClass) {
3756 if (
MRI.isReserved(Candidate))
3761 if (MO.isReg() && MO.isDef() &&
3762 TRI->isSuperOrSubRegisterEq(MO.getReg(), Candidate)) {
3771 Regs[FoundRegs++] = Candidate;
3772 if (FoundRegs == (
unsigned)NumPops)
3780 while (FoundRegs < (
unsigned)NumPops)
3781 Regs[FoundRegs++] = Regs[0];
3783 for (
int i = 0; i < NumPops; ++i)
3794 unsigned Opcode =
I->getOpcode();
3795 bool isDestroy = Opcode ==
TII.getCallFrameDestroyOpcode();
3798 uint64_t InternalAmt = (isDestroy || Amount) ?
TII.getFrameAdjustment(*
I) : 0;
3808 if (!reserveCallFrame) {
3829 bool HasDwarfEHHandlers = !WindowsCFI && !MF.
getLandingPads().empty();
3831 if (HasDwarfEHHandlers && !isDestroy &&
3841 Amount -= InternalAmt;
3851 int64_t StackAdjustment = isDestroy ? Amount : -Amount;
3852 int64_t CfaAdjustment = StackAdjustment;
3854 if (StackAdjustment) {
3863 auto CalcNewOffset = [&StackAdjustment](int64_t
Offset) {
3864 return StackAdjustment +
Offset;
3867 mergeSPUpdates(
MBB, InsertPos, CalcCfaAdjust, CalcNewOffset,
true);
3869 mergeSPUpdates(
MBB, InsertPos, CalcCfaAdjust, CalcNewOffset,
false);
3871 if (StackAdjustment) {
3872 if (!(
F.hasMinSize() &&
3873 adjustStackWithPops(
MBB, InsertPos,
DL, StackAdjustment)))
3874 BuildStackAdjustment(
MBB, InsertPos,
DL, StackAdjustment,
3900 while (CI !=
B && !std::prev(CI)->isCall())
3902 BuildStackAdjustment(
MBB, CI,
DL, -InternalAmt,
false);
3909 assert(
MBB.getParent() &&
"Block is not attached to a function!");
3911 if (!
MBB.isLiveIn(X86::EFLAGS))
3918 if (TLI.hasInlineStackProbe(MF) || TLI.hasStackProbeSymbol(MF))
3926 assert(
MBB.getParent() &&
"Block is not attached to a function!");
3932 if (
STI.isTargetWin64() && !
MBB.succ_empty() && !
MBB.isReturnBlock())
3954 bool CompactUnwind =
3970 assert(
STI.isTargetWindowsMSVC() &&
"funclets only supported in MSVC env");
3971 assert(
STI.isTargetWin32() &&
"EBP/ESI restoration only required on win32");
3973 "restoring EBP/ESI on non-32-bit target");
3985 int EHRegSize = MFI.getObjectSize(FI);
3990 X86::EBP,
true, -EHRegSize)
3996 int EndOffset = -EHRegOffset - EHRegSize;
4009 "end of registration object above normal EBP position!");
4010 }
else if (UsedReg == BasePtr) {
4020 assert(UsedReg == BasePtr);
4031 return TRI->getSlotSize();
4046 FrameBase.
Kind = DwarfFrameBase::CFA;
4052 return DwarfFrameBase{DwarfFrameBase::Register, {FrameRegister}};
4057struct X86FrameSortingObject {
4058 bool IsValid =
false;
4059 unsigned ObjectIndex = 0;
4060 unsigned ObjectSize = 0;
4062 unsigned ObjectNumUses = 0;
4078struct X86FrameSortingComparator {
4079 inline bool operator()(
const X86FrameSortingObject &
A,
4080 const X86FrameSortingObject &
B)
const {
4081 uint64_t DensityAScaled, DensityBScaled;
4101 DensityAScaled =
static_cast<uint64_t>(
A.ObjectNumUses) *
4103 DensityBScaled =
static_cast<uint64_t>(
B.ObjectNumUses) *
4114 if (DensityAScaled == DensityBScaled)
4115 return A.ObjectAlignment <
B.ObjectAlignment;
4117 return DensityAScaled < DensityBScaled;
4131 if (ObjectsToAllocate.
empty())
4143 for (
auto &Obj : ObjectsToAllocate) {
4144 SortingObjects[Obj].IsValid =
true;
4145 SortingObjects[Obj].ObjectIndex = Obj;
4149 if (ObjectSize == 0)
4151 SortingObjects[Obj].ObjectSize = 4;
4153 SortingObjects[Obj].ObjectSize = ObjectSize;
4157 for (
auto &
MBB : MF) {
4158 for (
auto &
MI :
MBB) {
4159 if (
MI.isDebugInstr())
4165 int Index = MO.getIndex();
4169 SortingObjects[Index].IsValid)
4170 SortingObjects[Index].ObjectNumUses++;
4185 for (
auto &Obj : SortingObjects) {
4189 ObjectsToAllocate[i++] = Obj.ObjectIndex;
4193 if (!
TRI->hasStackRealignment(MF) &&
hasFP(MF))
4194 std::reverse(ObjectsToAllocate.
begin(), ObjectsToAllocate.
end());
4206 Offset += getWinEHFuncletFrameSize(MF);
4234 adjustFrameForMsvcCxxEh(MF);
4238void X86FrameLowering::adjustFrameForMsvcCxxEh(
MachineFunction &MF)
const {
4246 int64_t MinFixedObjOffset = -
SlotSize;
4252 int FrameIndex =
H.CatchObj.FrameIndex;
4253 if ((FrameIndex != INT_MAX) && MFI.
getObjectOffset(FrameIndex) == 0) {
4256 MinFixedObjOffset -= std::abs(MinFixedObjOffset) %
Align;
4264 MinFixedObjOffset -= std::abs(MinFixedObjOffset) % 8;
4265 int64_t UnwindHelpOffset = MinFixedObjOffset -
SlotSize;
4272 MachineBasicBlock &
MBB = MF.
front();
4292 MI->eraseFromParent();
4305 bool NeedsRestore =
MBB.isEHPad() && !
MBB.isEHFuncletEntry();
4316 unsigned NumSpilledRegs) {
4318 unsigned AllocSize =
TRI->getSpillSize(*RC) * NumSpilledRegs;
4320 unsigned AlignedSize =
alignTo(AllocSize, StackAlign);
4321 return AlignedSize - AllocSize;
4327 int SPAdjust)
const {
4330 MachineBasicBlock *
MBB = BeforeMI->getParent();
4352 if (
FP.isValid() && needsDwarfCFI(MF)) {
4361 SmallString<64> CfaExpr;
4365 Offset +=
TRI->getSpillSize(*
TRI->getMinimalPhysRegClass(BP));
4368 if (
TII.isFrameSetup(*BeforeMI)) {
4370 BeforeMI = std::next(BeforeMI);
4373 if (
STI.isTarget64BitILP32())
4375 unsigned DwarfStackPtr =
TRI->getDwarfRegNum(
StackPtr,
true);
4376 CfaExpr.
push_back((uint8_t)(dwarf::DW_OP_breg0 + DwarfStackPtr));
4381 CfaExpr.
push_back((uint8_t)dwarf::DW_OP_plus);
4383 SmallString<64> DefCfaExpr;
4384 DefCfaExpr.
push_back(dwarf::DW_CFA_def_cfa_expression);
4396 int SPAdjust)
const {
4400 MachineBasicBlock *
MBB = AfterMI->getParent();
4418 if (needsDwarfCFI(MF)) {
4428void X86FrameLowering::saveAndRestoreFPBPUsingSP(
4431 assert(SpillFP || SpillBP);
4434 const TargetRegisterClass *RC;
4435 unsigned NumRegs = 0;
4438 FP =
TRI->getFrameRegister(MF);
4439 if (
STI.isTarget64BitILP32())
4441 RC =
TRI->getMinimalPhysRegClass(
FP);
4445 BP =
TRI->getBaseRegister();
4446 if (
STI.isTarget64BitILP32())
4448 RC =
TRI->getMinimalPhysRegClass(BP);
4453 spillFPBPUsingSP(MF, BeforeMI,
FP, BP, SPAdjust);
4454 restoreFPBPUsingSP(MF, AfterMI,
FP, BP, SPAdjust);
4457bool X86FrameLowering::skipSpillFPBP(
4459 if (
MI->getOpcode() == X86::LCMPXCHG16B_SAVE_RBX) {
4467 while (!(
MI->getOpcode() == TargetOpcode::COPY &&
4468 MI->getOperand(1).getReg() == X86::RBX) &&
4469 !((
Reg =
TII.isStoreToStackSlot(*
MI, FI)) &&
Reg == X86::RBX))
4479 AccessFP = AccessBP =
false;
4481 if (
MI.findRegisterUseOperandIdx(
FP,
TRI,
false) != -1 ||
4482 MI.findRegisterDefOperandIdx(
FP,
TRI,
false,
true) != -1)
4486 if (
MI.findRegisterUseOperandIdx(BP,
TRI,
false) != -1 ||
4487 MI.findRegisterDefOperandIdx(BP,
TRI,
false,
true) != -1)
4490 return AccessFP || AccessBP;
4503 if (!
MBB->hasEHPadSuccessor())
4516void X86FrameLowering::checkInterferedAccess(
4519 bool SpillBP)
const {
4520 if (
DefMI == KillMI)
4522 if (
TRI->hasBasePointer(MF)) {
4533 [](
const MachineOperand &MO) { return MO.isFI(); }))
4535 "Interference usage of base pointer/frame "
4566 FP =
TRI->getFrameRegister(MF);
4567 if (
TRI->hasBasePointer(MF))
4568 BP =
TRI->getBaseRegister();
4583 bool InsideEHLabels =
false;
4584 auto MI =
MBB.rbegin(), ME =
MBB.rend();
4585 auto TermMI =
MBB.getFirstTerminator();
4586 if (TermMI ==
MBB.begin())
4588 MI = *(std::prev(TermMI));
4596 isInvoke(*
MI, InsideEHLabels) || skipSpillFPBP(MF,
MI)) {
4601 if (
MI->getOpcode() == TargetOpcode::EH_LABEL) {
4602 InsideEHLabels = !InsideEHLabels;
4607 bool AccessFP, AccessBP;
4616 bool FPLive =
false, BPLive =
false;
4617 bool SpillFP =
false, SpillBP =
false;
4620 SpillFP |= AccessFP;
4621 SpillBP |= AccessBP;
4624 if (FPLive &&
MI->findRegisterDefOperandIdx(
FP,
TRI,
false,
true) != -1)
4626 if (
FP &&
MI->findRegisterUseOperandIdx(
FP,
TRI,
false) != -1)
4628 if (BPLive &&
MI->findRegisterDefOperandIdx(BP,
TRI,
false,
true) != -1)
4630 if (BP &&
MI->findRegisterUseOperandIdx(BP,
TRI,
false) != -1)
4634 }
while ((
MI != ME) &&
4635 (FPLive || BPLive ||
4639 if (FPLive && !SpillBP)
4644 if (KillMI->isCall() &&
DefMI != ME) {
4645 auto FrameSetup = std::next(
DefMI);
4649 while (FrameSetup != ME && !
TII.isFrameSetup(*FrameSetup) &&
4650 !FrameSetup->isCall())
4654 if (FrameSetup != ME &&
TII.isFrameSetup(*FrameSetup) &&
4655 (
TII.getFrameSize(*FrameSetup) ||
4656 TII.getFrameAdjustment(*FrameSetup))) {
4657 while (!
TII.isFrameInstr(*KillMI))
4665 checkInterferedAccess(MF,
DefMI, KillMI, SpillFP, SpillBP);
4668 saveAndRestoreFPBPUsingSP(MF, &(*
DefMI), &(*KillMI), SpillFP, SpillBP);
unsigned const MachineRegisterInfo * MRI
MachineInstrBuilder MachineInstrBuilder & DefMI
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
static const uint64_t kSplitStackAvailable
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
Analysis containing CSE Info
const HexagonInstrInfo * TII
Module.h This file contains the declarations for the Module class.
static cl::opt< int > PageSize("imp-null-check-page-size", cl::desc("The page size of the target in bytes"), cl::init(4096), cl::Hidden)
This file implements the LivePhysRegs utility for tracking liveness of physical registers.
static bool isTailCallOpcode(unsigned Opc)
Register const TargetRegisterInfo * TRI
Promote Memory to Register
static unsigned getReg(const MCDisassembler *D, unsigned RC, unsigned RegNo)
static constexpr MCPhysReg FPReg
static constexpr MCPhysReg SPReg
This file declares the machine register scavenger class.
static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
static bool is64Bit(const char *name)
static unsigned calculateSetFPREG(uint64_t SPAdjust)
static unsigned GetScratchRegister(bool Is64Bit, bool IsLP64, const MachineFunction &MF, bool Primary)
GetScratchRegister - Get a temp register for performing work in the segmented stack and the Erlang/Hi...
static unsigned getADDriOpcode(bool IsLP64)
static unsigned getPUSH2Opcode(const X86Subtarget &ST)
static unsigned getMOVriOpcode(bool Use64BitReg, int64_t Imm)
static unsigned getLEArOpcode(bool IsLP64)
static unsigned getSUBriOpcode(bool IsLP64)
static bool flagsNeedToBePreservedBeforeTheTerminators(const MachineBasicBlock &MBB)
Check if the flags need to be preserved before the terminators.
static bool isFPBPAccess(const MachineInstr &MI, Register FP, Register BP, const TargetRegisterInfo *TRI, bool &AccessFP, bool &AccessBP)
static bool isOpcodeRep(unsigned Opcode)
Return true if an opcode is part of the REP group of instructions.
static unsigned getANDriOpcode(bool IsLP64, int64_t Imm)
static bool isEAXLiveIn(MachineBasicBlock &MBB)
static int computeFPBPAlignmentGap(MachineFunction &MF, const TargetRegisterClass *RC, unsigned NumSpilledRegs)
static unsigned getADDrrOpcode(bool IsLP64)
static bool HasNestArgument(const MachineFunction *MF)
static unsigned getPOPOpcode(const X86Subtarget &ST)
static bool isInvoke(const MachineInstr &MI, bool InsideEHLabels)
static unsigned getPOP2Opcode(const X86Subtarget &ST)
static unsigned getHiPELiteral(NamedMDNode *HiPELiteralsMD, const StringRef LiteralName)
Lookup an ERTS parameter in the !hipe.literals named metadata node.
static bool blockEndIsUnreachable(const MachineBasicBlock &MBB, MachineBasicBlock::const_iterator MBBI)
static unsigned getSUBrrOpcode(bool IsLP64)
static unsigned getPUSHOpcode(const X86Subtarget &ST)
constexpr uint64_t MaxSPChunk
static const unsigned FramePtr
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
reverse_iterator rend() const
bool empty() const
empty - Check if the array is empty.
reverse_iterator rbegin() const
iterator_range< const_set_bits_iterator > set_bits() const
static BranchProbability getOne()
static BranchProbability getZero()
The CalleeSavedInfo class tracks the information need to locate where a callee saved register is in t...
This is the shared class of boolean and integer constants.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
bool hasPersonalityFn() const
Check whether this function has a personality function.
Constant * getPersonalityFn() const
Get the personality function associated with this function.
AttributeList getAttributes() const
Return the attribute list for this Function.
bool needsUnwindTableEntry() const
True if this function needs an unwind table.
const Argument * const_arg_iterator
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Module * getParent()
Get the module that this global value is contained inside of...
bool usesWindowsCFI() const
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_def_cfa_register modifies a rule for computing CFA.
static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int64_t Size, SMLoc Loc={})
A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE.
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...
static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
static MCCFIInstruction createRememberState(MCSymbol *L, SMLoc Loc={})
.cfi_remember_state Save all current rules for all registers.
OpType getOperation() const
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int64_t Offset, SMLoc Loc={})
.cfi_def_cfa_offset modifies a rule for computing CFA.
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals, SMLoc Loc={}, StringRef Comment="")
.cfi_escape Allows the user to add arbitrary bytes to the unwind info.
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int64_t Adjustment, SMLoc Loc={})
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
static MCCFIInstruction createRestoreState(MCSymbol *L, SMLoc Loc={})
.cfi_restore_state Restore the previously saved state.
const MCObjectFileInfo * getObjectFileInfo() const
const MCRegisterInfo * getRegisterInfo() const
LLVM_ABI void reportError(SMLoc L, const Twine &Msg)
MCSection * getCompactUnwindSection() const
MCRegAliasIterator enumerates all registers aliasing Reg.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Wrapper class representing physical registers. Should be passed by value.
LLVM_ABI StringRef getString() const
LLVM_ABI void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)
Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...
MachineInstrBundleIterator< const MachineInstr > const_iterator
iterator_range< livein_iterator > liveins() const
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
LLVM_ABI LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI, MCRegister Reg, const_iterator Before, unsigned Neighborhood=10) const
Return whether (physical) register Reg has been defined and not killed as of just before Before.
LLVM_ABI void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
LLVM_ABI iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
LLVM_ABI DebugLoc findDebugLoc(instr_iterator MBBI)
Find the next valid DebugLoc starting at MBBI, skipping any debug instructions.
MachineInstrBundleIterator< MachineInstr, true > reverse_iterator
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
LLVM_ABI instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...
MachineInstrBundleIterator< MachineInstr > iterator
@ LQR_Live
Register is known to be (at least partially) live.
void setMachineBlockAddressTaken()
Set this block to indicate that its address is used as something other than the target of a terminato...
LLVM_ABI bool isLiveIn(MCRegister Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
bool needsSplitStackProlog() const
Return true if this function requires a split stack prolog, even if it uses no stack space.
LLVM_ABI int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
LLVM_ABI int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it.
LLVM_ABI void ensureMaxAlignment(Align Alignment)
Make sure the function is at least Align bytes aligned.
bool hasCalls() const
Return true if the current function has any function calls.
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
Align getMaxAlign() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
void setObjectOffset(int ObjectIdx, int64_t SPOffset)
Set the stack frame offset of the specified object.
uint64_t getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call.
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
void setCVBytesOfCalleeSavedRegisters(unsigned S)
LLVM_ABI int CreateSpillStackObject(uint64_t Size, Align Alignment)
Create a new statically sized stack object that represents a spill slot, returning a nonnegative iden...
LLVM_ABI uint64_t estimateStackSize(const MachineFunction &MF) const
Estimate and return the size of the stack frame.
Align getObjectAlign(int ObjectIdx) const
Return the alignment of the specified stack object.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
bool hasCopyImplyingStackAdjustment() const
Returns true if the function contains operations which will lower down to instructions which manipula...
bool hasStackObjects() const
Return true if there are any stack objects in this function.
LLVM_ABI int CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset, bool IsImmutable=false)
Create a spill slot at a fixed location on the stack.
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
void setStackSize(uint64_t Size)
Set the size of the stack.
bool isFixedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a fixed stack object.
int getObjectIndexBegin() const
Return the minimum frame object index.
void setOffsetAdjustment(int64_t Adj)
Set the correction for frame offsets.
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling.
unsigned addFrameInst(const MCCFIInstruction &Inst)
void setHasWinCFI(bool v)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
const std::vector< MCCFIInstruction > & getFrameInstructions() const
Returns a reference to a list of cfi instructions in the function's prologue.
bool hasInlineAsm() const
Returns true if the function contains any inline assembly.
void makeDebugValueSubstitution(DebugInstrOperandPair, DebugInstrOperandPair, unsigned SubReg=0)
Create a substitution between one <instr,operand> value to a different, new value.
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, LLT MemTy, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
bool needsFrameMoves() const
True if this function needs frame moves for debug or exceptions.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
bool callsUnwindInit() const
void push_front(MachineBasicBlock *MBB)
const char * createExternalSymbolName(StringRef Name)
Allocate a string and populate it with the given external symbol name.
MCContext & getContext() const
bool callsEHReturn() const
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
bool verify(Pass *p=nullptr, const char *Banner=nullptr, raw_ostream *OS=nullptr, bool AbortOnError=true) const
Run the current MachineFunction through the machine code verifier, useful for debugger use.
Function & getFunction()
Return the LLVM function that this machine code represents.
const std::vector< LandingPadInfo > & getLandingPads() const
Return a reference to the landing pad info for the current function.
BasicBlockListType::iterator iterator
bool shouldSplitStack() const
Should we be emitting segmented stack stuff for the function.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
const MachineBasicBlock & front() const
bool hasEHFunclets() const
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)
CreateMachineInstr - Allocate a new MachineInstr.
void insert(iterator MBBI, MachineBasicBlock *MBB)
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned TargetFlags=0) const
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
const MachineInstrBuilder & addUse(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register use operand.
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
Representation of each machine instruction.
unsigned getNumOperands() const
Retuns the total number of operands.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
LLVM_ABI unsigned getDebugInstrNum()
Fetch the instruction number of this MachineInstr.
const MachineOperand & getOperand(unsigned i) const
@ MOVolatile
The memory access is volatile.
@ MOLoad
The memory access reads data.
@ MOStore
The memory access writes data.
MachineOperand class - Representation of each machine instruction operand.
const GlobalValue * getGlobal() const
MachineBasicBlock * getMBB() const
void setIsDead(bool Val=true)
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
static bool clobbersPhysReg(const uint32_t *RegMask, MCRegister PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
bool isReserved(MCRegister PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
LLVM_ABI bool isLiveIn(Register Reg) const
NamedMDNode * getNamedMetadata(StringRef Name) const
Return the first NamedMDNode in the module with the specified name.
unsigned getCodeViewFlag() const
Returns the CodeView Version by checking module flags.
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
LLVM_ABI MDNode * getOperand(unsigned i) const
LLVM_ABI unsigned getNumOperands() const
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
Wrapper class representing virtual and physical registers.
constexpr bool isValid() const
SlotIndex - An opaque wrapper around machine indexes.
SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...
void append(StringRef RHS)
Append from a StringRef.
StringRef str() const
Explicit conversion to StringRef.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
StackOffset holds a fixed and a scalable offset in bytes.
int64_t getFixed() const
Returns the fixed component of the stack.
static StackOffset getFixed(int64_t Fixed)
StringRef - Represent a constant reference to a string, i.e.
static constexpr size_t npos
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
bool hasFP(const MachineFunction &MF) const
hasFP - Return true if the specified function should have a dedicated frame pointer register.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
TargetFrameLowering(StackDirection D, Align StackAl, int LAO, Align TransAl=Align(1), bool StackReal=true)
Align getStackAlign() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
const Triple & getTargetTriple() const
CodeModel::Model getCodeModel() const
Returns the code model.
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
SwiftAsyncFramePointerMode SwiftAsyncFramePointer
Control when and how the Swift async frame pointer bit should be set.
LLVM_ABI bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual Register getFrameRegister(const MachineFunction &MF) const =0
Debug information queries.
virtual const TargetFrameLowering * getFrameLowering() const
virtual const TargetRegisterInfo * getRegisterInfo() const =0
Return the target's register information.
bool isUEFI() const
Tests whether the OS is UEFI.
bool isOSWindows() const
Tests whether the OS is Windows.
bool has128ByteRedZone(const MachineFunction &MF) const
Return true if the function has a redzone (accessible bytes past the frame of the top of stack functi...
void spillFPBP(MachineFunction &MF) const override
If a function uses base pointer and the base pointer is clobbered by inline asm, RA doesn't detect th...
bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override
canSimplifyCallFramePseudos - If there is a reserved call frame, the call frame pseudos can be simpli...
bool needsFrameIndexResolution(const MachineFunction &MF) const override
X86FrameLowering(const X86Subtarget &STI, MaybeAlign StackAlignOverride)
const X86RegisterInfo * TRI
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
bool hasFPImpl(const MachineFunction &MF) const override
hasFPImpl - Return true if the specified function should have a dedicated frame pointer register.
MachineBasicBlock::iterator restoreWin32EHStackPointers(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool RestoreSP=false) const
Sets up EBP and optionally ESI based on the incoming EBP value.
int getInitialCFAOffset(const MachineFunction &MF) const override
Return initial CFA offset value i.e.
bool canUseAsPrologue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a prologue for the target.
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
void emitStackProbe(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog, std::optional< MachineFunction::DebugInstrOperandPair > InstrNum=std::nullopt) const
Emit target stack probe code.
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool IsPrologue) const
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
int64_t mergeSPAdd(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, int64_t AddOffset, bool doMergeWithPrevious) const
Equivalent to: mergeSPUpdates(MBB, MBBI, [AddOffset](int64_t Offset) { return AddOffset + Offset; }...
StackOffset getFrameIndexReferenceSP(const MachineFunction &MF, int FI, Register &SPReg, int Adjustment) const
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
bool enableShrinkWrapping(const MachineFunction &MF) const override
Returns true if the target will correctly handle shrink wrapping.
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const override
Replace a StackProbe inline-stub with the actual probe code inline.
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &DL, int64_t NumBytes, bool InEpilogue) const
Emit a series of instructions to increment / decrement the stack pointer by a constant value.
bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a epilogue for the target.
bool Is64Bit
Is64Bit implies that x86_64 instructions are available.
Register getInitialCFARegister(const MachineFunction &MF) const override
Return initial CFA register value i.e.
bool Uses64BitFramePtr
True if the 64-bit frame or stack pointer should be used.
unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const override
void adjustForSegmentedStacks(MachineFunction &MF, MachineBasicBlock &PrologueMBB) const override
Adjust the prologue to have the function use segmented stacks.
DwarfFrameBase getDwarfFrameBase(const MachineFunction &MF) const override
Return the frame base information to be encoded in the DWARF subprogram debug info.
void emitCalleeSavedFrameMovesFullCFA(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const override
Emits Dwarf Info specifying offsets of callee saved registers and frame pointer.
int getWin64EHFrameIndexRef(const MachineFunction &MF, int FI, Register &SPReg) const
bool canUseLEAForSPInEpilogue(const MachineFunction &MF) const
Check that LEA can be used on SP in an epilogue sequence for MF.
bool stackProbeFunctionModifiesSP() const override
Does the stack probe function call return with a modified stack pointer?
void orderFrameObjects(const MachineFunction &MF, SmallVectorImpl< int > &ObjectsToAllocate) const override
Order the symbols in the local stack.
void BuildCFI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, const MCCFIInstruction &CFIInst, MachineInstr::MIFlag Flag=MachineInstr::NoFlags) const
Wraps up getting a CFI index and building a MachineInstr for it.
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
void processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameIndicesReplaced - This method is called immediately before MO_FrameIndex op...
StackOffset getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI, Register &FrameReg, bool IgnoreSPUpdates) const override
Same as getFrameIndexReference, except that the stack pointer (as opposed to the frame pointer) will ...
void restoreWinEHStackPointersInParent(MachineFunction &MF) const
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
void adjustForHiPEPrologue(MachineFunction &MF, MachineBasicBlock &PrologueMBB) const override
Erlang programs may need a special prologue to handle the stack size they might need at runtime.
X86MachineFunctionInfo - This class is derived from MachineFunction and contains private X86 target-s...
bool getForceFramePointer() const
void setPadForPush2Pop2(bool V)
bool isCandidateForPush2Pop2(Register Reg) const
unsigned getArgumentStackSize() const
bool getFPClobberedByCall() const
int getRestoreBasePointerOffset() const
int getSEHFramePtrSaveIndex() const
bool hasCFIAdjustCfa() const
int getTCReturnAddrDelta() const
void setRestoreBasePointer(const MachineFunction *MF)
bool getHasSEHFramePtrSave() const
DenseMap< int, unsigned > & getWinEHXMMSlotInfo()
bool getBPClobberedByCall() const
void setUsesRedZone(bool V)
bool hasPreallocatedCall() const
bool hasSwiftAsyncContext() const
void setHasSEHFramePtrSave(bool V)
bool getRestoreBasePointer() const
MachineInstr * getStackPtrSaveMI() const
size_t getNumCandidatesForPush2Pop2() const
AMXProgModelEnum getAMXProgModel() const
void addCandidateForPush2Pop2(Register Reg)
unsigned getCalleeSavedFrameSize() const
bool getHasPushSequences() const
bool padForPush2Pop2() const
void setStackPtrSaveMI(MachineInstr *MI)
bool getUsesRedZone() const
void setCalleeSavedFrameSize(unsigned bytes)
void setSEHFramePtrSaveIndex(int Index)
const X86TargetLowering * getTargetLowering() const override
bool isTargetWindowsCoreCLR() const
self_iterator getIterator()
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
uint16_t StackAdjustment(const RuntimeFunction &RF)
StackAdjustment - calculated stack adjustment in words.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
@ HiPE
Used by the High-Performance Erlang Compiler (HiPE).
@ X86_INTR
x86 hardware interrupt context.
@ Fast
Attempts to make calls as fast as possible (e.g.
@ Tail
Attemps to make calls as fast as possible while guaranteeing that tail call optimization can always b...
@ X86_FastCall
'fast' analog of X86_StdCall.
@ BasicBlock
Various leaf nodes.
@ Implicit
Not emitted register (e.g. carry, or temporary result).
@ Define
Register definition.
@ Kill
The last use of a register.
@ Undef
Value of the register doesn't matter.
@ MO_GOTPCREL
MO_GOTPCREL - On a symbol operand this indicates that the immediate is offset to the GOT entry for th...
This is an optimization pass for GlobalISel generic memory operations.
void stable_sort(R &&Range)
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
constexpr bool isInt(int64_t x)
Checks if an integer fits into the given bit width.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
bool isAligned(Align Lhs, uint64_t SizeInBytes)
Checks that SizeInBytes is a multiple of the alignment.
MCRegister getX86SubSuperRegister(MCRegister Reg, unsigned Size, bool High=false)
@ DwarfCFI
DWARF-like instruction based exceptions.
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
static const MachineInstrBuilder & addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset=0, bool mem=true)
addFrameReference - This function is used to add a reference to the base of an abstract object on the...
constexpr T alignDown(U Value, V Align, W Skew=0)
Returns the largest unsigned integer less than or equal to Value and is Skew mod Align.
IterT skipDebugInstructionsForward(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator.
auto dyn_cast_or_null(const Y &Val)
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
static bool isFuncletReturnInstr(const MachineInstr &MI)
auto reverse(ContainerTy &&C)
@ Always
Always set the bit.
@ Never
Never set the bit.
@ DeploymentBased
Determine whether to set the bit statically or dynamically based on the deployment target.
LLVM_ABI void report_fatal_error(Error Err, bool gen_crash_diag=true)
constexpr bool isUInt(uint64_t x)
Checks if an unsigned integer fits into the given bit width.
LLVM_ABI EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
IterT skipDebugInstructionsBackward(IterT It, IterT Begin, bool SkipPseudoOp=true)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
unsigned getUndefRegState(bool B)
unsigned getDefRegState(bool B)
unsigned getKillRegState(bool B)
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
unsigned encodeSLEB128(int64_t Value, raw_ostream &OS, unsigned PadTo=0)
Utility function to encode a SLEB128 value to an output stream.
auto count_if(R &&Range, UnaryPredicate P)
Wrapper function around std::count_if to count the number of times an element satisfying a given pred...
auto find_if(R &&Range, UnaryPredicate P)
Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly.
void computeAndAddLiveIns(LivePhysRegs &LiveRegs, MachineBasicBlock &MBB)
Convenience function combining computeLiveIns() and addLiveIns().
unsigned encodeULEB128(uint64_t Value, raw_ostream &OS, unsigned PadTo=0)
Utility function to encode a ULEB128 value to an output stream.
static const MachineInstrBuilder & addRegOffset(const MachineInstrBuilder &MIB, Register Reg, bool isKill, int Offset)
addRegOffset - This function is used to add a memory reference of the form [Reg + Offset],...
void fullyRecomputeLiveIns(ArrayRef< MachineBasicBlock * > MBBs)
Convenience function for recomputing live-in's for a set of MBBs until the computation converges.
This struct is a compact representation of a valid (non-zero power of two) alignment.
constexpr uint64_t value() const
This is a hole in the type system and should not be abused.
Pair of physical register and lane mask.
This class contains a discriminated union of information about pointers in memory operands,...
static LLVM_ABI MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.
union llvm::TargetFrameLowering::DwarfFrameBase::@004076321055032247336074224075335064105264310375 Location
enum llvm::TargetFrameLowering::DwarfFrameBase::FrameBaseKind Kind
SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap
SmallVector< WinEHHandlerType, 1 > HandlerArray