LLVM 20.0.0git
StackSlotColoring.cpp
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1//===- StackSlotColoring.cpp - Stack slot coloring pass. ------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the stack slot coloring pass.
10//
11//===----------------------------------------------------------------------===//
12
13#include "llvm/ADT/BitVector.h"
15#include "llvm/ADT/Statistic.h"
29#include "llvm/CodeGen/Passes.h"
36#include "llvm/Pass.h"
39#include "llvm/Support/Debug.h"
41#include <cassert>
42#include <cstdint>
43#include <iterator>
44#include <vector>
45
46using namespace llvm;
47
48#define DEBUG_TYPE "stack-slot-coloring"
49
50static cl::opt<bool>
51DisableSharing("no-stack-slot-sharing",
52 cl::init(false), cl::Hidden,
53 cl::desc("Suppress slot sharing during stack coloring"));
54
55static cl::opt<int> DCELimit("ssc-dce-limit", cl::init(-1), cl::Hidden);
56
57STATISTIC(NumEliminated, "Number of stack slots eliminated due to coloring");
58STATISTIC(NumDead, "Number of trivially dead stack accesses eliminated");
59
60namespace {
61
62 class StackSlotColoring : public MachineFunctionPass {
63 LiveStacks *LS = nullptr;
64 MachineFrameInfo *MFI = nullptr;
65 const TargetInstrInfo *TII = nullptr;
66 const MachineBlockFrequencyInfo *MBFI = nullptr;
67 SlotIndexes *Indexes = nullptr;
68
69 // SSIntervals - Spill slot intervals.
70 std::vector<LiveInterval*> SSIntervals;
71
72 // SSRefs - Keep a list of MachineMemOperands for each spill slot.
73 // MachineMemOperands can be shared between instructions, so we need
74 // to be careful that renames like [FI0, FI1] -> [FI1, FI2] do not
75 // become FI0 -> FI1 -> FI2.
77
78 // OrigAlignments - Alignments of stack objects before coloring.
79 SmallVector<Align, 16> OrigAlignments;
80
81 // OrigSizes - Sizes of stack objects before coloring.
83
84 // AllColors - If index is set, it's a spill slot, i.e. color.
85 // FIXME: This assumes PEI locate spill slot with smaller indices
86 // closest to stack pointer / frame pointer. Therefore, smaller
87 // index == better color. This is per stack ID.
89
90 // NextColor - Next "color" that's not yet used. This is per stack ID.
91 SmallVector<int, 2> NextColors = { -1 };
92
93 // UsedColors - "Colors" that have been assigned. This is per stack ID
95
96 // Join all intervals sharing one color into a single LiveIntervalUnion to
97 // speedup range overlap test.
98 class ColorAssignmentInfo {
99 // Single liverange (used to avoid creation of LiveIntervalUnion).
100 LiveInterval *SingleLI = nullptr;
101 // LiveIntervalUnion to perform overlap test.
102 LiveIntervalUnion *LIU = nullptr;
103 // LiveIntervalUnion has a parameter in its constructor so doing this
104 // dirty magic.
105 uint8_t LIUPad[sizeof(LiveIntervalUnion)];
106
107 public:
108 ~ColorAssignmentInfo() {
109 if (LIU)
110 LIU->~LiveIntervalUnion(); // Dirty magic again.
111 }
112
113 // Return true if LiveInterval overlaps with any
114 // intervals that have already been assigned to this color.
115 bool overlaps(LiveInterval *LI) const {
116 if (LIU)
118 return SingleLI ? SingleLI->overlaps(*LI) : false;
119 }
120
121 // Add new LiveInterval to this color.
123 assert(!overlaps(LI));
124 if (LIU) {
125 LIU->unify(*LI, *LI);
126 } else if (SingleLI) {
127 LIU = new (LIUPad) LiveIntervalUnion(Alloc);
128 LIU->unify(*SingleLI, *SingleLI);
129 LIU->unify(*LI, *LI);
130 SingleLI = nullptr;
131 } else
132 SingleLI = LI;
133 }
134 };
135
137
138 // Assignments - Color to intervals mapping.
140
141 public:
142 static char ID; // Pass identification
143
144 StackSlotColoring() : MachineFunctionPass(ID) {
146 }
147
148 void getAnalysisUsage(AnalysisUsage &AU) const override {
149 AU.setPreservesCFG();
156
157 // In some Target's pipeline, register allocation (RA) might be
158 // split into multiple phases based on register class. So, this pass
159 // may be invoked multiple times requiring it to save these analyses to be
160 // used by RA later.
163
165 }
166
167 bool runOnMachineFunction(MachineFunction &MF) override;
168
169 private:
170 void InitializeSlots();
171 void ScanForSpillSlotRefs(MachineFunction &MF);
172 int ColorSlot(LiveInterval *li);
173 bool ColorSlots(MachineFunction &MF);
174 void RewriteInstruction(MachineInstr &MI, SmallVectorImpl<int> &SlotMapping,
175 MachineFunction &MF);
176 bool RemoveDeadStores(MachineBasicBlock* MBB);
177 };
178
179} // end anonymous namespace
180
181char StackSlotColoring::ID = 0;
182
183char &llvm::StackSlotColoringID = StackSlotColoring::ID;
184
186 "Stack Slot Coloring", false, false)
191 "Stack Slot Coloring", false, false)
192
193namespace {
194
195// IntervalSorter - Comparison predicate that sort live intervals by
196// their weight.
199 return LHS->weight() > RHS->weight();
200 }
201};
202
203} // end anonymous namespace
204
205/// ScanForSpillSlotRefs - Scan all the machine instructions for spill slot
206/// references and update spill slot weights.
207void StackSlotColoring::ScanForSpillSlotRefs(MachineFunction &MF) {
208 SSRefs.resize(MFI->getObjectIndexEnd());
209
210 // FIXME: Need the equivalent of MachineRegisterInfo for frameindex operands.
211 for (MachineBasicBlock &MBB : MF) {
212 for (MachineInstr &MI : MBB) {
213 for (const MachineOperand &MO : MI.operands()) {
214 if (!MO.isFI())
215 continue;
216 int FI = MO.getIndex();
217 if (FI < 0)
218 continue;
219 if (!LS->hasInterval(FI))
220 continue;
221 LiveInterval &li = LS->getInterval(FI);
222 if (!MI.isDebugInstr())
224 LiveIntervals::getSpillWeight(false, true, MBFI, MI));
225 }
226 for (MachineMemOperand *MMO : MI.memoperands()) {
227 if (const FixedStackPseudoSourceValue *FSV =
228 dyn_cast_or_null<FixedStackPseudoSourceValue>(
229 MMO->getPseudoValue())) {
230 int FI = FSV->getFrameIndex();
231 if (FI >= 0)
232 SSRefs[FI].push_back(MMO);
233 }
234 }
235 }
236 }
237}
238
239/// InitializeSlots - Process all spill stack slot liveintervals and add them
240/// to a sorted (by weight) list.
241void StackSlotColoring::InitializeSlots() {
242 int LastFI = MFI->getObjectIndexEnd();
243
244 // There is always at least one stack ID.
245 AllColors.resize(1);
246 UsedColors.resize(1);
247
248 OrigAlignments.resize(LastFI);
249 OrigSizes.resize(LastFI);
250 AllColors[0].resize(LastFI);
251 UsedColors[0].resize(LastFI);
252 Assignments.resize(LastFI);
253
254 using Pair = std::iterator_traits<LiveStacks::iterator>::value_type;
255
256 SmallVector<Pair *, 16> Intervals;
257
258 Intervals.reserve(LS->getNumIntervals());
259 for (auto &I : *LS)
260 Intervals.push_back(&I);
261 llvm::sort(Intervals,
262 [](Pair *LHS, Pair *RHS) { return LHS->first < RHS->first; });
263
264 // Gather all spill slots into a list.
265 LLVM_DEBUG(dbgs() << "Spill slot intervals:\n");
266 for (auto *I : Intervals) {
267 LiveInterval &li = I->second;
268 LLVM_DEBUG(li.dump());
269 int FI = Register::stackSlot2Index(li.reg());
270 if (MFI->isDeadObjectIndex(FI))
271 continue;
272
273 SSIntervals.push_back(&li);
274 OrigAlignments[FI] = MFI->getObjectAlign(FI);
275 OrigSizes[FI] = MFI->getObjectSize(FI);
276
277 auto StackID = MFI->getStackID(FI);
278 if (StackID != 0) {
279 AllColors.resize(StackID + 1);
280 UsedColors.resize(StackID + 1);
281 AllColors[StackID].resize(LastFI);
282 UsedColors[StackID].resize(LastFI);
283 }
284
285 AllColors[StackID].set(FI);
286 }
287 LLVM_DEBUG(dbgs() << '\n');
288
289 // Sort them by weight.
290 llvm::stable_sort(SSIntervals, IntervalSorter());
291
292 NextColors.resize(AllColors.size());
293
294 // Get first "color".
295 for (unsigned I = 0, E = AllColors.size(); I != E; ++I)
296 NextColors[I] = AllColors[I].find_first();
297}
298
299/// ColorSlot - Assign a "color" (stack slot) to the specified stack slot.
300int StackSlotColoring::ColorSlot(LiveInterval *li) {
301 int Color = -1;
302 bool Share = false;
303 int FI = Register::stackSlot2Index(li->reg());
304 uint8_t StackID = MFI->getStackID(FI);
305
306 if (!DisableSharing) {
307
308 // Check if it's possible to reuse any of the used colors.
309 Color = UsedColors[StackID].find_first();
310 while (Color != -1) {
311 if (!Assignments[Color].overlaps(li)) {
312 Share = true;
313 ++NumEliminated;
314 break;
315 }
316 Color = UsedColors[StackID].find_next(Color);
317 }
318 }
319
320 if (Color != -1 && MFI->getStackID(Color) != MFI->getStackID(FI)) {
321 LLVM_DEBUG(dbgs() << "cannot share FIs with different stack IDs\n");
322 Share = false;
323 }
324
325 // Assign it to the first available color (assumed to be the best) if it's
326 // not possible to share a used color with other objects.
327 if (!Share) {
328 assert(NextColors[StackID] != -1 && "No more spill slots?");
329 Color = NextColors[StackID];
330 UsedColors[StackID].set(Color);
331 NextColors[StackID] = AllColors[StackID].find_next(NextColors[StackID]);
332 }
333
334 assert(MFI->getStackID(Color) == MFI->getStackID(FI));
335
336 // Record the assignment.
337 Assignments[Color].add(li, LIUAlloc);
338 LLVM_DEBUG(dbgs() << "Assigning fi#" << FI << " to fi#" << Color << "\n");
339
340 // Change size and alignment of the allocated slot. If there are multiple
341 // objects sharing the same slot, then make sure the size and alignment
342 // are large enough for all.
343 Align Alignment = OrigAlignments[FI];
344 if (!Share || Alignment > MFI->getObjectAlign(Color))
345 MFI->setObjectAlignment(Color, Alignment);
346 int64_t Size = OrigSizes[FI];
347 if (!Share || Size > MFI->getObjectSize(Color))
348 MFI->setObjectSize(Color, Size);
349 return Color;
350}
351
352/// Colorslots - Color all spill stack slots and rewrite all frameindex machine
353/// operands in the function.
354bool StackSlotColoring::ColorSlots(MachineFunction &MF) {
355 unsigned NumObjs = MFI->getObjectIndexEnd();
357 SmallVector<float, 16> SlotWeights(NumObjs, 0.0);
358 SmallVector<SmallVector<int, 4>, 16> RevMap(NumObjs);
359 BitVector UsedColors(NumObjs);
360
361 LLVM_DEBUG(dbgs() << "Color spill slot intervals:\n");
362 bool Changed = false;
363 for (LiveInterval *li : SSIntervals) {
364 int SS = Register::stackSlot2Index(li->reg());
365 int NewSS = ColorSlot(li);
366 assert(NewSS >= 0 && "Stack coloring failed?");
367 SlotMapping[SS] = NewSS;
368 RevMap[NewSS].push_back(SS);
369 SlotWeights[NewSS] += li->weight();
370 UsedColors.set(NewSS);
371 Changed |= (SS != NewSS);
372 }
373
374 LLVM_DEBUG(dbgs() << "\nSpill slots after coloring:\n");
375 for (LiveInterval *li : SSIntervals) {
376 int SS = Register::stackSlot2Index(li->reg());
377 li->setWeight(SlotWeights[SS]);
378 }
379 // Sort them by new weight.
380 llvm::stable_sort(SSIntervals, IntervalSorter());
381
382#ifndef NDEBUG
383 for (LiveInterval *li : SSIntervals)
384 LLVM_DEBUG(li->dump());
385 LLVM_DEBUG(dbgs() << '\n');
386#endif
387
388 if (!Changed)
389 return false;
390
391 // Rewrite all MachineMemOperands.
392 for (unsigned SS = 0, SE = SSRefs.size(); SS != SE; ++SS) {
393 int NewFI = SlotMapping[SS];
394 if (NewFI == -1 || (NewFI == (int)SS))
395 continue;
396
397 const PseudoSourceValue *NewSV = MF.getPSVManager().getFixedStack(NewFI);
398 SmallVectorImpl<MachineMemOperand *> &RefMMOs = SSRefs[SS];
399 for (MachineMemOperand *MMO : RefMMOs)
400 MMO->setValue(NewSV);
401 }
402
403 // Rewrite all MO_FrameIndex operands. Look for dead stores.
404 for (MachineBasicBlock &MBB : MF) {
405 for (MachineInstr &MI : MBB)
406 RewriteInstruction(MI, SlotMapping, MF);
407 RemoveDeadStores(&MBB);
408 }
409
410 // Delete unused stack slots.
411 for (int StackID = 0, E = AllColors.size(); StackID != E; ++StackID) {
412 int NextColor = NextColors[StackID];
413 while (NextColor != -1) {
414 LLVM_DEBUG(dbgs() << "Removing unused stack object fi#" << NextColor << "\n");
415 MFI->RemoveStackObject(NextColor);
416 NextColor = AllColors[StackID].find_next(NextColor);
417 }
418 }
419
420 return true;
421}
422
423/// RewriteInstruction - Rewrite specified instruction by replacing references
424/// to old frame index with new one.
425void StackSlotColoring::RewriteInstruction(MachineInstr &MI,
427 MachineFunction &MF) {
428 // Update the operands.
429 for (MachineOperand &MO : MI.operands()) {
430 if (!MO.isFI())
431 continue;
432 int OldFI = MO.getIndex();
433 if (OldFI < 0)
434 continue;
435 int NewFI = SlotMapping[OldFI];
436 if (NewFI == -1 || NewFI == OldFI)
437 continue;
438
439 assert(MFI->getStackID(OldFI) == MFI->getStackID(NewFI));
440 MO.setIndex(NewFI);
441 }
442
443 // The MachineMemOperands have already been updated.
444}
445
446/// RemoveDeadStores - Scan through a basic block and look for loads followed
447/// by stores. If they're both using the same stack slot, then the store is
448/// definitely dead. This could obviously be much more aggressive (consider
449/// pairs with instructions between them), but such extensions might have a
450/// considerable compile time impact.
451bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) {
452 // FIXME: This could be much more aggressive, but we need to investigate
453 // the compile time impact of doing so.
454 bool changed = false;
455
457
458 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
459 I != E; ++I) {
460 if (DCELimit != -1 && (int)NumDead >= DCELimit)
461 break;
462 int FirstSS, SecondSS;
463 if (TII->isStackSlotCopy(*I, FirstSS, SecondSS) && FirstSS == SecondSS &&
464 FirstSS != -1) {
465 ++NumDead;
466 changed = true;
467 toErase.push_back(&*I);
468 continue;
469 }
470
471 MachineBasicBlock::iterator NextMI = std::next(I);
472 MachineBasicBlock::iterator ProbableLoadMI = I;
473
474 Register LoadReg;
475 Register StoreReg;
476 unsigned LoadSize = 0;
477 unsigned StoreSize = 0;
478 if (!(LoadReg = TII->isLoadFromStackSlot(*I, FirstSS, LoadSize)))
479 continue;
480 // Skip the ...pseudo debugging... instructions between a load and store.
481 while ((NextMI != E) && NextMI->isDebugInstr()) {
482 ++NextMI;
483 ++I;
484 }
485 if (NextMI == E) continue;
486 if (!(StoreReg = TII->isStoreToStackSlot(*NextMI, SecondSS, StoreSize)))
487 continue;
488 if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1 ||
489 LoadSize != StoreSize || !MFI->isSpillSlotObjectIndex(FirstSS))
490 continue;
491
492 ++NumDead;
493 changed = true;
494
495 if (NextMI->findRegisterUseOperandIdx(LoadReg, /*TRI=*/nullptr, true) !=
496 -1) {
497 ++NumDead;
498 toErase.push_back(&*ProbableLoadMI);
499 }
500
501 toErase.push_back(&*NextMI);
502 ++I;
503 }
504
505 for (MachineInstr *MI : toErase) {
506 if (Indexes)
508 MI->eraseFromParent();
509 }
510
511 return changed;
512}
513
514bool StackSlotColoring::runOnMachineFunction(MachineFunction &MF) {
515 LLVM_DEBUG({
516 dbgs() << "********** Stack Slot Coloring **********\n"
517 << "********** Function: " << MF.getName() << '\n';
518 });
519
520 if (skipFunction(MF.getFunction()))
521 return false;
522
523 MFI = &MF.getFrameInfo();
525 LS = &getAnalysis<LiveStacksWrapperLegacy>().getLS();
526 MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
527 Indexes = &getAnalysis<SlotIndexesWrapperPass>().getSI();
528
529 bool Changed = false;
530
531 unsigned NumSlots = LS->getNumIntervals();
532 if (NumSlots == 0)
533 // Nothing to do!
534 return false;
535
536 // If there are calls to setjmp or sigsetjmp, don't perform stack slot
537 // coloring. The stack could be modified before the longjmp is executed,
538 // resulting in the wrong value being used afterwards.
539 if (MF.exposesReturnsTwice())
540 return false;
541
542 // Gather spill slot references
543 ScanForSpillSlotRefs(MF);
544 InitializeSlots();
545 Changed = ColorSlots(MF);
546
547 for (int &Next : NextColors)
548 Next = -1;
549
550 SSIntervals.clear();
551 for (auto &RefMMOs : SSRefs)
552 RefMMOs.clear();
553 SSRefs.clear();
554 OrigAlignments.clear();
555 OrigSizes.clear();
556 AllColors.clear();
557 UsedColors.clear();
558 Assignments.clear();
559
560 return Changed;
561}
MachineBasicBlock & MBB
This file implements the BitVector class.
#define LLVM_DEBUG(...)
Definition: Debug.h:106
uint64_t Size
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
#define I(x, y, z)
Definition: MD5.cpp:58
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition: PassSupport.h:55
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:57
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:52
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallVector class.
Stack Slot Coloring
static cl::opt< bool > DisableSharing("no-stack-slot-sharing", cl::init(false), cl::Hidden, cl::desc("Suppress slot sharing during stack coloring"))
#define DEBUG_TYPE
static cl::opt< int > DCELimit("ssc-dce-limit", cl::init(-1), cl::Hidden)
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
Definition: Statistic.h:166
Value * RHS
Value * LHS
Represent the analysis usage information of a pass.
AnalysisUsage & addPreservedID(const void *ID)
AnalysisUsage & addRequired()
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:256
A specialized PseudoSourceValue for holding FixedStack values, which must include a frame index.
Register isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const override
TargetInstrInfo overrides.
Register isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override
If the specified machine instruction is a direct store to a stack slot, return the virtual or physica...
Query interferences between a single live virtual register and a live interval union.
Union of live intervals that are strong candidates for coalescing into a single register (either phys...
void unify(const LiveInterval &VirtReg, const LiveRange &Range)
LiveSegments::Allocator Allocator
LiveInterval - This class represents the liveness of a register, or stack slot.
Definition: LiveInterval.h:687
float weight() const
Definition: LiveInterval.h:719
Register reg() const
Definition: LiveInterval.h:718
void incrementWeight(float Inc)
Definition: LiveInterval.h:720
void setWeight(float Value)
Definition: LiveInterval.h:721
static float getSpillWeight(bool isDef, bool isUse, const MachineBlockFrequencyInfo *MBFI, const MachineInstr &MI, ProfileSummaryInfo *PSI=nullptr)
Calculate the spill weight to assign to a single instruction.
bool overlaps(const LiveRange &other) const
overlaps - Return true if the intersection of the two live ranges is not empty.
Definition: LiveInterval.h:448
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
void setObjectSize(int ObjectIdx, int64_t Size)
Change the size of the specified stack object.
Align getObjectAlign(int ObjectIdx) const
Return the alignment of the specified stack object.
bool isSpillSlotObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a spill slot.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
void RemoveStackObject(int ObjectIdx)
Remove or mark dead a statically sized stack object.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
uint8_t getStackID(int ObjectIdx) const
void setObjectAlignment(int ObjectIdx, Align Alignment)
setObjectAlignment - Change the alignment of the specified stack object.
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
PseudoSourceValueManager & getPSVManager() const
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
bool exposesReturnsTwice() const
exposesReturnsTwice - Returns true if the function calls setjmp or any other similar functions with a...
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Function & getFunction()
Return the LLVM function that this machine code represents.
Representation of each machine instruction.
Definition: MachineInstr.h:69
A description of a memory reference used in the backend.
MachineOperand class - Representation of each machine instruction operand.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
const PseudoSourceValue * getFixedStack(int FI)
Return a pseudo source value referencing a fixed stack frame entry, e.g., a spill slot.
Special value supplied for machine level alias analysis.
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
static int stackSlot2Index(Register Reg)
Compute the frame index from a register value representing a stack slot.
Definition: Register.h:52
SlotIndexes pass.
Definition: SlotIndexes.h:297
void removeMachineInstrFromMaps(MachineInstr &MI, bool AllowBundled=false)
Removes machine instruction (bundle) MI from the mapping.
size_t size() const
Definition: SmallVector.h:78
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:573
void reserve(size_type N)
Definition: SmallVector.h:663
void resize(size_type N)
Definition: SmallVector.h:638
void push_back(const T &Elt)
Definition: SmallVector.h:413
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1196
TargetInstrInfo - Interface to description of machine instruction set.
virtual const TargetInstrInfo * getInstrInfo() const
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
@ SS
Definition: X86.h:212
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:443
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
void stable_sort(R &&Range)
Definition: STLExtras.h:2037
void initializeStackSlotColoringPass(PassRegistry &)
char & MachineDominatorsID
MachineDominators - This pass is a machine dominators analysis pass.
void sort(IteratorTy Start, IteratorTy End)
Definition: STLExtras.h:1664
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
char & StackSlotColoringID
StackSlotColoring - This pass performs stack slot coloring.
bool operator()(LiveInterval *LHS, LiveInterval *RHS) const
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
This struct contains the mappings from the slot numbers to unnamed metadata nodes,...
Definition: SlotMapping.h:33