LLVM 22.0.0git
X86.h
Go to the documentation of this file.
1//===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the entry points for global functions defined in the x86
10// target library, as used by the LLVM JIT.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_X86_X86_H
15#define LLVM_LIB_TARGET_X86_X86_H
16
17#include "llvm/IR/Analysis.h"
18#include "llvm/IR/PassManager.h"
21
22namespace llvm {
23
24class FunctionPass;
26class PassRegistry;
28class X86Subtarget;
30
31/// This pass converts a legalized DAG into a X86-specific DAG, ready for
32/// instruction scheduling.
34
35/// This pass initializes a global base register for PIC on x86-32.
37
38/// This pass combines multiple accesses to local-dynamic TLS variables so that
39/// the TLS base address for the module is only fetched once per execution path
40/// through the function.
42
43/// This function returns a pass which converts floating-point register
44/// references and pseudo instructions into floating-point stack references and
45/// physical instructions.
47
48/// This pass inserts AVX vzeroupper instructions before each call to avoid
49/// transition penalty between functions encoded with AVX and SSE.
51
52/// This pass inserts ENDBR instructions before indirect jump/call
53/// destinations as part of CET IBT mechanism.
55
56/// Return a pass that pads short functions with NOOPs.
57/// This will prevent a stall when returning on the Atom.
59
60/// Return a pass that selectively replaces certain instructions (like add,
61/// sub, inc, dec, some shifts, and some multiplies) by equivalent LEA
62/// instructions, in order to eliminate execution delays in some processors.
64
65/// Return a pass that replaces equivalent slower instructions with faster
66/// ones.
68
69/// Return a pass that reduces the size of vector constant pool loads.
71
72/// Return a pass that removes redundant LEA instructions and redundant address
73/// recalculations.
75
76/// Return a pass that transforms setcc + movzx pairs into xor + setcc.
78
79/// Return a pass that avoids creating store forward block issues in the hardware.
81
82/// Return a pass that lowers EFLAGS copy pseudo instructions.
84
85/// Return a pass that expands DynAlloca pseudo-instructions.
87
88/// Return a pass that config the tile registers.
90
91/// Return a pass that preconfig the tile registers before fast reg allocation.
93
94/// Return a pass that config the tile registers after fast reg allocation.
96
97/// Return a pass that insert pseudo tile config instruction.
99
100/// Return a pass that lower the tile copy instruction.
102
103/// Return a pass that inserts int3 at the end of the function if it ends with a
104/// CALL instruction. The pass does the same for each funclet as well. This
105/// ensures that the open interval of function start and end PCs contains all
106/// return addresses for the benefit of the Windows x64 unwinder.
108
109/// Return a pass that optimizes the code-size of x86 call sequences. This is
110/// done by replacing esp-relative movs with pushes.
112
113/// Return an IR pass that inserts EH registration stack objects and explicit
114/// EH state updates. This pass must run after EH preparation, which does
115/// Windows-specific but architecture-neutral preparation.
117
118/// Return a Machine IR pass that expands X86-specific pseudo
119/// instructions into a sequence of actual instructions. This pass
120/// must run after prologue/epilogue insertion and before lowering
121/// the MachineInstr to MC.
123
124/// This pass converts X86 cmov instructions into branch when profitable.
126
127/// Return a Machine IR pass that selectively replaces
128/// certain byte and word instructions by equivalent 32 bit instructions,
129/// in order to eliminate partial register usage, false dependences on
130/// the upper portions of registers, and to save code size.
132
133/// Return a Machine IR pass that reassigns instruction chains from one domain
134/// to another, when profitable.
136
137/// This pass compress instructions from EVEX space to legacy/VEX/EVEX space when
138/// possible in order to reduce code size or facilitate HW decoding.
140
141/// This pass creates the thunks for the retpoline feature.
143
144/// This pass replaces ret instructions with jmp's to __x86_return thunk.
146
147/// This pass ensures instructions featuring a memory operand
148/// have distinctive <LineNumber, Discriminator> (with respect to each other)
150
151/// This pass applies profiling information to insert cache prefetches.
153
154/// This pass insert wait instruction after X87 instructions which could raise
155/// fp exceptions when strict-fp enabled.
157
158/// This pass optimizes arithmetic based on knowledge that is only used by
159/// a reduction sequence and is therefore safe to reassociate in interesting
160/// ways.
162
163/// // Analyzes and emits pseudos to support Win x64 Unwind V2.
165
166/// The pass transforms load/store <256 x i32> to AMX load/store intrinsics
167/// or split the data to two <128 x i32>.
168class X86LowerAMXTypePass : public PassInfoMixin<X86LowerAMXTypePass> {
169private:
170 const TargetMachine *TM;
171
172public:
173 X86LowerAMXTypePass(const TargetMachine *TM) : TM(TM) {}
175 static bool isRequired() { return true; }
176};
177
178FunctionPass *createX86LowerAMXTypeLegacyPass();
179
180/// The pass transforms amx intrinsics to scalar operation if the function has
181/// optnone attribute or it is O0.
182FunctionPass *createX86LowerAMXIntrinsicsPass();
183
184InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM,
185 const X86Subtarget &,
186 const X86RegisterBankInfo &);
187
194
231
232namespace X86AS {
233enum : unsigned {
234 GS = 256,
235 FS = 257,
236 SS = 258,
239 PTR64 = 272
240};
241} // End X86AS namespace
242
243} // End llvm namespace
244
245#endif
This header defines various interfaces for pass management in LLVM.
#define F(x, y, z)
Definition MD5.cpp:55
FunctionAnalysisManager FAM
FunctionPass class - This class is used to implement most global optimizations.
Definition Pass.h:314
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
A set of analyses that are preserved following a run of a transformation pass.
Definition Analysis.h:112
Primary interface to the complete machine description for the target machine.
X86LowerAMXTypePass(const TargetMachine *TM)
Definition X86.h:173
PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM)
static bool isRequired()
Definition X86.h:175
This class provides the information for the target register banks.
Pass manager infrastructure for declaring and invalidating analyses.
@ PTR32_UPTR
Definition X86.h:238
@ PTR64
Definition X86.h:239
@ PTR32_SPTR
Definition X86.h:237
This is an optimization pass for GlobalISel generic memory operations.
FunctionPass * createX86FloatingPointStackifierPass()
This function returns a pass which converts floating-point register references and pseudo instruction...
FunctionPass * createX86WinEHStatePass()
Return an IR pass that inserts EH registration stack objects and explicit EH state updates.
void initializeX86TileConfigPass(PassRegistry &)
void initializeX86PartialReductionPass(PassRegistry &)
FunctionPass * createX86SuppressAPXForRelocationPass()
void initializeX86CallFrameOptimizationPass(PassRegistry &)
void initializeFixupBWInstPassPass(PassRegistry &)
void initializeX86LoadValueInjectionRetHardeningPassPass(PassRegistry &)
FunctionPass * createX86LoadValueInjectionLoadHardeningPass()
FunctionPass * createX86IssueVZeroUpperPass()
This pass inserts AVX vzeroupper instructions before each call to avoid transition penalty between fu...
void initializeX86ArgumentStackSlotPassPass(PassRegistry &)
void initializeX86SpeculativeLoadHardeningPassPass(PassRegistry &)
void initializeWinEHStatePassPass(PassRegistry &)
FunctionPass * createX86InsertPrefetchPass()
This pass applies profiling information to insert cache prefetches.
FunctionPass * createX86LowerAMXIntrinsicsPass()
The pass transforms amx intrinsics to scalar operation if the function has optnone attribute or it is...
FunctionPass * createX86GlobalBaseRegPass()
This pass initializes a global base register for PIC on x86-32.
FunctionPass * createX86FixupBWInsts()
Return a Machine IR pass that selectively replaces certain byte and word instructions by equivalent 3...
void initializeX86LowerAMXIntrinsicsLegacyPassPass(PassRegistry &)
FunctionPass * createX86DomainReassignmentPass()
Return a Machine IR pass that reassigns instruction chains from one domain to another,...
FunctionPass * createX86LoadValueInjectionRetHardeningPass()
FunctionPass * createX86SpeculativeExecutionSideEffectSuppression()
FunctionPass * createCleanupLocalDynamicTLSPass()
This pass combines multiple accesses to local-dynamic TLS variables so that the TLS base address for ...
FunctionPass * createX86FlagsCopyLoweringPass()
Return a pass that lowers EFLAGS copy pseudo instructions.
void initializeX86FastTileConfigPass(PassRegistry &)
FunctionPass * createX86CompressEVEXPass()
This pass compress instructions from EVEX space to legacy/VEX/EVEX space when possible in order to re...
void initializeX86ExpandPseudoPass(PassRegistry &)
void initializeX86AvoidTrailingCallPassPass(PassRegistry &)
FunctionPass * createX86ArgumentStackSlotPass()
void initializeX86PreTileConfigPass(PassRegistry &)
FunctionPass * createX86CmovConverterPass()
This pass converts X86 cmov instructions into branch when profitable.
FunctionPass * createX86TileConfigPass()
Return a pass that config the tile registers.
FunctionPass * createX86PadShortFunctions()
Return a pass that pads short functions with NOOPs.
void initializeX86DomainReassignmentPass(PassRegistry &)
void initializeX86LoadValueInjectionLoadHardeningPassPass(PassRegistry &)
void initializeX86SuppressAPXForRelocationPassPass(PassRegistry &)
FunctionPass * createX86FastPreTileConfigPass()
Return a pass that preconfig the tile registers before fast reg allocation.
void initializeX86AvoidSFBPassPass(PassRegistry &)
FunctionPass * createX86LowerTileCopyPass()
Return a pass that lower the tile copy instruction.
void initializeX86FastPreTileConfigPass(PassRegistry &)
FunctionPass * createX86SpeculativeLoadHardeningPass()
FunctionPass * createX86FixupSetCC()
Return a pass that transforms setcc + movzx pairs into xor + setcc.
FunctionPass * createX86IndirectBranchTrackingPass()
This pass inserts ENDBR instructions before indirect jump/call destinations as part of CET IBT mechan...
void initializeX86AsmPrinterPass(PassRegistry &)
FunctionPass * createX86InsertX87waitPass()
This pass insert wait instruction after X87 instructions which could raise fp exceptions when strict-...
void initializeX86FixupSetCCPassPass(PassRegistry &)
FunctionPass * createX86ExpandPseudoPass()
Return a Machine IR pass that expands X86-specific pseudo instructions into a sequence of actual inst...
FunctionPass * createX86FixupInstTuning()
Return a pass that replaces equivalent slower instructions with faster ones.
void initializeX86WinEHUnwindV2Pass(PassRegistry &)
FunctionPass * createX86ISelDag(X86TargetMachine &TM, CodeGenOptLevel OptLevel)
This pass converts a legalized DAG into a X86-specific DAG, ready for instruction scheduling.
void initializeX86LowerTileCopyPass(PassRegistry &)
void initializeX86OptimizeLEAPassPass(PassRegistry &)
CodeGenOptLevel
Code generation optimization level.
Definition CodeGen.h:82
FunctionPass * createX86FastTileConfigPass()
Return a pass that config the tile registers after fast reg allocation.
FunctionPass * createX86PartialReductionPass()
This pass optimizes arithmetic based on knowledge that is only used by a reduction sequence and is th...
FunctionPass * createX86FixupLEAs()
Return a pass that selectively replaces certain instructions (like add, sub, inc, dec,...
void initializeX86FixupInstTuningPassPass(PassRegistry &)
void initializeX86LowerAMXTypeLegacyPassPass(PassRegistry &)
void initializeX86CmovConverterPassPass(PassRegistry &)
FunctionPass * createX86CallFrameOptimization()
Return a pass that optimizes the code-size of x86 call sequences.
void initializeX86FlagsCopyLoweringPassPass(PassRegistry &)
void initializeFPSPass(PassRegistry &)
FunctionPass * createX86WinEHUnwindV2Pass()
// Analyzes and emits pseudos to support Win x64 Unwind V2.
FunctionPass * createX86LowerAMXTypeLegacyPass()
FunctionPass * createX86AvoidTrailingCallPass()
Return a pass that inserts int3 at the end of the function if it ends with a CALL instruction.
FunctionPass * createX86DynAllocaExpander()
Return a pass that expands DynAlloca pseudo-instructions.
void initializeX86SpeculativeExecutionSideEffectSuppressionPass(PassRegistry &)
void initializeCompressEVEXPassPass(PassRegistry &)
FunctionPass * createX86OptimizeLEAs()
Return a pass that removes redundant LEA instructions and redundant address recalculations.
void initializeX86FixupVectorConstantsPassPass(PassRegistry &)
AnalysisManager< Function > FunctionAnalysisManager
Convenience typedef for the Function analysis manager.
FunctionPass * createX86IndirectThunksPass()
This pass creates the thunks for the retpoline feature.
void initializeX86DynAllocaExpanderPass(PassRegistry &)
FunctionPass * createX86FixupVectorConstants()
Return a pass that reduces the size of vector constant pool loads.
void initializeX86ExecutionDomainFixPass(PassRegistry &)
FunctionPass * createX86PreTileConfigPass()
Return a pass that insert pseudo tile config instruction.
FunctionPass * createX86ReturnThunksPass()
This pass replaces ret instructions with jmp's to __x86_return thunk.
FunctionPass * createX86AvoidStoreForwardingBlocks()
Return a pass that avoids creating store forward block issues in the hardware.
void initializeX86ReturnThunksPass(PassRegistry &)
void initializeX86DAGToDAGISelLegacyPass(PassRegistry &)
FunctionPass * createX86DiscriminateMemOpsPass()
This pass ensures instructions featuring a memory operand have distinctive <LineNumber,...
void initializeFixupLEAPassPass(PassRegistry &)
InstructionSelector * createX86InstructionSelector(const X86TargetMachine &TM, const X86Subtarget &, const X86RegisterBankInfo &)
A CRTP mix-in to automatically provide informational APIs needed for passes.
Definition PassManager.h:70